SL1466 Wideband PLL FM Demodulator Preliminary Information DS 3979 2.2 August 1997 GND DIGF LO DIGF HI AFC SET AFC WINDOW OSC V CC OSC + OSC – OSC GND VCO GAIN SET ■ Single chip PLL system for wideband FM demodulation 28 27 26 25 24 6 7 8 9 23 22 21 20 VIDEO POL SELECT NC 10 11 12 13 19 18 17 16 NC 14 15 VIDEO DRIVE FEATURES 1 2 3 4 5 SL1466 The SL1466 is a wideband PLL FM demodulator, intended primarily for application in satellite tuners. The device contains all elements necessary, with the exception of external local oscillator tank and loop filter components, to form a complete PLL system operating at 403 or 480MHz. An AFC system is provided, whose output signals can be used to correct for any frequency drift at the head end local oscillator. V CC VIDEO FB+ VIDEO + VIDEO – VIDEO FB– IF V CC IF IPB IF IP IF GND RF AGC SET AGC TIME CONSTANT IF AGC SET NC RF AGC CONTROL ■ Simple low component count application ■ Fully balanced low radiation design QP28 ■ High operating input sensitivity Fig.1 Pin connections - top view ■ 2 stage AGC detect for control over internal and external AGC stages APPLICATIONS ■ Low distortion video output drive ■ Satellite receiver systems ■ Video polarity invert ■ Data communications systems ■ Digital AFC with window adjust ORDERING INFORMATION ■ ESD protection (Normal ESD handling procedures should be observed) 21 22 IF IP SL1466/KG/QP1S 27 PHASE DETECTOR AGC AMP 26 25 IF IPB 24 11 AGC DETECT ON CHIP VCO 12 S/H AFC 4 VIDEO FB+ VIDEO + VIDEO – VIDEO FB– VIDEO DRIVE VIDEO POLARITY SELECT AFC SET 16 NC REF 13 NC 2 15 RF AGC CONTROL 28 5 1 Vcc GND 3 14 NC 19 RF AGC SET 18 17 AGC TIME IF CONST AGC SET 7 8 LO TANK Fig. 2 Block diagram 10 VCO GAIN SET AFC WINDOW DIGF LO DIGF HI SL1466 ELECTRICAL CHARACTERISTICS TAMB = -20°C to +80°C, VCC = +4.75 to +5.25V. These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage ranges unless otherwise stated. Characteristic Pin Value Min Supply current, Icc Typ Units Max 6,23,28 65 RF Section Operating frequency 21, 22 480 MHz Input sensitivity Input overload 21, 22 21, 22 -60 -7 dBm dBm Input Impedance Internal AGC AMP range 21, 22 75 Ω dB 10 54 MHz/V 6,7,8,9 7,8 1.0 0.05 MHz/V MHz/°C VCO Section VCO dF/dV (Ko) VCO supply sensitivity VCO temperature sensitivity 0 Conditions mA 50 At 27°C At 27°C 0-55°C, VCC=5V, 750ppmNTC, 0.5pF tuning cap. Video section Phase detector gain (Kd) Loop amplifier input 0.5 570 V/rad Ω Differential loop filter R1 in note on loop parameters impedance Video drive output swing 11 0.9 Vp-p Into 75Ω, 18MHz frequency deviation Video drive output 11 11 1.8 100 Vp-p Ω Into 1KΩ, 18MHz frequency deviation At 27°C non - linearity Differential gain 11 11 2 ±2 % % 75Ω load 75Ω load Differential phase Tilt 11 11 ±2 1.0 Deg % 75Ω load 75Ω load Base line distortion Intermodulation 11 11 Signal/noise Video polarity select input 11 12 Low Video polarity select input 12 High Video polarity switch 12 leakage current Video polarity switch leakage current Positive to negative video Impedance Video drive luminance 0.5 -40 dB dB 75Ω load 75Ω load, see note 1 VEE dB V 75Ω load, see note 2 Negative polarity V Positive polarity 10 µA VCC=5.25V Vin=0V 12 10 µA VCC=5.25V Vin=5.25V 11 1 dB -46 58 VCC gain balance AFC section AFC window minimum widths AFC output high voltage AFC output low voltage 2 0.44 2,3 2,3 VCC-0.4 0 MHz VCC 0.4 V V Deadband measured at 90% of AFC high voltage SL1466 NOTE: 1. Product of input modulation f1 at 4.43MHz p-p deviation and f2 at 6MHz, 2MHz p-p deviation, (PAL chroma and sound subcarriers). 2. Ratio of luminance bar amplitude (100% white), 13.5MHz p-p deviation, to output rms noise in 6MHz bandwidth with no input modulation. 3. The above characteristics were measured in the Application circuit shown in Fig.10, with an input power of -50dBm andƒ(RFIN) =480MHz, unless otherwise stated. ABSOLUTE MAXIMUM RATINGS All voltages are referred to VEE at 0V Characteristic Min Max Units Supply voltage RF input voltage -0.3 7 2.5 V Vp-p Storage temperature Junction temperature -55 125 150 °C °C QP 28 package thermal resistant, chip to ambient 93 °C/W QP 28 package thermal resistance, chip to case 34 °C/W ESD protection 2 kV Conditions Mil std 883B method 30115 cat 1. PIN DESCRIPTION PIN NO PIN NAME 1 GND 2 DIGFLO Flag = high when F (local oscillator) < F (IFIN) - F (WINDOW)/2 3 DIGFHI Flag = high when F (local oscillator) >F (IFIN) + F (WINDOW)/2 4 AFCSET 5 AFCWINDOW DESCRIPTION (Note units are MHz, Amps and Volts) Chip ground Connected to VCC Control input current sink sets width of AFCWINDOW F =2250 Ko x I where I is the AFCWINDOW current F is the window width and Ko is the VCO gain 6 OSC VCC Oscillator VCC 7 OSC+ External tank 8 OSC- External tank 9 OSC GND 10 VCO GAIN SET 11 VIDEO DRIVE 12 VIDEO POL SELECT Oscillator ground Control voltage input to set VCO GAIN. Connect to VCC Video output (1KΩ, 1.8V p-p) Control voltage input to set Video polarity. 0 Volts = inverted, 5 Volt = normal 13 NC 14 NC 15 RF AGC CONTROL 16 NC 17 IF AGC SET 18 AGC TIME CONSTANT Control output current to tuner AGC control port. See Fig. 4. Connect to VCC via 6k8 Ohm resistor Control input current source. Pulse at carrier frequency F(IFIN) with mark/space proportional to applied device AGC gain. Use external R-C to set time constant. 47K, 100nF 3 SL1466 PIN DESCRIPTION PIN NO PIN NAME 19 RF AGC SET 20 IF GND DESCRIPTION (Note units are MHz, Amps and Volts) Connect to VCC via 1.8K resistor IF stage ground 21 IF IP 22 IF IPB IF input IF input (preferred input for single ended use) 23 IF VCC IF stage VCC 24 VIDEO FB- Loop amp negative input. Connected to VIDEO + via loop network 25 VIDEO- Loop amp negative output 26 VIDEO+ Loop amp positive output 27 VIDEO FB+ 28 VCC Loop amp positive input. Connected to VIDEO- via loop network Chip VCC FUNCTIONAL DESCRIPTION The SL1466 is a wideband PLL FM demodulator, optimised for application in satellite receiver systems and requiring a minimal external component count. It contains all the elements required for the construction of a phase locked loop circuit, with the exception of tuning components for the local oscillator. Also included is an AFC detector circuit for generation of error signals to correct for any frequency drift in the outdoor unit local oscillator. A block diagram is shown in Fig. 2 and a typical application in Fig. 6. The internal pin connections are shown in Fig. 1. In normal applications the second satellite IF of typically 403.2 or 479.5 MHz is fed to the RF preamplifier, which contains a two stage level detect circuit. This generates two AGC signals, one of which controls the gain of the internal IF amplifier stage and one which can be used for controlling the gain of an external RF preamplifier so maintaining a fixed level to the input of the phase detector for optimum threshold, performance. The typical AGC curves are shown in Fig. 4. The output of the preamplifier is fed to the mixer section which is of a balanced design for low radiation. In this stage the IF signal is mixed with the local oscillator signal, which is generated by an on board oscillator. The oscillator is tuned internally, requiring only an external fixed LC tank and is optimised for high linearity over the normal deviation range. Typical frequency versus video drive voltage response for the oscillator is shown in Fig. 8. This response was measured with a modulated carrier. The compensated oscillator temperature stability is typically 0.05MHz/°C. The gain of the oscillator is nominally Ko = 54MHz/Volt. Note: Because there is a x3 amplifier in the video output section, the overall chip gain (MHz/V) is one third of the VCO gain or18MHz/Volt. The gain may be set accurately by means of potential divider connected to Pin 10. (+4.5V) The output of the mixer is then fed to the loop amplifier around which feedback is applied to determine loop amplifier transfer characteristics. The output of the loop amplifier is referenced so as to eliminate V CC dependence of the VCO. The loop amplifier drives a buffer amplifier, which can be connected to a 75 Ohm load or a high impedance stage to give greater linearity and approximately 6dB higher demodulated signal. The video polarity can be inverted depending on the sense of the video polarity select input; open circuit or a resistor to V CC gives positive video whereas a resistor to V EE gives negative video. R2 C1 PHASE DETECTOR GAIN = Kd VOLT/RAD R1 RF INPUT VIDEO DRIVE VIDEO VCO VCO GAIN = Ko RAD/SEC/VOLT Fig. 3 Design of PLL loop parameters 4 X3 SL1466 The SL1466 is normally used as a type 2 second order loop and can be represented by the above diagram. for such a system the following loop parameters apply. T 1= C1 R1 T 2= C1 R2 and T 1= Ko KD/ω n2 T2=2 ξ/ωn where: KO is the VCO gain in radians seconds per volt KD is the phase detector gain in volts per radian ω n is the natural loop bandwidth ξ is the loop damping factor From these factors the loop 3dB bandwidth can be determined from the following expression; ω2 = ω2(2ξ2 + 1) + ω2 √ ((2ξ2 + 1) + 1 n n 3dB AGC FACILITY A sophisticated two stage level detect circuit has been provided which will control both internal IF AGC and external tuner AGC amplifiers in order to maintain a fixed level to the input of the phase detector of around –20dBm for optimum threshold performance. The internal AGC amplifier provides 50dB of gain adjust and the external AGC control provides for 15dB of gain adjust, thus covering 65dB of dynamic range at the tuner input. The RF output current RF AGC CONTROL can be converted to a positive gradient control voltage by an external resistor. AFC FACILITY The SL1466 contains a digital frequency error detect circuit, which generates an output consisting of two logic flags, DIGFHI and DIGFLO, dependant on whether the LO frequency is above or below the input frequency. These flags have an overlap region where both are high; this is equivalent to the deadband window. The function of the AFC outputs is shown in Fig. 7 and the accompanying Table. which approximates to ω3dB = 2ξωn, when ξ >>1 N.B. VCO gain within the PLL is three times higher than at the video drive pin due to gain in the output stage. NOTE: R1 is the loop amplifier input resistor. R2 and C2 are the generic designators for the loop components R7-R9 and C9, C14 on the circuit diagram. RFC AGC CONTROL CURRENT (µA) 4V 400 AGC TIME CONSTANT (V) 350 3V 300 TC 250 2V 200 RFCONT 150 1V 100 50 0 -90 -70 -50 -30 -10 Pin dBm Fig. 4 RF AGC control current and AGC time cinstant voltage vs Input power 5 SL1466 Vcc Vcc 62 µA DIGFHI DIGFLO VREF 4.8k VEE VEE AFC SET AFC KEY AFC DIGFLO, DIGFHI outputs (Pins 2, 3) AFCAFC KEY SET INPUT (Pin (Pin 4) 4) Vcc AFC WINDOW 50 50 OSC OSC OSC VREF;Vcc –2.5V 2.5mA 3mA VEE 2.5mA VEE AFC WINDOW (Pin 5) VEE OSC (Pin 7, 8) VCC VCC VCC 125 µA 125 µA 60 4.8k 125 µA VCC/2 3.3mA VCO GAIN VCO GAIN ADJUST SET VEE VEE VCO GAIN ADJUST (Pin10) 10) VCO GAIN SET (Pin VIDEO DRIVE (Pin 11) Fig. 5a SL1466 I.O.ports internal circuitry 6 VIDEO DRIVE SL1466 Vcc 160k RF AGC CONTROL 2.5V VEE VEE 5k VIDEO POLARITY VEE VEE AGCCONTROL control (Pin(Pin 15) 15) RFRF AGC VIDEO POLARITY (Pin 12) Vcc IF AGC SET VREF , Vcc –3.15V VREF;Vcc –2.4V AGC TIME CONSTANT AGC TIMECONST TIME CONSTANT AGC ANT (Pin(Pin 18) 18) (Pin 17) IF AGC SET IF AGC SET (Pin 17) VCC RF AGC SET 415 415 VREF;Vcc –2V 350 350 IF IP IF IP 2m VEE IF IP (Pins 21, 22) RF AGC SET (Pin 19) Fig. 5b SL1466 I.O ports internal circuitry 7 SL1466 VCC VCC VCC 415 415 VIDEO– 350 VIDEO+ 350 IF IP IF IP 500 µA 500 µ A 2m VEE VEE VEE IF IP (Pins 21, 22) VIDEO+, VIDEO– (Pins 25, 26) Fig. 5c SL1466 I.O ports internal circuitry H9 1 2 1 3 2 H8 3 4 1 VCC 2 R1 100K 0.5p. 750PPM NTC C1 L1 100pF 4.5T,3MM,0 56" C3b 100nF C2a 100nF H7 2 7 8 9 GND DIGFLO DIGFLHI AFCSET AFCWINDOW OSCVCC OSC+ OSCOSCGND 10 VCOGAINSET VCC 11 VIDEODRIVE SKT2 C2b 100µF 12 BNC VIDEOPOL 13 NC VCC 14 NC VIDEO OUT 1 5 VCC Tayo Yudan UMK107 UK0R5CZ-B 6 C3a VCC C10a C10b 1 10uF 100nF C12b 100pF C12a 100nF 28 VCC VIDEOFB+ 27 26 VIDEO+ 25 VIDEOVIDEOFB- 24 IF VCC C14 330pF 1K3 R7 C9 330pF 1K3 C8 1pF 22 C7a 21 IF IP 100nF 20 IF GND 19 RFAGCSET 18 AGCTIMECONST 17 IF AGCSET 16 NC RFAGCCONT 15 IF IP C6 10nF C7b SKT1 SMA C5 10nF 100pF RF IN R10 50 2 R4 4K7 C4 100nF IC1 SL1466_IEE 2 S1 SW DIP-2 1 3 R9 23 R11 10K VCC 4 C13 1pF VCC H1 1 2 C12b C12a 100pF 100nF C11 100nF 2 1 H5 R5 1K8 R3 6K8 2 1 H4 2 1 H3 Fig. 6 Typical application circuit. Note: Loop component values may need re-optimising on Application and VCO gain setting. 8 SL1466 WINDOW DIGFLO DIGFHI IFIN f(LO) Fig. 7 SL1466 digital AFC output FREQUENCY ERROR f(LO) Below window f(LO) Within window f(LO) Above window DIGFLO 1 DIGFHI 0 1 0 1 1 4.5 VIDEO DRIVE Volts 4 Down 3.5 Up 3 2.5 2. 1.5 420 430 440 450 460 470 480 490 500 510 520 530 540 RF IN MHz Fig.8 VCO performance (S curve characteristics) 9 SL1466 APPLICATION NOTES Tuning procedure The component values shown in the applications circuit Fig. 6 are optimised for operation at an IF of 479.5MHz. The AFC circuit can be used to fine tune the external tank as follows: With the SL1466 connected as in the test set up Fig. 11 or its equivalent using 75Ω cables. Set the video generator for 1V p-p output. Set the satellite test transmitter for a carrier frequency of 479.5MHz, frequency deviation 13.5MHz, power level -30dBm. Turn on the pre-emphasis filter. Monitor the voltage levels on Pin 2 (DIGFLO) and Pin 3 (DIGFHI). Adjust the tank coil by squeezing it slightly until the signal on both Pins goes high (i.e. > Vcc –0.4 Volts). These Pins remain high provided the LO frequency is tuned to within the AFC WINDOW aperture,( ± 0.22MHz). Optimising the loop components The network connected from Pin 26 (VIDEO+) to Pin 24 (VIDEOFB–) and from Pin 25 (VIDEO–) to Pin 27 (VIDEO FB+) forms the loop filter. The components shown are based on a natural frequency ƒn of 2.46MHz (ω n =2x π x2.46 Mrads/s ) and damping factor ξ =2.6, and assuming Ko = 54MHz/V. The closed loop gain of the receiver (i.e. the ratio of the output amplitude to the input carrier frequency variation versus frequency) has a low pass filter characteristic. Its roll off is determined by the natural frequency whilst its in band flatness is determined by the damping factor. Both factors will affect the 3dB bandwidth as discussed earlier. A narrow bandwidth will cause loss of high frequency resolution whilst a large bandwidth will degrade the overall signal/noise in the output waveform. Thus a selection procedure might be as follows: 10 ■ Calculate R7 (R9) and C9 (C14) based on ƒ n = 2.46MHz, ξ =2.6 and connect as in Fig. 5. ■ Set the video generator for 1Vp–p composite video and the test generator for a carrier frequency of 479.5MHz, frequency deviation of 13.5MHz and power level –30dBm. ■ Turn on the pre–emphasis filter. Use the 15kHz test pattern to give black/white screen. ■ Monitor the video analyser or TV set. ■ Adjust the de–emphasis filter until the bar amplitude is 1Vp–p or 0% error. Reduce transmitter power level until sparklies or streaking appear. ■ Adjust component values for minimum power level when streaking and sparklies occur together. AGC settings The signal level at the input to the limiter preceding the phase detector is maintained at an level of around –20dBm or more by an internal (device) AGC and an external (tuner) AGC circuit. Current pulses at the carrier frequency with mark/space proportional to this input power are sourced out of pin 18 (AGC TIME CONSTANT). These are smoothed and turned into a voltage by the external components R4, C4. The time constant R4 C4 should be adjusted so that the expected signal fading rate can be tracked but its value is not critical, 5mSec typically. Fig. 4 shows a typical external AGC control curve. Also shown is the AGCTIMECONST voltage which is an indication of the level of internal AGC gain being applied, (the control range is the flat part of the curve). SL1466 COMPONENT SIDE Fig. 9 Test demo PCB 11 SL1466 1 2 1 3 2 H8 3 VCC GND DIGFLO DIGFLHI 4 AFCSET 5 VCC AFCWINDOW VCC Tayo Yudan UMK107 UK0R5CZ-B 6 OSCVCC 0.5p. 750PPM NTC 7 C3b OSC+ C3a C1 8 L1 100nF 100pF OSC4.5T,3MM,0 56" 9 OSCGND C2a 100nF 10 VCOGAINSET VCC 11 VIDEODRIVE SKT2 C2b 100µF VIDEO OUT 12 BNC VIDEOPOL 13 NC VCC H7 14 NC 1 1 2 2 R1 100K VCC C10a C10b 1 10uF 100nF C12b 100pF C12a 100nF H9 28 VCC R9 VIDEOFB+ 27 26 VIDEO+ 25 VIDEOVIDEOFB- 24 IF VCC C12a 100nF H1 1 2 C12b 100pF C14 330pF 1K3 R7 C9 330pF 1K3 C8 1pF 23 22 C7a 21 IF IP 100nF 20 IF GND 19 RFAGCSET 18 AGCTIMECONST 17 IF AGCSET 16 NC RFAGCCONT 15 IF IP SKT1 SMA C6 10nF C7b C5 10nF 100pF RF IN R10 50 H2 2 R4 4K7 C4 100nF IC1 SL1466_IEE 2 R11 10K VCC S1 SW DIP-2 C11 1 4 C13 1pF 100nF 3 2 1 H5 R5 1K8 R3 6K8 2 1 H4 2 1 H3 Fig. 10 Test/Demo circuit diagram Video Monitor R&S SPGF Waveform Generator Pre-Emphasis Modulator/ Upconverter SL1466 479.5MHz f = 13.5MHz R&S SFZ Satellite Test Transmitter Fig. 11 Test set up 12 De-Emphasis R&S UAF Video Analyser SL1466 13 SL1466 14 SL1466 15 SL1466 PACKAGE DETAILS Dimensions are shown thus: mm (in). For further package information, please contact your local Customer Service Centre. 0-8° 9·80/9·98 (0·386/0·393) PIN 1 0·33 (0·013) × 45° REF. PIN 1 REF. SPOT 3·81/3·99 (0·150/0·157) 5·80/6·20 (0·230/0·244) 0·41/0·89 (0·016/0·035) 28 LEADS AT 0·63 (0·025) NOM. SPACING 1·40/1·55 (0·055/0·061) 0·64/0·76 (0·025/0·030) 1·55/1·73 (0·061/0·068) 0·17/0·30 (0·007/0·012) 0·17/0·25 (0·007/0·010) NOTES 1. Controlling dimensions are inches. 2. This package outline diagram is for guidance only. Please contact your Mitel Semiconductor Customer Service Centre for further information. 0·127/0·25 (0·004/0·010) 28-LEAD SUBMINIATURE PLASTIC DIL - QP28 HEADQUARTERS OPERATIONS MITEL SEMICONDUCTOR Cheney Manor, Swindon, Wiltshire SN2 2QW, United Kingdom. Tel: (01793) 518000 Fax: (01793) 518411 MITEL SEMICONDUCTOR 1500 Green Hills Road, Scotts Valley, California 95066-4922 United States of America. Tel (408) 438 2900 Fax: (408) 438 5576/6231 Internet: http://www.gpsemi.com CUSTOMER SERVICE CENTRES ● FRANCE & BENELUX Les Ulis Cedex Tel: (1) 69 18 90 00 Fax : (1) 64 46 06 07 ● GERMANY Munich Tel: (089) 419508-20 Fax : (089) 419508-55 ● ITALY Milan Tel: (02) 6607151 Fax: (02) 66040993 ● JAPAN Tokyo Tel: (03) 5276-5501 Fax: (03) 5276-5510 ● KOREA Seoul Tel: (2) 5668141 Fax: (2) 5697933 ● NORTH AMERICA Scotts Valley, USA Tel: (408) 438 2900 Fax: (408) 438 5576/6231 ● SOUTH EAST ASIA Singapore Tel:(65) 3827708 Fax: (65) 3828872 ● SWEDEN Stockholm Tel: 46 8 702 97 70 Fax: 46 8 640 47 36 ● TAIWAN, ROC Taipei Tel: 886 2 25461260 Fax: 886 2 27190260 ● UK, EIRE, DENMARK, FINLAND & NORWAY Swindon Tel: (01793) 726666 Fax : (01793) 518582 These are supported by Agents and Distributors in major countries world-wide. © Mitel Corporation 1998 Publication No. DS3979 Issue No. 2.2 August 1997 TECHNICAL DOCUMENTATION – NOT FOR RESALE. PRINTED IN UNITED KINGDOM This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company reserves the right to alter without prior notice the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to the Company's conditions of sale, which are available on request. 16 All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners.