RF2173 3V GSM POWER AMPLIFIER Package Style: QFN, 16-Pin, 4x4 3V GSM Cellular Handsets 3V Dual-Band/Triple-Band Handsets GPRS Compatible Commercial and Consumer Systems Portable Battery-Powered Equipment VCC2 NC 2F0 GND2 2 12 RF OUT RF IN 3 11 RF OUT GND1 4 10 RF OUT Applications 13 5 6 7 8 9 GND 14 VCC 15 APC2 16 APC1 Single 2.7V to 4.8V Supply Voltage +36dBm Output Power at 3.5V 32dB Gain with Analog Gain Control 56% Efficiency 800MHz to 950MHz Operation Supports GSM and E-GSM 1 VCC1 VCC2 Features GND RoHS Compliant & Pb-Free Product Functional Block Diagram Product Description The RF2173 is a high power, high efficiency power amplifier module offering high performance in GSM or GPRS applications. The device is manufactured on an advanced GaAs HBT process, and has been designed for use as the final RF amplifier in GSM hand-held digital cellular equipment and other applications in the 800MHz to 950MHz band. On-board power control provides over 70dB of control range with an analog voltage input, and provides power down with a logic “low” for standby operation. The device is self-contained with 50Ω input and the output can be easily matched to obtain optimum power and efficiency characteristics. The RF2173 can be used together with the RF2174 for dual-band operation. The device is packaged in an ultra-small plastic package, minimizing the required board space. Ordering Information RF2173 RF2173PCBA-41X 9GaAs HBT GaAs MESFET InGaP HBT 3V GSM Power Amplifier Fully Assembled Evaluation Board Optimum Technology Matching® Applied SiGe BiCMOS Si BiCMOS SiGe HBT GaAs pHEMT Si CMOS Si BJT GaN HEMT RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc. Rev A8 DS070730 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 1 of 14 RF2173 Absolute Maximum Ratings Parameter Rating Unit Supply Voltage -0.5 to +6.0 VDC Power Control Voltage (VAPC) -0.5 to +3.0 V DC Supply Current 2400 mA Input RF Power +13 dBm Duty Cycle at Max Power 50 % Output Load VSWR 10:1 Operating Case Temperature -40 to +85 °C Storage Temperature -55 to +150 °C Parameter Min. Specification Typ. Max. Caution! ESD sensitive device. Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum Rating conditions to the device may reduce device reliability. Specified typical performance or functional operation of the device under Absolute Maximum Rating conditions is not implied. RoHS status based on EUDirective2002/95/EC (at time of this document revision). The information in this publication is believed to be accurate and reliable. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents, or other rights of third parties, resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice. Unit Temp=25°C, VCC =3.5V, VAPC =2.7V, PIN =+6dBm, Freq=880MHz to 915MHz, 25% Duty Cycle, pulse width=1154μs Overall Operating Frequency Range 880 to 915 MHz Usable Frequency Range 800 to 950 MHz Maximum Output Power +35.0 +36 dBm Temp=25°C, VCC =3.5V, VAPC =2.7V +35.2 dBm Temp=+25°C, VCC =3.2V, VAPC =2.7V dBm Temp=+85°C, VCC =3.2V, VAPC =2.7V +34.0 dBm Temp=25°C, VCC =2.7V, VAPC =2.7V +33.0 +32.5 50 dBm 56 % +4 % At POUT,MAX, VCC =3.0V 12 % POUT =+20dBm % POUT =+10dBm +6 Output Noise Power Forward Isolation -45 +8 dBm -72 dBm RBW=100kHz, 925MHz to 935MHz, POUT,MIN <POUT <POUT,MAX, PIN,MIN <PIN <PIN,MAX, VCC =3.0V to 5.0V -81 dBm RBW=100kHz, 935MHz to 960MHz, POUT,MIN <POUT <POUT,MAX, PIN,MIN <PIN <PIN,MAX, VCC =3.0V to 5.0V -40 dBm VAPC =0.2V, PIN =+6dBm -30 dBm VAPC =0.2V, PIN =+8dBm Second Harmonic -50 -38 dBc Third Harmonic -65 -43 dBc -36 dBm All Other Non-Harmonic Spurious Input Impedance Ω 50 Optimum Source Impedance Ω 40+j10 Input VSWR 2.5:1 Output Load Impedance 2 of 14 For best noise performance POUT,MAX-5dB<POUT <POUT,MAX 4:1 Output Load VSWR Temp=+85°C, VCC =2.7V, VAPC =2.7V At POUT,MAX, VCC =3.2V 56 5 Input Power for Max Output See evaluation board schematic. +34.0 +34.0 Total Efficiency Condition POUT <POUT,MAX-5dB 10:1 Spurious<-36dBm, VAPC =0.2V to 2.7V, RBW=100kHz 1.5-j1.7 Ω Load Impedance presented at RF OUT pad 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A8 DS070730 RF2173 Min. Specification Typ. Power Control “OFF” 0.2 0.5 Power Control Range 75 Parameter Max. Unit Condition Power Control VAPC Power Control “ON” Gain Control Slope 2.7 5 Maximum POUT, Voltage supplied to the input V Minimum POUT, Voltage supplied to the input dB 100 APC Input Capacitance APC Input Current V 4.5 Turn On/Off Time 150 dB/V VAPC =0.2V to 2.7V POUT =-10dBm to +35dBm 10 pF DC to 2MHz 5 mA VAPC =2.7V 10 μA VAPC =0V 100 ns VAPC =0 to 2.7V V Specifications 4.8 V Nominal operating limits, POUT <+35dBm 5.5 V With maximum output load VSWR 6:1, POUT <+35dBm A DC Current at POUT,MAX Power Supply Power Supply Voltage 3.5 2.7 Power Supply Current 2 50 Rev A8 DS070730 200 375 mA Idle Current, PIN <-30dBm 1 10 μA PIN <-30dBm, VAPC =0.2V 1 10 μA PIN <-30dBm, VAPC =0.2V, Temp=+85°C 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 3 of 14 RF2173 Pin 1 2 Function GND GND2 3 RF IN Description Interface Schematic Internally connected to the ground slug. Ground connection for the driver stage. To minimize the noise power at the output, it is recommended to connect this pin with a trace of about 40mil to the ground plane. This will slightly reduce the small signal gain, and lower the noise power. It is important for stability that this pin have it’s own vias to the ground plane, minimizing common inductance. RF Input. This is a 50Ω input, but the actual impedance depends on the interstage matching network connected to pin 5. An external DC blocking capacitor is required if this port is connected to a DC path to ground or a DC voltage. See pin 15. VCC1 RF IN From Bias GND1 Stages 4 GND1 5 VCC1 6 APC1 Ground connection for the pre-amplifier stage. Keep traces physically short See pin 3. and connect immediately to the ground plane for best performance. It is important for stability that this pin has it’s own vias to the groundplane, to minimize any common inductance. Power supply for the pre-amplifier stage and interstage matching. This pin See pin 3. forms the shunt inductance needed for proper tuning of the interstage match. Refer to the application schematic for proper configuration. Note that position and value of the components are important. APC VCC Power Control for the driver stage and pre-amplifier. When this pin is "low," all circuits are shut off. A "low" is typically 0.5V or less at room temperature. A shunt bypass capacitor is required. During normal operation this pin is the power control. Control range varies from about 1.0V for -10dBm to 2.6V for +35dBm RF output power. The maximum power that can be achieved depends on the actual output matching; see the application information for more details. The maximum current into this pin is 5mA when VAPC1 =2.6V, and 0mA when VAPC =0V. GND To RF Stages GND 7 8 9 10 APC2 VCC GND RF OUT Power Control for the output stage. See pin 6 for more details. See pin 6. Power supply for the bias circuits. See pin 6. Internally connected to the ground slug. RF Output and power supply for the output stage. Bias voltage for the final stage is provided through this wide output pin. An external matching network is required to provide the optimum load impedance. RF OUT From Bias Stages GND PCKG BAS 11 12 13 RF OUT RF OUT 2F0 14 15 NC VCC2 Same as pin 10. Same as pin 10. Same as pin 10. Same as pin 10. Connection for the second harmonic trap. This pin is internally connected to the RF OUT pins. The bonding wire together with an external capacitor form a series resonator that should be tuned to the second harmonic frequency in order to increase efficiency and reduce spurious outputs. Not connected. Same as pin 10. Power supply for the driver stage and interstage matching. This pin forms the shunt inductance needed for proper tuning of the interstage match. Please refer to the application schematic for proper configuration, and note that position and value of the components are important. VCC2 From Bias GND2 Stages 16 Pkg Base 4 of 14 VCC2 GND Same as pin 15. Same as pin 15. Ground connection for the output stage. This pad should be connected to the ground plane by vias directly under the device. A short path is required to obtain optimum performance, as well as to provide a good thermal path to the PCB for maximum heat dissipation. 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A8 DS070730 RF2173 Package Drawing 0.10 C B -B- 2 PLCS 4.00 0.10 C B 3.75 2 PLCS 2.00 0.80 A TYP 2 1.60 2 PLCS 1.50 3.75 4.00 SQ. 0.75 0.50 0.10 C A 2 PLCS INDEX AREA 2.00 0.45 0.28 0.10 C A 2 PLCS 3.20 2 PLCS 12° MAX 1.00 0.90 Dimensions in mm. Shaded pin is lead 1. Rev A8 DS070730 0.05 0.00 0.10 M C A B C 0.05 0.75 0.65 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 5 of 14 RF2173 Theory of Operation and Application Information The RF2173 is a three-stage device with 32 dB gain at full power. Therefore, the drive required to fully saturate the output is +3dBm. Based upon HBT (Heterojunction Bipolar Transistor) technology, the part requires only a single positive 3V supply to operate to full specification. Power control is provided through a single pin interface, with a separate Power Down control pin. The final stage ground is achieved through the large pad in the middle of the backside of the package. First and second stage grounds are brought out through separate ground pins for isolation from the output. These grounds should be connected directly with vias to the PCB ground plane, and not connected with the output ground to form a so called “local ground plane” on the top layer of the PCB. The output is brought out through the wide output pad, and forms the RF output signal path. The amplifier operates in near Class C bias mode. The final stage is "deep AB", meaning the quiescent current is very low. As the RF drive is increased, the final stage self-biases, causing the bias point to shift up and, at full power, draws about 2000mA. The optimum load for the output stage is approximately 1.2Ω. This is the load at the output collector, and is created by the series inductance formed by the output bond wires, vias, and microstrip, and 2 shunt capacitors external to the part. The optimum load impedance at the RF Output pad is 1.5-j1.7Ω. With this match, a 50Ω terminal impedance is achieved. The input is internally matched to 50Ω with just a blocking capacitor needed. This data sheet defines the configuration for GSM operation. The input is DC coupled; thus, a blocking cap must be inserted in series. Also, the first stage bias may be adjusted by a resistive divider with high value resistors on this pin to VPC and ground. For nominal operation, however, no external adjustment is necessary as internal resistors set the bias point optimally. VCC1 and VCC2 provide supply voltage to the first and second stage, as well as provides some frequency selectivity to tune to the operating band. Essentially, the bias is fed to this pin through a short microstrip. A bypass capacitor sets the inductance seen by the part, so placement of the bypass cap can affect the frequency of the gain peak. This supply should be bypassed individually with 100pF capacitors before being combined with VCC for the output stage to prevent feedback and oscillations. The RF OUT pin provides the output power. Bias for the final stage is fed to this output line, and the feed must be capable of supporting the approximately 2A of current required. Care should be taken to keep the losses low in the bias feed and output components. A narrow microstrip line is recommended because DC losses in a bias choke will degrade efficiency and power. While the part is safe under CW operation, maximum power and reliability will be achieved under pulsed conditions. The data shown in this data sheet is based on a 12.5% duty cycle and a 600μs pulse, unless specified otherwise. The part will operate over a 3.0V to 5.0V range. Under nominal conditions, the power at 3.5V will be greater than +34.5dBm at +90°C. As the voltage is increased, however, the output power will increase. Thus, in a system design, the ALC (Automatic Level Control) Loop will back down the power to the desired level. This must occur during operation, or the device may be damaged from too much power dissipation. At 5.0V, over +38dBm may be produced; however, this level of power is not recommended, and can cause damage to the device. The HBT breakdown voltage is >20V, so there are no issue with overvoltage. However, under worst-case conditions, with the RF drive at full power during transmit, and the output VSWR extremely high, a low load impedance at the collector of the output transistors can cause currents much higher than normal. Due to the bipolar nature of the devices, there is no limitation on the amount of current de device will sink, and the safe current densities could be exceeded. High current conditions are potentially dangerous to any RF device. High currents lead to high channel temperatures and may force early failures. The RF2173 includes temperature compensation circuits in the bias network to stabilize the RF transistors, thus limiting the current through the amplifier and protecting the devices from damage. The same mechanism works to compensate the currents due to ambient temperature variations. To avoid excessively high currents it is important to control the VAPC when operating at supply voltages higher than 4.0V, such that the maximum output power is not exceeded. 6 of 14 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A8 DS070730 RF2173 Application Schematic VCC 120 pF 1 nF Very close to pin 15/16 0.9 pF Instead of a stripline, an inductor of ~10 nH can be used VCC 1 16 15 14 Instead of a stripline, an inductor of 2.7 nH can be used 13 2 12 3 11 33 pF Quarter wave length .040" 1 nF RF IN 180 Ω 50 Ω μstrip 4 5 7 8 10 nH 33 pF Rev A8 DS070730 9 pF 33 pF 33 pF 6.2 pF 14 pF 9 VCC VCC RF OUT 10 6 33 pF Spacing between edge of device and capacitor 0.062" Distance center to center of capacitors 0.416" 33 pF APC Note: All capacitors are standard 0402 multi layer 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 7 of 14 RF2173 Internal Schematic VCC1 5Ω VCC2 RF OUT 4.5 pF APC1 VCC APC2 VCC RF IN 1.0kΩ 5Ω 400Ω 300Ω APC1 PKG BASE 8 of 14 GND2 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. PKG BASE Rev A8 DS070730 RF2173 Evaluation Board Schematic VCC NC 2 GND P1-3 3 VCC P1-4 4 VCC 5 GND C19 3.3 uF C5 1 nF C10 0.9 pF C21 120 pF CON5 1 50 Ω μstrip J1 RF IN C7 3.3 uF C1 1 nF R2 180 Ω 16 + 1 VCC + P1 C8 1 nF 15 14 13 2 12 3 11 4 10 VCC C20 3.3 uF + C12 1 nF C11 33 pF L1 10 nH 5 6 7 8 9 C9 33 pF L2 8.8 nH C3 9 pF C2 33 pF C6 14 pF 50 Ω μstrip J2 RF OUT C4 6.2 pF 2173400C VAPC VCC C25 10 nF C16 1 nF C13 33 pF C14 33 pF C15 33 pF C22 1 nF C23 10 nF C18 + 3.3 uF C17 1 nF C24 10 nF 50 Ω μstrip J3 VAPC Rev A8 DS070730 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 9 of 14 RF2173 Evaluation Board Layout Board Size 2.0” x 2.0” Board Thickness 0.032”; Board Material FR-4; Multi-Layer 10 of 14 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A8 DS070730 RF2173 Typical Test Setup Power Supply V-V+S-S+ RF Generator Spectrum Analyzer 3dB 10dB/5W Buffer x1 OpAmp Pulse Generator A buffer amplifier is recommended because the current into t VAPC changes with voltage. As an alternative, the voltage may monitored with an oscilloscope. Notes about testing the RF2173 The test setup shown above includes two attenuators. The 3dB pad at the input is to minimize the effects that the switching of the input impedance of the PA has on the signal generator. When VAPC is switched quickly, the resulting input impedance change can cause the signal generator to vary its output signal, either in output level or in frequency. Instead of an attenuator an isolator may also be used. The attenuator at the output is to prevent damage to the spectrum analyzer, and should be able to handle the power. It is important not to exceed the rated supply current and output power. When testing the device at higher than nominal supply voltage, the VAPC should be adjusted to avoid the output power exceeding +36dBm. During load-pull testing at the output it is important to monitor the forward power through a directional coupler. The forward power should not exceed +36dBm, and VAPC needs to be adjusted accordingly. This simulates the behavior for the power control loop in this respect. To avoid damage, it is recommended to set the power supply to limiting the current during the burst, not to exceed the maximum current rating. Rev A8 DS070730 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 11 of 14 RF2173 PCB Design Requirements PCB Surface Finish The PCB surface finish used for RFMD’s qualification process is Electroless Nickel, immersion Gold. Typical thickness is 3μinch to 8μinch Gold over 180μinch Nickel. PCB Land Pattern Recommendation PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. PCB Metal Land Pattern A = 0.51 x 0.89 (mm) Typ. B = 0.89 x 0.51 (mm) Typ. C = 1.52 (mm) Sq. 3.20 (mm) Typ. 0.81 (mm) Typ. Pin 1 A 1.73 (mm) Typ. 0.81 (mm) Typ. A A A B A B 0.81 (mm) Typ. B B C B 1.60 (mm) B 0.94 (mm) Typ. A A A A A 1.60 (mm) Typ. 1.73 (mm) Typ. Figure 1. PCB Metal Land Pattern (Top View) 12 of 14 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A8 DS070730 RF2173 PCB Solder Mask Pattern Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB Metal Land Pattern with a 3mil expansion to accommodate solder mask registration clearance around all pads. The centergrounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be provided in the master data or requested from the PCB fabrication supplier. A = 0.71 x 1.09 (mm) Typ. B = 1.09 x 0.71 (mm) Typ. C = 1.73 (mm) Sq. 3.20 (mm) Typ. 0.81 (mm) Typ. Pin 1 A 1.73 (mm) Typ. 0.81 (mm) Typ. A A A B A B 0.81 (mm) Typ. B B C B 1.60 (mm) B 0.94 (mm) Typ. A A A A A 1.60 (mm) Typ. 1.73 (mm) Typ. Figure 2. PCB Solder Mask Pattern (Top View) Thermal Pad and Via Design The PCB land pattern has been designed with a thermal pad that matches the exposed die paddle size on the bottom of the device. Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern shown has been designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing strategies. The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a 0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results. Figure 3. shows the via pattern used for the RFMD qualification design. Rev A8 DS070730 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 13 of 14 RF2173 0.508 (mm) Grid Via 0.305 (mm) Finished Hole Figure 3. Thermal Pad and Via Design (RF2173) RoHS* Banned Material Content RoHS Compliant: Yes Package total weight in grams (g): 0.038 Compliance Date Code: 0628 Bill of Materials Revision: - Pb Free Category: B i l l o f Ma te r i a l s e3 Pa r ts Pe r Mi l l i o n (PPM) Pb Cd Hg Cr VI PB B PB DE Di e 0 0 0 0 0 0 Mo l d i ng Co mp o und 0 0 0 0 0 0 Le a d F r a m e 0 0 0 0 0 0 Di e Atta ch Ep o x y 0 0 0 0 0 0 Wi r e 0 0 0 0 0 0 So l d e r Pl a ti ng 0 0 0 0 0 0 Thi s R o HS b a nne d ma te r i a l co nte nt de cl a r a ti o n wa s pr e p a r e d so l e l y o n i nfo r ma ti o n, i ncl ud i ng a na l y ti ca l d a ta , pr o v i de d to R F MD b y i ts sup p l i e r s, a nd a pp l i e s to the B i l l o f M a te r i a l s (B OM) r e vi si o n no te d * DIRECTIVE 2002/95/EC OF THE EUROPEAN PARLIAMENT AND OF THE COUNCIL of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment 14 of 14 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A8 DS070730