CMOS, ±5 V/+5 V, 4 Ω, Single SPDT Switches ADG619/ADG620 FEATURES FUNCTIONAL BLOCK DIAGRAM 6.5 Ω (maximum) on resistance 0.8 Ω (maximum) on-resistance flatness 2.7 V to 5.5 V single supply ±2.7 V to ±5.5 V dual supply Rail-to-rail operation 8-lead SOT-23, 8-lead MSOP Typical power consumption (<0.1 μW) TTL-/CMOS-compatible inputs ADG619/ADG620 S2 D S1 NOTES 1. SWITCHES SHOWN FOR A LOGIC 1 INPUT. APPLICATIONS Figure 1. Automatic test equipment Power routing Communication systems Data acquisition systems Sample-and-hold systems Avionics Relay replacement Battery-powered systems GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG619/ADG620 are monolithic, CMOS single-pole double-throw (SPDT) switches. Each switch conducts equally well in both directions when the device is on. 1. 2. 3. 4. 5. The ADG619/ADG620 offer a low on resistance of 4 Ω, which is matched to within 0.7 Ω between channels. These switches also provide low power dissipation, yet result in high switching speeds. The ADG619 exhibits break-before-make switching action, thus preventing momentary shorting when switching channels. The ADG620 exhibits make-before-break action. 02617-001 IN Low on resistance (RON): 4 Ω typical. Dual ±2.7 V to ±5.5 V or single 2.7 V to 5.5 V supplies. Low power dissipation. Fast tON/tOFF. Tiny, 8-lead SOT-23 and 8-lead MSOP. Table 1. Truth Table for the ADG619/ADG620 IN 0 Switch S1 On Switch S2 Off 1 Off On The ADG619/ADG620 are available in an 8-lead SOT-23 and an 8-lead MSOP. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2001–2007 Analog Devices, Inc. All rights reserved. ADG619/ADG620 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................6 Applications....................................................................................... 1 ESD Caution...................................................................................6 Functional Block Diagram .............................................................. 1 Pin Configurations and Function Descriptions ............................7 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................8 Product Highlights ........................................................................... 1 Terminology .................................................................................... 10 Revision History ............................................................................... 2 Test Circuits..................................................................................... 11 Specifications..................................................................................... 3 Outline Dimensions ....................................................................... 13 Dual Supply ................................................................................... 3 Ordering Guide............................................................................... 14 Single Supply ................................................................................. 5 REVISION HISTORY 3/07—Rev. B to Rev. C Changes to Specifications ................................................................ 3 1/06—Rev. A to Rev. B Changes to RON Values in Table 2 ................................................... 2 Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 13 6/03—Rev. 0 to Rev. A. Edits to Specifications ...................................................................... 2 Changes to Ordering Guide ............................................................ 4 Updated Outline Dimensions ......................................................... 8 Rev. C | Page 2 of 16 ADG619/ADG620 SPECIFICATIONS DUAL SUPPLY VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) RON Match Between Channels (ΔRON) On-Resistance Flatness (RFLAT (ON)) +25°C B Version 1 −40°C to +85°C VSS to VDD 4 6.5 0.7 1.1 0.7 1.35 8.5 1.35 0.8 1.4 Unit Test Conditions/Comments V Ω typ Ω max Ω typ Ω max Ω typ Ω max VDD = +4.5 V, VSS = −4.5 V VS = ±4.5 V, IDS = −10 mA; see Figure 15 LEAKAGE CURRENTS ±0.01 Channel On Leakage, ID, IS (On) ±0.25 ±0.01 ±0.25 ±1 ±1 2.4 0.8 0.005 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 ADG619 tON tOFF Break-Before-Make Time Delay, tBBM 2 80 120 45 75 40 155 90 10 ADG620 tON Make-Before-Break Time Delay, tMBB 40 65 200 330 160 Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth −3 dB CS (Off ) CD, CS (On) 110 −67 −67 190 25 95 tOFF VS = ±3.3 V, IDS = −10 mA VDD = +5.5 V, VSS = −5.5 V Source Off Leakage, IS (Off ) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH VS = ±4.5 V, IDS = −10 mA 85 400 10 Rev. C | Page 3 of 16 nA typ VS = ±4.5 V, VD = ∓ 4.5 V; see Figure 16 nA max nA typ nA max VS = VD = ±4.5 V; see Figure 17 V min V max μA typ μA max pF typ VIN = VINL or VINH ns typ ns max ns typ ns max ns typ ns min RL = 300 Ω, CL = 35 pF VS = 3.3 V; see Figure 18 RL = 300 Ω, CL = 35 pF VS = 3.3 V; see Figure 18 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 3.3 V; see Figure 19 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ RL = 300 Ω, CL = 35 pF VS = 3.3 V; see Figure 18 RL = 300 Ω, CL = 35 pF VS = 3.3 V; see Figure 18 RL = 300 Ω, CL = 35 pF VS = 0 V; see Figure 20 VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 21 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 22 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23 RL = 50 Ω, CL = 5 pF; see Figure 24 f = 1 MHz f = 1 MHz ADG619/ADG620 Parameter POWER REQUIREMENTS IDD +25°C B Version 1 −40°C to +85°C 0.001 1.0 ISS 0.001 1.0 1 2 Temperature range for B version is −40°C to +85°C. Guaranteed by design, not subject to production test. Rev. C | Page 4 of 16 Unit μA typ μA max μA typ μA max Test Conditions/Comments VDD = +5.5 V, VSS = −5.5 V Digital inputs = 0 V or 5.5 V Digital inputs = 0 V or 5.5 V ADG619/ADG620 SINGLE SUPPLY VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) RON Match Between Channels (ΔRON) On-Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH +25°C B Version 1 −40°C to +85°C 0 V to VDD 7 10 0.8 1.1 0.5 ±0.01 ±0.25 ±0.01 ±0.25 12.5 1.3 0.5 1.2 ±1 ±1 2.4 0.8 0.005 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 ADG619 tON tOFF Break-Before-Make Time Delay, tBBM 2 120 220 50 75 70 280 110 10 ADG620 tON V Ω typ Ω max Ω typ Ω max Ω typ Ω max VDD = 4.5 V, VSS = 0 V VS = 0 V to 4.5 V, IDS = −10 mA; see Figure 15 nA typ nA max nA typ nA max RL = 300 Ω, CL = 35 pF VS = 3.3 V; see Figure 18 RL = 300 Ω, CL = 35 pF VS = 3.3 V; see Figure 18 RL = 300 Ω, CL = 35 pF VS = 3.3 V; see Figure 20 VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 21 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 22 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23 RL = 50 Ω, CL = 5 pF; see Figure 24 f = 1 MHz f = 1 MHz VDD = 5.5 V Digital inputs = 0 V or 5.5 V Channel-to-Channel Crosstalk −67 dB typ 190 25 95 MHz typ pF typ pF typ 1.0 Temperature range for B version is −40°C to +85°C. Guaranteed by design, not subject to production test. Rev. C | Page 5 of 16 VS = VD = 1 V/4.5 V; see Figure 17 RL = 300 Ω, CL = 35 pF VS = 3.3 V; see Figure 18 RL = 300 Ω, CL = 35 pF VS = 3.3 V; see Figure 18 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 3.3 V; see Figure 19 6 −67 0.001 VDD = 5.5 V VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 16 ns typ ns max ns typ ns max ns typ ns min Charge Injection Off Isolation Bandwidth −3 dB CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD VS = 1.5 V to 3.3 V, IDS = −10 mA VIN = VINL or VINH Make-Before-Break Time Delay, tMBB 420 VS = 0 V to 4.5 V, IDS = −10mA V min V max μA typ μA max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ 110 10 2 Test Conditions/Comments 50 85 210 340 170 tOFF 1 Unit μA typ μA max ADG619/ADG620 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs1 Digital Inputs1 Peak Current, S or D Continuous Current, S or D Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature MSOP θJA Thermal Impedance θJC Thermal Impedance SOT-23 θJA Thermal Impedance θJC Thermal Impedance Lead Temperature, Soldering (10 sec) IR Reflow, Peak Temperature 1 Rating 13 V −0.3 V to +6.5 V +0.3 V to −6.5 V VSS − 0.3 V to VDD + 0.3 V −0.3 V to VDD + 0.3 V or 30 mA (whichever occurs first) 100 mA (pulsed at 1 ms, 10% duty cycle maximum) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at a time. ESD CAUTION 50 mA −40°C to +85°C −65°C to +150°C 150°C 206°C/W 44°C/W 229.6°C/W 91.99°C/W 300°C 220°C Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. Rev. C | Page 6 of 16 ADG619/ADG620 D 1 S1 2 ADG619/ ADG620 8 S2 7 VSS TOP VIEW 6 IN (Not to Scale) VDD 4 5 NC D 1 S1 2 GND 3 VDD 4 02617-002 NC = NO CONNECT GND 3 ADG619/ ADG620 TOP VIEW (Not to Scale) 8 S2 7 VSS 6 IN 5 NC NC = NO CONNECT Figure 2. 8-Lead SOT-23 (RJ-8) 02617-003 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 3. 8-Lead MSOP (RM-8) Table 5. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 Mnemonic D S1 GND VDD NC IN VSS 8 S2 Description Drain Terminal. Can be an input or output. Source Terminal. Can be an input or output. Ground (0 V) Reference. Most Positive Power Supply. No Connect. Not internally connected. Logic Control Input. Most Negative Power Supply. This pin is only used in dual-supply applications and should be tied to ground in single-supply applications. Source Terminal. Can be an input or output. Rev. C | Page 7 of 16 ADG619/ADG620 TYPICAL PERFORMANCE CHARACTERISTICS 10 8 VDD, VSS = ±2.5V 7 9 8 VDD, VSS = ±3V ON RESISTANCE (Ω) ON RESISTANCE (Ω) 6 5 VDD, VSS = ±3.3V 4 VDD, VSS = ±4.5V 3 VDD, VSS = ±5V TA = +85°C 7 6 TA = +25°C 5 TA = –40°C 4 3 2 02617-004 TA = 25°C –5 –4 –3 –2 –1 0 1 VD, VS (V) 2 3 4 1 0 5 TA = 25°C VSS = 0V VDD = 2.7V 16 0.3 VDD = 3.3V 8 VDD = 4.5V 6 VDD = 5V 4 0 1 2 3 4 IS (OFF) 0.1 0 ID, IS (ON) –0.1 –0.2 –0.3 –0.4 02617-005 2 0.2 02617-008 LEAKAGE CURRENTS (nA) 12 10 –0.5 5 0 10 20 VD, VS (V) 6 0.5 0.3 TA = +85°C TA = +25°C TA = –40°C 2 02617-006 1 VDD = +5V VSS = –5V –4 –3 –2 –1 0 1 VD, VS (V) 2 3 80 4 0.2 ID, IS (ON) 0.1 0 IS (OFF) –0.1 –0.2 –0.3 02617-009 LEAKAGE CURRENTS (nA) ON RESISTANCE (Ω) 5 0 –5 70 VDD = 5V VSS = 0V VD = 4.5V/1V VS = 1V/4.5V 0.4 3 30 40 50 60 TEMPERATURE (°C) Figure 8. Leakage Currents vs. Temperature (Dual Supply) Figure 5. On Resistance vs. VD, VS (Single Supply) 4 5 VDD = +5V VSS = –5V VD = ±4.5V VS = 4.5V 0.4 VDD = 3V 14 4 3 2 Figure 7. On Resistance vs. VD, VS for Different Temperatures (Single Supply) 0.5 18 ON RESISTANCE (Ω) 1 0 VD, VS (V) Figure 4. On Resistance vs. VD, VS (Dual Supply) 0 VDD = 5V VSS = 0V ± 0 02617-007 2 1 –0.4 –0.5 5 Figure 6. On Resistance vs. VD, VS for Different Temperatures (Dual Supply) Rev. C | Page 8 of 16 0 10 20 30 40 50 60 TEMPERATURE (°C) 70 80 Figure 9. Leakage Currents vs. Temperature (Single Supply) ADG619/ADG620 TA = 25°C –10 –20 VDD = +5V VSS = –5V 150 ATTENUATION (dB) CHARGE INJECTION (pC) 200 100 VDD = +5V VSS = 0V 0 –5 –4 –3 –2 –1 0 VS (V) 1 2 –40 –50 –60 02617-010 50 –30 3 4 VDD = +5V VSS = –5V TA = 25°C –70 5 –80 0.2 1 10 FREQUENCY (MHz) 02617-013 250 100 Figure 13. Crosstalk vs. Frequency Figure 10. Charge Injection vs. Source Voltage 180 0 160 –2 tON TIME (ns) 100 ATTENUATION (dB) VDD = +5V VSS = –5V 120 80 60 tOFF 40 VDD = +5V VSS = 0V 0 –40 –20 0 20 VDD = +5V VSS = –5V 40 02617-011 20 TEMPERATURE (°C) Figure 11. tON/tOFF Times vs. Temperatures –20 ATTENUATION (dB) –30 –40 –50 –60 –70 VDD = +5V VSS = –5V TA = 25°C 1 10 FREQUENCY (MHz) 02617-012 –80 –100 0.03 –8 –10 1 10 FREQUENCY (MHz) 100 Figure 14. On Response vs. Frequency –10 –90 –6 –12 VDD = +5V VSS = –5V TA = 25°C –14 0.2 80 60 –4 02617-014 VDD = +5V VSS = 0V 140 100 Figure 12. Off Isolation vs. Frequency Rev. C | Page 9 of 16 1000 ADG619/ADG620 TERMINOLOGY IDD Positive supply current. CD, CS (On) On switch capacitance. ISS Negative supply current. tON Delay between applying the digital control input and the output switching on. RON Ohmic resistance between D and S terminals. tOFF Delay between applying the digital control input and the output switching off. ΔRON On resistance match between any two channels. RFLAT (ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. IS (Off) Source leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VD, VS Analog voltage on Terminal D and Terminal S. tMBB On time is measured between the 80% points of both switches, when switching from one address state to another. tBBM Off time or on time is measured between the 90% points of both switches, when switching from one address state to another. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. VINL Maximum input voltage for Logic 0. Crosstalk A measure of unwanted signal coupled through from one channel to another as a result of parasitic capacitance. VINH Minimum input voltage for Logic 1. Off Isolation A measure of unwanted signal coupling through an off switch. IINL, IINH Input current of the digital input. Bandwidth The frequency response of the on switch. CS (Off) Off switch source capacitance. Insertion Loss The loss due to the on resistance of the switch. Rev. C | Page 10 of 16 ADG619/ADG620 TEST CIRCUITS IDS VS Figure 15. On Resistance D ID (OFF) A VD S NC Figure 16. Off Leakage 0.1µF VDD VSS S A Figure 17. On Leakage 0.1µF VDD VSS 50% VIN D IN VS ID (ON) D RL 300Ω GND CL 35pF 50% 90% 90% VOUT VOUT tON tOFF Figure 18. Switching Times S1 VS1 VDD VSS 0.1µF VIN VDD VSS D2 D S2 VS2 IN VIN CL2 35pF RL2 300Ω VOUT VOUT 50% 0V 50% 90% 90% 0V GND tBBM 02617-019 0.1µF tBBM Figure 19. Break-Before-Make Time Delay, tBBM (ADG619 Only) VDD VSS 0.1µF VDD VSS VS1 VD IN VIN VS1 RL2 300Ω GND RL1 300Ω CL2 35pF CL1 35pF VIN 50% 0V 50% VS1 80%V D 80%V D 02617-020 0.1µF VS2 tMBB Figure 20. Make-Before-Break Time Delay, tMBB (ADG620 Only) VS VSS VDD VSS D S VIN VOUT CL 1nF IN GND S2 ΔVOUT VOUT S1 Figure 21. Charge Injection Rev. C | Page 11 of 16 ΔVOUT QINJ = CL × ΔVOUT 02617-021 RS VDD VD 02617-017 RON = V1/IDS S A 02617-018 02617-015 VS IS (OFF) D 02617-016 V1 S ADG619/ADG620 VDD VSS 0.1µF 0.1µF VDD NETWORK ANALYZER VSS S 50Ω 50Ω IN VS D VIN RL 50Ω 02617-022 GND VOUT VOUT VS OFF ISOLATION = 20 log Figure 22. Off Isolation VDD VSS 0.1µF NETWORK ANALYZER VOUT 0.1µF VSS VDD S1 R 50Ω S2 50Ω D R 50Ω IN VS CHANNEL-TO-CHANNEL CROSSTALK = 20 log 02617-023 GND VOUT VS Figure 23. Channel-to-Channel Crosstalk VDD VSS 0.1µF 0.1µF VDD NETWORK ANALYZER VSS S 50Ω IN VS VIN RL 50Ω GND INSERTION LOSS = 20 log VOUT WITH SWITCH VS WITHOUT SWITCH Figure 24. Bandwidth Rev. C | Page 12 of 16 VOUT 02617-024 D ADG619/ADG620 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 5.15 4.90 4.65 5 1 4 PIN 1 0.65 BSC 0.95 0.85 0.75 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.80 0.60 0.40 8° 0° 0.23 0.08 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 25. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 2.90 BSC 8 7 6 5 1 2 3 4 1.60 BSC 2.80 BSC PIN 1 INDICATOR 0.65 BSC 1.95 BSC 1.30 1.15 0.90 1.45 MAX 0.15 MAX 0.38 0.22 0.22 0.08 SEATING PLANE 8° 4° 0° COMPLIANT TO JEDEC STANDARDS MO-178-BA Figure 26. 8-Lead Small Outline Transistor Package [SOT-23] (RJ-8) Dimensions shown in millimeters Rev. C | Page 13 of 16 0.60 0.45 0.30 ADG619/ADG620 ORDERING GUIDE Model Temperature Range Package Description Package Option Branding 1 ADG619BRM ADG619BRM-REEL ADG619BRM-REEL7 ADG619BRMZ 2 ADG619BRMZ-REEL2 ADG619BRMZ-REEL72 ADG619BRT-REEL ADG619BRT-REEL7 ADG619BRT-500RL7 ADG619BRTZ-REEL2 ADG619BRTZ-REEL72 ADG619BRTZ-500RL72 ADG620BRM ADG620BRM-REEL ADG620BRM-REEL7 ADG620BRMZ2 ADG620BRT-REEL ADG620BRT-REEL7 ADG620BRTZ-REEL72 −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RJ-8 RJ-8 RJ-8 RJ-8 RJ-8 RJ-8 RM-8 RM-8 RM-8 RM-8 RJ-8 RJ-8 RJ-8 SVB SVB SVB SCC SCC SCC SVB SVB SVB SCC SCC SCC SWB SWB SWB S21 SWB SWB S21 1 2 Branding on SOT-23 and MSOP is limited to three characters due to space constraints. Z = RoHS Compliant Part. Rev. C | Page 14 of 16 ADG619/ADG620 NOTES Rev. C | Page 15 of 16 ADG619/ADG620 NOTES ©2001–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02617-0-3/07(C) Rev. C | Page 16 of 16