CMOS ±5 V/+5 V, 4 Ω Dual SPST Switches ADG621/ADG622/ADG623 FEATURES FUNCTIONAL BLOCK DIAGRAMS 5.5 Ω (maximum) on resistance 0.9 Ω (maximum) on resistance flatness 2.7 V to 5.5 V single supply ±2.7 V to ±5.5 V dual supply Rail-to-rail operation 10-lead MSOP package Typical power consumption (<0.01 µW) TTL-/CMOS-compatible inputs ADG621 S1 IN1 D1 D2 IN2 02616-001 S2 NOTES 1. SWITCHES SHOWN FOR A LOGIC 0 INPUT APPLICATIONS Figure 1. Automatic test equipment Power routing Communication systems Data acquisition systems Sample-and-hold systems Avionics Relay replacements Battery-powered systems ADG622 S1 IN1 D1 D2 IN2 NOTES 1. SWITCHES SHOWN FOR A LOGIC 0 INPUT GENERAL DESCRIPTION Figure 2. The ADG621/ADG622/ADG623 are monolithic, CMOS, single-pole, single-throw (SPST) switches. Each switch of the ADG621/ADG622/ADG623 conducts equally well in both directions when on. ADG623 S1 IN1 D1 The ADG621/ADG622/ADG623 contain two independent switches. The ADG621 and ADG622 differ only in that both switches are normally open and normally closed. In the ADG623, Switch 1 is normally open, and Switch 2 is normally closed. The ADG623 exhibits break-before-make switching action. The ADG621/ADG622/ADG623 offer low on resistance of 4 Ω, which is matched to within 0.25 Ω between channels. These switches also provide low power dissipation yet give high switching speeds. The ADG621/ADG622/ADG623 are available in a 10-lead MSOP package. 02616-002 S2 D2 IN2 NOTES 1. SWITCHES SHOWN FOR A LOGIC 0 INPUT 02616-003 S2 Figure 3. PRODUCT HIGHLIGHTS 1. Low on resistance, R ON (4 Ω typical). 2. Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V. 3. Low power dissipation; CMOS construction ensures low power dissipation. 4. Tiny 10-lead MSOP package. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registeredtrademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.461.3113 ©2001–2009 Analog Devices, Inc. All rights reserved. ADG621/ADG622/ADG623 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings.............................................................5 Applications ....................................................................................... 1 ESD Caution...................................................................................5 General Description ......................................................................... 1 Pin Configuration and Function Descriptions ..............................6 Functional Block Diagrams ............................................................. 1 Terminology .......................................................................................7 Product Highlights ........................................................................... 1 Typical Performance Characteristics ..............................................8 Revision History ............................................................................... 2 Test Circuits ......................................................................................10 Specifications ..................................................................................... 3 Outline Dimensions ........................................................................12 Dual Supply ................................................................................... 3 Ordering Guide............................................................................12 Single Supply ................................................................................. 4 REVISION HISTORY 11/09—Rev. A to Rev. B Changes to Table 5 ............................................................................ 5 Changes to Ordering Guide .......................................................... 12 6/07—Rev. 0 to Rev. A Change to On Resistance Flatness, RFLAT(ON) Specification (Table 1) ...................................................................... 3 Change to On Resistance Flatness, RFLAT(ON) Specification (Table 2) ...................................................................... 4 Added Table 6.................................................................................... 6 Changes to Terminology Section.................................................... 7 Changes to Figure 13 ........................................................................ 9 Updated Outline Dimensions ....................................................... 12 Changes to Ordering Guide .......................................................... 12 11/01—Revision 0: Initial Version Rev. B | Page 2 of 12 ADG621/ADG622/ADG623 SPECIFICATIONS DUAL SUPPLY1 VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Match Between Channels, ∆RON On Resistance Flatness, RFLAT(ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off) Drain Off Leakage, ID (Off) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH +25°C 4 5.5 0.25 0.35 0.9 −40°C to +85°C Unit Test Conditions/Comments VSS to VDD V Ω typ Ω max Ω typ Ω max Ω typ Ω max VDD = +4.5 V, VSS = −4.5 V VS = ±4.5 V, IS = −10 mA, see Figure 16 7 0.4 0.9 1.5 ±0.01 tOFF Break-Before-Make Time Delay, tBBM (ADG623 Only) 2 VS = ±4.5 V, VD = 4.5 V, see Figure 17 ±0.25 ±0.01 ±0.25 ±1 nA max nA typ nA max VS = VD = ±4.5 V, see Figure 18 V min V max µA typ µA max pF typ VIN = VINL or VINH ±1 2.4 0.8 0.005 2 75 120 45 70 30 155 85 110 −65 −90 230 20 20 70 0.001 0.001 1.0 1 VDD = +5.5 V, VSS = −5.5 V VS = ±4.5 V, VD = 4.5 V, see Figure 17 nA max nA typ 1.0 ISS nA typ ±1 10 Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth −3 dB CS (Off) CD (Off) CD, CS (On) POWER REQUIREMENTS IDD VS = ±3.3 V, IS = −10 mA ±0.25 ±0.01 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 tON VS = ±4.5 V, IS = −10 mA Temperature range is as follows: B version, –40°C to +85°C. Guaranteed by design; not subject to production test. Rev. B | Page 3 of 12 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ pF typ µA typ µA max µA typ µA max RL = 300 Ω, CL = 35 pF; VS = 3.3 V, see Figure 19 RL = 300 Ω, CL = 35 pF; VS = 3.3 V, see Figure 19 RL = 300 Ω, CL = 35 pF; VS1 = VS2 = 3.3 V See Figure 20 VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 21 RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 22 RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 23 RL = 50 Ω, CL = 5 pF, see Figure 24 f = 1 MHz f = 1 MHz f = 1 MHz VDD = 5.5 V, VSS = –5.5 V Digital inputs = 0 V or 5.5 V Digital inputs = 0 V or 5.5 V ADG621/ADG622/ADG623 SINGLE SUPPLY1 VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Match Between Channels, ∆RON On Resistance Flatness, RFLAT(ON) LEAKAGE CURRENTS Source Off Leakage IS (Off) Drain Off Leakage ID (Off) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH +25°C 7 10 0.5 0.75 0.5 –40°C to +85°C Unit Test Conditions/Comments 0 to VDD V Ω typ Ω max Ω typ Ω max Ω typ Ω max VDD = 4.5 V, VSS = 0 V VS = 0 V to 4.5 V, IS = –10 mA, see Figure 16 12.5 1 0.5 1.2 ±0.01 ±0.25 ±0.01 ±0.25 ±0.01 ±0.25 ±1 ±1 ±1 2.4 0.8 0.005 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 tON tOFF Break-Before-Make Time Delay, tBBM (ADG623 Only) 2 120 210 50 75 70 260 100 10 Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth −3 dB CS (Off) CD (Off) CD, CS (On) POWER REQUIREMENTS IDD 6 –65 –90 230 20 20 70 0.001 1.0 1 2 Temperature range is as follows: B Version, –40°C to +85°C. Guaranteed by design; not subject to production test. Rev. B | Page 4 of 12 nA typ nA max nA typ nA max nA typ nA max V min V max µA typ µA max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ pF typ µA typ µA max VS = 0 V to 4.5 V, IS = −10 mA VS = 1.5 V to 3.3 V, IS = −10 mA VDD = 5.5 V VS = 1 V/4.5 V, VD = 4.5 V/1 V, see Figure 17 VS = 1 V/4.5 V, VD = 4.5 V/1 V, see Figure 17 VS = VD = 1 V/4.5 V, see Figure 18 VIN = VINL or VINH RL = 300 Ω, CL = 35 pF; VS = 3.3 V, see Figure 19 RL = 300 Ω, CL = 35 pF; VS = 3.3 V, see Figure 19 RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.3 V See Figure 20 VS = 0 V; RS = 0 Ω, CL = 1 nF, see Figure 21 RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 22 RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 23 RL = 50 Ω, CL = 5 pF, see Figure 24 f = 1 MHz f = 1 MHz f = 1 MHz VDD = 5.5 V Digital Inputs = 0 V or 5.5 V ADG621/ADG622/ADG623 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D Continuous Current, S or D Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature MSOP Package θJA Thermal Impedance θJC Thermal Impedance Lead Soldering Lead Temperature, Soldering (10 sec) IR Reflow, Peak Temperature Pb-Free Soldering Reflow, Peak Temperature Time at Peak Temperature 1 Rating 13 V −0.3 V to +6.5 V +0.3 V to –6.5 V VSS – 0.3 V to VDD + 0.3 V –0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 100 mA (pulsed at 1 ms, 10% duty cycle maximum) 50 mA –40°C to +85°C –65°C to +150°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. Table 4. ADG621/ADG622 Truth Table ADG621 INx ADG622 INx Switch Sx Condition 0 1 Off 1 0 On 300°C Table 5. ADG623 Truth Table IN1 IN2 Switch S1 0 0 Off 0 1 Off 1 0 On 1 1 On 220°C ESD CAUTION 206°C/W 44°C/W 260(+0/−5)°C 20 sec to 40 sec Overvoltages at INx, S, or D must be clamped by internal diodes. Currents should be limited to the maximum ratings given. Rev. B | Page 5 of 12 Switch S2 On Off On Off ADG621/ADG622/ADG623 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IN2 3 GND 4 VSS 5 ADG621/ ADG622/ ADG623 TOP VIEW (Not to Scale) 10 VDD 9 IN1 8 D2 7 S2 6 NC NC = NO CONNECT 02616-004 S1 1 D1 2 Figure 4. 10-Lead MSOP (RM-10) Table 6. Pin Function Descriptions Pin No. 1, 7 2, 8 3, 9 4 5 Mnemonic S1, S2 D1, D2 IN2, IN1 GND VSS 6 10 NC VDD Description Source Terminal. May be an input or an output. Drain Terminal. May be an input or an output. Control Input. Ground (0 V) Reference. Most Negative Power Supply in a Dual-Supply Application. In single-supply applications, this should be tied to ground at the device. No Connect. Most Positive Power Supply Potential. Rev. B | Page 6 of 12 ADG621/ADG622/ADG623 TERMINOLOGY IDD Positive supply current. CIN Digital input capacitance. ISS tON Delay time between the 50% and the 90% points of the digital input and switch on condition. Negative supply current VD (VS) Analog voltage on Terminal D and Terminal S. tOFF Delay time between the 50% and the 90% points of the digital input and switch off condition. RON Ohmic resistance between Terminal D and Terminal S. RFLAT (ON) On resistance flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. ∆RON On resistance match between any two channels. IS (Off) Source leakage current with the switch off. ID (Off) Drain leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. CS (Off) Off switch source capacitance. Measured with reference to ground. tBBM On or off time measured between the 90% points of both switches when switching from one address state to another. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during on-off switching. Off Isolation A measure of an unwanted signal coupling through an off switch. Crosstalk A measure of an unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. −3 dB Bandwidth The frequency at which the output is attenuated by 3 dB. On Response The frequency response of the on switch. Insertion Loss The attenuation between the input and output ports of the switch when the switch is in the on condition and is due to the on resistance of the switch. CD (Off) Off switch drain capacitance. Measured with reference to ground. CD, CS (On) On switch capacitance. Measured with reference to ground. Rev. B | Page 7 of 12 ADG621/ADG622/ADG623 TYPICAL PERFORMANCE CHARACTERISTICS 8 10 TA = 25°C VDD = 5V VSS = 0V 9 VDD, VSS = ±2.5V 7 8 VDD, VSS = ±3V ON RESISTANCE (Ω) ON RESISTANCE (Ω) 6 5 VDD, VSS = ±3.3V 4 VDD, VSS = ±4.5V 3 VDD, VSS = ±5V TA = +85°C 7 TA = +25°C 6 TA = –40°C 5 4 3 2 02616-005 0 –5 –4 –3 –2 –1 0 1 VD, VS (V) 2 3 4 1 0 5 1 2 5 0.4 16 0.3 12 VDD = 3.3V VDD = 4.5V 8 VDD = 5V 02616-006 1 2 3 4 IS (OFF) 0.1 0 ID, IS (ON) –0.1 5 20 VD, VS (V) Figure 6. On Resistance vs. VD, VS (Single Supply) ID (OFF) –0.2 –0.3 VDD = +5V VSS = 0V –0.4 VD = ±4.5V VS = ±4.5V –0.5 0 10 4 0 0.2 02616-009 LEAKAGE CURRENT (nA) VDD = 3V 30 40 50 60 TEMPERATURE (°C) 70 80 Figure 9. Leakage Current vs. Temperature (Dual Supply) 6 0.5 VDD = +5V VSS = –5V 0.4 5 TA = +85°C 4 TA = +25°C 3 TA = –40°C 2 1 –5 –4 –3 –2 –1 0 1 VD, VS (V) 2 3 4 5 Figure 7. On Resistance vs. VD, VS for Different Temperatures (Dual Supply) 0.2 IS (OFF) 0.1 0 –0.1 ID, IS (ON) ID (OFF) –0.2 –0.3 VDD = 5V VSS = 0V –0.4 VD = 4.5V/1V VS = 1V/4.5V –0.5 0 10 20 02616-010 LEAKAGE CURRENT (nA) 0.3 02616-007 ON RESISTANCE (Ω) 4 0.5 TA = 25°C VSS = 0V VDD = 2.7V 0 3 Figure 8. On Resistance vs. VD, VS for Different Temperature (Single Supply) 20 ON RESISTANCE (Ω) 0 VD, VS (V) Figure 5. On Resistance vs. VD, VS (Dual Supply) 0 02616-008 2 1 30 40 50 60 TEMPERATURE (°C) 70 80 Figure 10. Leakage Current vs. Temperature (Single Supply) Rev. B | Page 8 of 12 ADG621/ADG622/ADG623 250 0 TA = 25°C –10 –20 VDD = +5V VSS = –5V ATTENUATION (dB) 150 100 VDD = +5V VSS = 0V –3 –2 –1 0 VS 1 2 –50 –60 3 –80 –90 0.2 5 4 Figure 11. Charge Injection vs. Source Voltage –2 140 80 60 tOFF 100 VDD = +5V VSS = 0V 20 –20 0 VDD = +5V VSS = –5V 20 40 TEMPERATURE (°C) 60 80 Figure 12. tON/tOFF Times vs. Temperature –4 –6 –8 –10 –20 –30 –40 –50 –60 VDD = +5V VSS = –5V TA = 25°C 10 FREQUENCY (MHz) 02616-013 –70 –80 –12 –14 0.2 1 10 FREQUENCY (MHz) 100 Figure 15. On Response vs. Frequency 0 1 VDD = +5V VSS = –5V TA = 25°C –10 40 02616-012 TIME (ns) VDD = +5V VSS = –5V tON 100 ATTENUATION (dB) VDD = +5V VSS = 0V 120 ATTENUATION (dB) 10 FREQUENCY (MHz) 0 160 –90 0.2 1 Figure 14. Crosstalk vs. Frequency 180 0 –40 02616-014 02616-011 –4 –40 –70 50 0 –5 –30 02616-015 CHARGE INJECTION (pC) 200 VDD = +5V VSS = –5V TA = 25°C 100 Figure 13. Off Isolation vs. Frequency Rev. B | Page 9 of 12 1k ADG621/ADG622/ADG623 TEST CIRCUITS IDS V1 A D Figure 18. On Leakage VSS VDD 0.1µF ADG621 VDD VSS S 50% 50% 50% 50% VIN VOUT D VIN ADG622 RL 300Ω IN CL 35pF 90% 90% GND tON tOFF 02616-019 VOUT Figure 19. Switching Times (tON, tOFF) VDD VSS 0.1µF 0.1µF VS2 D1 S2 D2 IN1, IN2 VOUT2 RL2 300Ω VIN 50% 0V VOUT1 RL1 300Ω VOUT1 CL1 35pF 50% 90% 90% 0V CL2 35pF GND VOUT2 90% 90% 0V tBBM tBBM Figure 20. Break-Before-Make Time Delay, tBBM (ADG623 Only) RS VDD VSS VDD VSS S D SW ON VOUT SW OFF VIN CL 1nF VS IN VOUT QINJ = CL × ΔVOUT GND Figure 21. Charge Injection Rev. B | Page 10 of 12 ΔVOUT 02616-021 VS1 VIN VSS 02616-020 VDD S1 A NC = NO CONNECT Figure 17. Off Leakage 0.1µF VS D VD 02616-017 VD Figure 16. On Resistance S NC A VS 02616-016 RON = V1/IDS VS S 02616-018 D ID (ON) ID (OFF) IS (OFF) S ADG621/ADG622/ADG623 VDD VSS 0.1µF 0.1µF VDD NETWORK ANALYZER VSS S 50Ω 50Ω IN VS D VIN RL 50Ω OFF ISOLATION = 20 LOG 02616-022 GND VOUT VOUT VS Figure 22. Off Isolation VDD VSS 0.1µF NETWORK ANALYZER 0.1µF VDD VOUT RL 50Ω VSS D1 S1 S2 D2 R 50Ω 50Ω R 50Ω IN VS CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG 02616-023 GND VOUT VS Figure 23. Channel-to-Channel Crosstalk VDD VSS 0.1µF 0.1µF VDD NETWORK ANALYZER VSS S 50Ω IN VS D RL 50Ω GND INSERTION LOSS = 20 LOG VOUT VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 24. Bandwidth Rev. B | Page 11 of 12 02616-024 VIN ADG621/ADG622/ADG623 OUTLINE DIMENSIONS 3.10 3.00 2.90 10 3.10 3.00 2.90 5.15 4.90 4.65 6 1 5 PIN 1 IDENTIFIER 0.50 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 0.30 0.15 6° 0° 0.23 0.13 0.70 0.55 0.40 COMPLIANT TO JEDEC STANDARDS MO-187-BA 091709-A 0.15 0.05 COPLANARITY 0.10 Figure 25. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters ORDERING GUIDE Model ADG621BRM ADG621BRM–REEL7 ADG621BRMZ 1 ADG621BRMZ-REEL1 ADG622BRM ADG622BRM-REEL ADG622BRM-REEL7 ADG622BRMZ1 ADG622BRMZ-REEL1 ADG622BRMZ-REEL71 ADG623BRM ADG623BRM-REEL ADG623BRM-REEL7 ADG623BRMZ1 ADG623BRMZ-REEL1 ADG623BRMZ-REEL71 1 Temperature Range –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C Package Description 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] Z= RoHS Compliant Part, # denotes RoHS compliant product and may be top or bottom marked. ©2001–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02616-0-11/09(B) Rev. B | Page 12 of 12 Package Option RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 Branding SXB SXB SXB# SXB# SYB SYB SYB S12 S12 S12 SZB SZB SZB SZB# SZB# SZB#