LINER LTC4011EFE

Electrical Specifications Subject to Change
LTC4011
High Efficiency Standalone
Nickel Battery Charger
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FEATURES
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DESCRIPTIO
Complete NiMH/NiCd Charger for 1 to 16 Cells
No Microcontroller or Firmware Required
550kHz Synchronous PWM Current Source Controller
No Audible Noise with Ceramic Capacitors
PowerPathTM Control Support
Programmable Charge Current: 5% Accuracy
Wide Input Voltage Range: 4.5V to 34V
Automatic Trickle Precharge
–∆V Fast Charge Termination
Optional ∆T/∆t Fast Charge Termination
Automatic NiMH Top-Off Charge
Programmable Timer
Automatic Recharge
Multiple Status Outputs
Micropower Shutdown
20-Lead Thermally Enhanced TSSOP Package
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APPLICATIO S
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Integrated or Standalone Battery Charger
Portable Instruments or Consumer Products
Battery-Powered Diagnostics and Control
Back-Up Battery Management
The LTC®4011 provides a complete, cost-effective nickel
battery fast charge solution in a small package using few
external components. A 550kHz PWM current source
controller and all necessary charge initiation, monitoring
and termination control circuitry are included.
The LTC4011 automatically senses the presence of a DC
adapter and battery insertion or removal. Heavily discharged batteries are precharged with a trickle current.
The LTC4011 can simultaneously use both –∆V and ∆T/∆t
fast charge termination techniques and can detect various
battery faults. If necessary, a top-off charge is automatically applied to NiMH batteries after fast charging is
completed. The IC will also resume charging if the battery
self-discharges after a full charge cycle.
All LTC4011 charging operations are qualified by actual
charge time and maximum average cell voltage. Charging
may also be gated by minimum and maximum temperature limits. NiMH or NiCd fast charge termination parameters are pin-selectable.
Integrated PowerPath control support ensures that the
system remains powered at all times without allowing load
transients to adversely affect charge termination.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
PowerPath is a trademark of Linear Technology Corporation.
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TYPICAL APPLICATIO
2A NiMH Battery Charger
TO
SYSTEM
10µF LOAD
3k
49.9k
10µH
0.05Ω
BAT
GND
VCDIV
CHEM
VCELL
VRT
INTVDD VTEMP
0.1µF
1.60
42
1.55
40
BGATE
PGND
LTC4011
DCIN
SENSE
TIMER
20k
Typical NiMH Charge Cycle at 1C
VCC
TGATE
10k
0.033µF
10µF
10k
1.50
38
SINGLE CELL
VOLTAGE
1.45
1.40
1.35
CHARGE
CURRRENT
1.30
0.068µF
30.9k
10.7k
2-CELL
NiMH PACK
WITH 10k NTC
(2AHr)
36
BATTERY
TEMPERATURE
34
2A
32
1A
TOP OFF
30
1.25
0
20
60
40
TIME (MINUTES)
80
BATTERY TEMPERATURE (°C)
INFET
FAULT
CHRG
TOC
READY
CELL VOLTAGE (V)
FROM
ADAPTER
4.5V TO 34V
28
100
4011 TA01b
4011 TA01a
4011p
1
LTC4011
W
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
VCC (Input Supply) to GND ....................... –0.3V to 40V
DCIN to GND ............................................ –0.3V to 40V
FAULT, CHRG, VCELL, VCDIV, BAT, TOC
or READY to GND .......................... –0.3V to VCC + 0.3V
SENSE to BAT ...................................................... ±0.3V
CHEM, VTEMP or TIMER to GND .............. –0.3V to 3.5V
PGND to GND ...................................................... ±0.3V
Operating Ambient Temperature Range
(Note 2) .................................................. – 40°C to 85°C
Operating Junction Temperature (Note 3) ........... 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
TOP VIEW
DCIN
1
20 INFET
FAULT
2
19 READY
CHRG
3
18 VCC
CHEM
4
17 TGATE
GND
5
LTC4011EFE
16 PGND
21
VRT
6
15 BGATE
VTEMP
7
14 INTVDD
VCELL
8
13 TOC
VCDIV
9
12 BAT
TIMER 10
11 SENSE
FE PACKAGE
20-LEAD PLASTIC TSSOP
TJMAX = 125°C, θJA = 38°C/W
EXPOSED PAD (PIN 21) IS GND. MUST BE SOLDERED TO
PCB TO OBTAIN SPECIFIED THERMAL RESISTANCE
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC Supply
●
VCC
Input Voltage Range
4.5
34
V
ISHDN
Shutdown Quiescent Current (Note 5)
VCC = BAT = 4.8V
IQ
Quiescent Current
Waiting to Charge (Pause)
●
ICC
Operating Current
Fast Charge State, No Gate Load
●
VUVLO
Undervoltage Threshold Voltage
VCC Increasing
●
3.95
VUV(HYST)
Undervoltage Hysteresis Voltage
VSHDNI
Shutdown Threshold Voltage
DCIN – VCC, DCIN Increasing
●
20
30
42
VSHDND
Shutdown Threshold Voltage
DCIN – VCC, DCIN Decreasing
●
–45
–25
–15
mV
VCE
Charge Enable Threshold Voltage
VCC – BAT, VCC Increasing
●
400
510
600
mV
VDD
Output Voltage
No Load
●
4.5
5
5.5
V
IDD
Short-Circuit Current (Note 6)
INTVDD = 0V
●
–100
–50
–28
mA
INTVDD(MIN)
Output Voltage
VCC = 4.5V, IDD = –10mA
●
3.85
●
3.125
3.05
VRT = 0V
●
–9
5
10
µA
3
5
mA
5
9
mA
4.2
4.45
170
V
mV
mV
INTVDD Regulator
V
Thermistor Termination
VRT
Output Voltage
IRT
Short-Circuit Current
RL = 10k
3.3
3.475
3.55
V
V
–1
mA
PWM Current Source
VFS
BAT – SENSE Full-Scale Regulation
Voltage (Fast Charge)
0.3V < BAT < VCC – 0.3V (Note 5)
BAT = 4.8V
●
95
95
100
100
105
105
mV
mV
VPC
BAT – SENSE Precharge Regulation
Voltage
0.3V < BAT < VCC – 0.3V (Note 5)
BAT = 4.8V
●
16
16
20
20
24
24
mV
mV
4011p
2
LTC4011
ELECTRICAL CHARACTERISTICS
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VTC
BAT – SENSE Top-Off Charge
Regulation Voltage
0.3V < BAT < VCC – 0.3V (Note 5)
BAT = 4.8V
∆VLI
BAT – SENSE Line Regulation
5.5V < VCC < 34V, Fast Charge
IBAT
BAT Input Bias Current
0.3V < BAT < VCC – 0.1V
ISENSE
SENSE Input Bias Current
SENSE = BAT
IOFF
Input Bias Current
SENSE or BAT, VCELL = 0V
fTYP
fMIN
DCMAX
Maximum Duty Cycle
VOL(TG)
TGATE Output Voltage Low
(VCC – TGATE, Note 7)
VCC > 9V, No Load
VCC < 7.5V, No Load
●
●
VOH(TG)
TGATE Output Voltage High
VCC – TGATE, No Load
●
tR(TG)
TGATE Rise Time
tF(TG)
TGATE Fall Time
VOL(BG)
BGATE Output Voltage Low
No Load
●
VOH(BG)
BGATE Output Voltage High
No Load
●
tR(BG)
BGATE Rise Time
CLOAD = 1.6nF, 10% to 90%
35
65
ns
tF(BG)
BGATE Fall Time
CLOAD = 1.6nF, 10% to 90%
15
65
ns
Analog Channel Leakage
0V < VCELL < 2V, 550mV < VTEMP < 2V
●
MIN
TYP
MAX
UNITS
6.5
6.5
10
10
13.5
13.5
mV
mV
mV
±0.3
–2
2
mA
50
150
µA
●
–1
0
1
µA
Typical Switching Frequency
●
460
550
615
kHz
Minimum Switching Frequency
●
20
30
kHz
98
99
5
5.6
VCC
8.75
0
50
mV
CLOAD = 3nF, 10% to 90%
35
100
ns
CLOAD = 3nF, 10% to 90%
45
100
ns
0
50
mV
VCC –
0.5
INTVDD
– 0.075
%
INTVDD
V
V
V
ADC Inputs
ILEAK
nA
±100
Charger Thresholds
VBP
Battery Present Threshold Voltage
●
320
350
370
mV
VBOV
Battery Overvoltage
●
1.85
1.95
2.05
V
VMFC
Minimum Fast Charge Voltage
●
850
900
950
mV
VFCBF
Fast Charge Battery Fault Voltage
●
1.17
1.22
1.27
V
∆VTERM
–∆V Termination
CHEM = 3.3V (NiCd)
CHEM = 0V (NiMH)
●
●
16
6
20
10
25
14
VAR
Automatic Recharge Voltage
VCELL Decreasing
●
1.275
1.325
1.375
∆TTERM
∆T Termination (Note 8)
CHEM = 3.3 (NiCd)
CHEM = 0V (NiMH)
●
●
1.3
0.5
2
1
2.7
1.5
°C/min
°C/min
TMIN
Minimum Charging Temperature
(Note 8)
VTEMP Increasing
●
0.5
5
8.5
°C
TMAXI
Maximum Charge Initiation
Temperature (Note 8)
VTEMP Decreasing, Not Charging
●
41.5
45
47
°C
TMAXC
Maximum Fast Charge Temperature
(Note 8)
VTEMP Decreasing, Fast Charge
●
57
60
63
°C
VTEMP(D)
VTEMP Disable Threshold Voltage
●
2.8
3.3
V
VTEMP(P)
Pause Threshold Voltage
●
130
280
mV
∆tTIMER
Internal Time Base Error
●
–10
10
%
∆tMAX
Programmable Timer Error
●
–20
20
%
mV
mV
V
Charger Timing
RTIMER = 49.9k
4011p
3
LTC4011
ELECTRICAL CHARACTERISTICS
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
mV
PowerPath Control
VFR
INFET Forward Regulator Voltage
DCIN – VCC
●
30
55
100
VOL(INFET)
Output Voltage Low
VCC – INFET, No Load
●
3.75
5.2
7
V
VOH(INFET)
Output Voltage High
VCC – INFET, No Load
●
0
50
mV
tOFF(INFET)
INFET OFF Delay Time
CLOAD = 10nF, INFET to 50%
3
15
µs
435
300
700
600
mV
mV
Status and Chemistry Select
VOL
Output Voltage Low (ILOAD = 10mA)
VCDIV
All Other Status Outputs
●
●
ILKG
Output Leakage Current
All Status Outputs Inactive, VOUT = VCC
●
–10
10
µA
IIH(VCDIV)
Input Current High
VCDIV = VBAT (Shutdown)
●
–1
1
µA
VIL
Input Voltage Low
CHEM (NiMH)
●
900
mV
VIH
Input Voltage High
CHEM (NiCd)
●
2.85
IIL
Input Current Low
CHEM = GND
●
–20
–5
µA
IIH
Input Current High
CHEM = 3.3V
●
–20
20
µA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: The LTC4011E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the – 40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Operating junction temperature TJ (in °C) is calculated from the
ambient temperature TA and the total continuous package power
dissipation PD (in watts) by the formula:
TJ = TA + θJA • PD
Refer to the Applications Information section for details. This IC includes
overtemperature protection that is intended to protect the device during
momentary overload conditions. Junction temperature will exceed 125°C
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may result in
device degradation or failure.
V
Note 4: All current into device pins is positive. All current out of device
pins is negative. All voltages are referenced to GND, unless otherwise
specified.
Note 5: These limits are guaranteed by correlation to wafer level
measurements.
Note 6: Output current may be limited by internal power dissipation. Refer
to the Applications Information section for details.
Note 7: Either TGATE VOH may apply for 7.5V < VCC < 9V.
Note 8: These limits apply specifically to the thermistor network shown in
Figure 5 in the Applications Information section with the values specified
for a 10k NTC (β of 3750). Limits are then guaranteed by specific VTEMP
voltage measurements during test.
4011p
4
LTC4011
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TYPICAL PERFOR A CE CHARACTERISTICS
PowerPath Switching
NiCd Charge at 1C
4
VCC
INFET
DCIN
0
1.60
34
1.70
1.55
1.50
30
1.45
28
BATTERY
TEMPERATURE
1.40
1A
1.30
4011 G09
20
0
45
1.55
35
BATTERY
TEMPERATURE
1.50
1.45
1.40
60
22
80
1.35
1.45
30
25
CHARGE CURRENT
15
20 40 60 80 100 120 140 160 180 200
TIME (MINUTES)
85
80
75
40
30
TIME (MINUTES)
FAST CHARGE
–4
VCC = 12V
BAT = 4.8V
–6
–8
PRECHARGE
–10
–12
60
0
2
4
0
6 8 10 12 14 16 18 20
BATTERY VOLTAGE (V)
10
20
30
TEMPERATURE (°C)
4011 G05
Fast Charge Current Line
Regulation
10
Fast Charge Current Output
Regulation
3
3
BAT = 4.8V
1
0
AMPS (A)
2
FAST CHARGE CURRENT
CURRENT ERROR (%)
BGATE
0
CURRENT ERROR (%)
TGATE
1
50°C
0
25°C
–1
0°C
1
50°C
0
25°C
–1
0°C
–2
–2
–3
VCC = 20V
2
2
5
50
40
4011 G04
Charger Soft-Start
4011 G06
20
–2
4011 G03
200µs/DIV
1A
Charge Current Accuracy
65
TOP OFF
PRECHARGE CURRENT
25
20
0
70
20
0.5A
2A
4011 G02
90
EFFICIENCY (%)
35
BATTERY
TEMPERATURE
1A
30
15
10
0
95
40
1.45
40
3A
CHARGE CURRENT
24
100
BATTERY TEMPEATURE (°C)
SINGLE CELL VOLTAGE (V)
40
1.60
CURRENT ERROR (%)
4 SERIES NimH 2100mAHr
AA CELLS CHARGED AT 0.5C
1.50
VOLTAGE (V)
45
4011 G01
SINGLE CELL
VOLTAGE
5
1.65
Charger Efficiency at DCIN = 20V,
IOUT = 2A
1.55
0
50
SINGLE CELL
VOLTAGE
TIME (MINUTES)
NiMH Charge at 0.5C
1.30
55
4 SERIES NiCd 1300mAhr
SC CELLS CHARGED AT 2C
CHARGE CURRENT
DC674A WITH 1kΩ SYSTEM LOAD AND 20kΩ
DCIN SHUNT, CHARGER PAUSED
1.40
26
1.35
100µs/DIV
1.60
32
SINGLE CELL
VOLTAGE
SINGLE CELL VOLTAGE (V)
CELL VOLTAGE (V)
DCIN OPEN
1.75
BATTERY TEMPERATURE (°C)
8
36
BATTERY TEMPERATURE (°C)
VOLTAGE (V)
12
4 Series NiCd 1300mAhr
1.65
–3
6
10
14
18
VCC (V)
22
26
30
4011 G07
0
4
8
BAT (V)
12
16
4011 G08
4011p
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LTC4011
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PI FU CTIO S
DCIN (Pin 1): DC Power Sense Input. The LTC4011 senses
voltage on this pin to determine when an external DC
power source is present. This input should be isolated
from VCC by a blocking diode or PowerPath FET. Refer to
the Applications Information section for complete details.
Operating voltage range is GND to 34V.
FAULT (Pin 2): Active-Low Fault Indicator Output. The
LTC4011 indicates various battery and internal fault conditions by connecting this pin to GND. Refer to the Operation and Applications Information sections for further
details. This output is capable of driving an LED and should
be left floating if not used. FAULT is an open-drain output
to GND with an operating voltage range of GND to VCC.
CHRG (Pin 3): Active-Low Charge Indicator Output. The
LTC4011 indicates it is providing charge to the battery by
connecting this pin to GND. Refer to the Operation and
Applications Information sections for further details. This
output is capable of driving an LED and should be left
floating if not used. CHRG is an open-drain output to GND
with an operating voltage range of GND to VCC.
CHEM (Pin 4): Battery Chemistry Selection Input. This pin
should be wired to GND to select NiMH fast charge
termination parameters. If a voltage greater than 2.85V is
applied to this pin, or it is left floating, NiCd parameters are
used. Refer to the Applications Information section for
further details. Operating voltage range is GND to 3.3V.
GND (Pin 5): Ground. This pin provides a single-point
ground for internal references and other critical analog
circuits.
VRT (Pin 6): Thermistor Network Termination Output. The
LTC4011 provides 3.3V on this pin to drive an external
thermistor network connected between VRT, VTEMP and
GND. Additional power should not be drawn from this pin
by the host application.
VTEMP (Pin 7): Battery Temperature Input. An external
thermistor network may be connected to VTEMP to provide temperature-based charge qualification and additional fast charge termination control. Charging may also
be paused by connecting the VTEMP pin to GND. Refer to
the Operation and Applications Information sections for
complete details on external thermistor networks and
charge control. If this pin is not used it should be wired
to VRT. Operating voltage range is GND to 3.3V.
VCELL (Pin 8): Average Single-Cell Voltage Input. An
external voltage divider between BAT and VCDIV is attached
to this pin to monitor the average single-cell voltage of the
battery pack. The LTC4011 uses this information to protect against catastrophic battery overvoltage and to control the charging state. Refer to the Applications Information
section for further details on the external divider network.
Operating voltage range is GND to BAT.
VCDIV (Pin 9): Average Cell Voltage Resistor Divider Termination. The LTC4011 connects this pin to GND provided
the charger is not in shutdown. VCDIV is an open-drain
output to GND with an operating voltage range of GND to
BAT.
TIMER (Pin 10): Charge Timer Input. A resistor connected
between TIMER and GND programs charge cycle timing
limits. Refer to the Applications Information section for
complete details. Operating voltage range is GND to 1V.
SENSE (Pin 11): Charge Current Sense Input. An external
resistor between this input and BAT is used to program
charge current. Refer to the Applications Information
section for complete details on programming charge
current. Operating voltage ranges from (BAT – 50mV) to
(BAT + 200mV).
BAT (Pin 12): Battery Pack Connection. The LTC4011 uses
the voltage on this pin to control current sourced from VCC
to the battery during charging. Allowable operating voltage range is GND to VCC.
TOC (Pin 13): Active-Low Top-Off Charge Indicator Output. The LTC4011 indicates the top-off charge state for
NiMH batteries by connecting this pin to GND. Refer to the
Operation and Applications Information sections for further details. This output is capable of driving an LED and
should be left floating if not used. TOC is an open-drain
output to GND with an operating voltage range of GND to
VCC.
4011p
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LTC4011
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PI FU CTIO S
INTVDD (Pin 14): Internal 5V Regulator Output. This pin
provides a means of bypassing the internal 5V regulator
used to power the BGATE output driver. Typically, power
should not be drawn from this pin by the application
circuit. Refer to the Application Information section for
additional details.
BGATE (Pin 15): External Synchronous N-channel MOSFET
Gate Control Output. This output provides gate drive to an
optional external NMOS power transistor switch used for
synchronous rectification to increase efficiency in the
step-down DC/DC converter. Operating voltage is GND to
INTVDD. BGATE should be left floating if not used.
PGND (Pin 16): Power Ground. This pin provides a return
for switching currents generated by internal LTC4011
circuits. Externally, PGND and GND should be wired
together using a very low impedance connection. Refer to
PCB Layout Considerations in the Applications Information section for additional grounding details.
TGATE (Pin 17): External P-channel MOSFET Gate Control
Output. This output provides gate drive to an external
PMOS power transistor switch used in the DC/DC converter. Operating voltage range varies as a function of VCC.
Refer to the Electrical Characteristics table for specific
voltages.
VCC (Pin 18): Power Input. External PowerPath control
circuits normally connect either the DC input power supply
or the battery to this pin. Refer to the Applications Information section for further details. Suggested applied
voltage range is GND to 34V.
READY (Pin 19): Active-Low Ready-to-Charge Output.
The LTC4011 connects this pin to GND if proper operating
voltages for charging are present. Refer to the Operation
section for complete details on charge qualification. This
output is capable of driving an LED and should be left
floating if not used. READY is an open-drain output to GND
with an operating voltage range of GND to VCC.
INFET (Pin 20): PowerPath Control Output. For very low
dropout applications, this output may be used to drive the
gate of an input PMOS pass transistor connected between
the DC input (DCIN) and the raw system supply rail (VCC).
INFET is internally clamped about 6V below VCC. Maximum operating voltage is VCC. INFET should be left
floating if not used.
Exposed Pad (Pin 21): This pin provides enhanced
thermal properties for the TSSOP. It must be soldered to
the PCB copper ground to obtain optimum thermal
performance.
4011p
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LTC4011
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BLOCK DIAGRA
1
2
3
4
7
8
FET DIODE
FAULT
READY
CHRG
VCC
UVLO AND
SHUTDOWN
CHEM
5 GND
6
INFET
DCIN
TGATE
THERMISTOR
INTERFACE
PGND
VRT
VTEMP
VCELL
A/D
CONVERTER
CHARGER
STATE
CONTROL
LOGIC
BGATE
PWM
BAT
SENSE
20
19
18
17
16
15
12
11
BATTERY
DETECTOR
9
10
VCDIV
TIMER
INTVDD
VOLTAGE
REGULATOR
TOC
CHARGE
TIMER
VOLTAGE
REFERENCE
14
13
INTERNAL
VOLTAGE
REGULATOR
4011 BD
4011p
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LTC4011
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OPERATIO
SHUTDOWN
NO DC ADAPTER
DC ADAPTER PRESENT
NO BATTERY
OR
VCC < 4.25V
CHARGE
QUALIFICATION
VCELL > 350mV, ADEQUATE VCC,
CHARGER ENABLED AND
TEMPERATURE OK (OPTIONAL)
CHECK
BATTERY
VCELL < 900mV
PRECHARGE**
(C/5 FOR
tMAX/12)
0mV
V CELL
VCELL > 900mV
NiMH
∆T/∆t
TOP-OFF
CHARGE**
(C/10)
FAST CHARGE**
(1C)
> 90
VCELL < 1.22V AT tMAX*/12
OR TIME = tMAX
NiCd OR
NiMH – ∆V
tMAX/3
VCELL < 900mV
VCELL < 1.325V
AUTOMATIC
RECHARGE
FAULT
VCELL > 1.95V
OR PWM FAULTS
4011 F01
*tMAX IS PROGRAMMED MAXIMUM FAST CHARGE DURATION
**OPTIONAL TEMPERATURE LIMITS APPLY
Figure 1. LTC4011 State Diagram
4011p
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LTC4011
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OPERATIO
(Refer to Figure 1)
Shutdown State
The LTC4011 remains in micropower shutdown until
DCIN (Pin 1) is driven above VCC (Pin 8). In shutdown all
status and PWM outputs and internally generated terminations or supply voltages are inactive. Current consumption from VCC and BAT is reduced to a very low level.
internal thermal limit, charging is suspended, the charge
timer is paused and the LTC4011 indicates a fault condition. Normal charging resumes from the previous state
when the sensed temperature returns to a satisfactory
range. In addition, other battery faults are detected during
specific charging states as described below.
Charge Qualification State
Precharge State
Once DCIN is greater than VCC, the LTC4011 exits micropower shutdown, enables its own internal supplies,
provides VRT voltage for temperature sensing, and switches
VCDIV to GND to allow measurement of the average singlecell voltage. The IC also verifies that VCC is at or above
4.25V, VCC is 500mV above BAT and VCELL is between
350mV and 1.95V. If VCELL is above 1.95V, the fault state
is entered, which is described in more detail below. Once
adequate voltage conditions exist for charging, READY is
asserted.
If the initial voltage on VCELL is below 900mV, the LTC4011
enters the precharge state and enables the PWM current
source to trickle charge using one-fifth the programmed
charge current. The CHRG status output is active during
precharge. The precharge state duration is limited to
tMAX/12 minutes, where tMAX is the maximum fast charge
period programmed with the TIMER pin. If sufficient VCELL
voltage cannot be developed in this length of time, the fault
state is entered, otherwise fast charge begins.
If the voltage between VTEMP and GND is below 200mV,
the LTC4011 is paused. If VTEMP is above 200mV but
below 2.85V, the LTC4011 verifies that the sensed temperature is between 5°C and 45°C. If these temperature
limits are not met or if its own die temperature is too high,
the LTC4011 will indicate a fault and not allow charging to
begin. If VTEMP is greater than 2.85V, battery temperature
related charge qualification, monitoring and termination
are disabled.
If adequate average single-cell voltage exists, the LTC4011
enters the fast charge state and begins charging at the
programmed current set by the external current sense
resistor connected between the SENSE and BAT pins. The
CHRG status output is active during fast charge. If VCELL
is initially above 1.325V, cell voltage processing begins
immediately. Otherwise –∆V termination is disabled for a
stabilization period of tMAX/12. In that case, the LTC4011
makes another fault check at tMAX/12, requiring the average cell voltage to be above 1.22V. This ensures the
battery pack is accepting a fast charge. If VCELL is not
above this voltage threshold, the fault state is entered. Fast
charge state duration is limited to tMAX and the fault state
is entered if this limit is exceeded.
Once charging is fully qualified, precharge begins (unless
the LTC4011 is paused). In that case, the VTEMP pin is
monitored for further control. The charge status indicators
and PWM outputs remain inactive until charging begins.
Fast Charge State
Charge Monitoring
The LTC4011 continues to monitor important voltage and
temperature parameters during all charging states. If the
DC input is removed, charging stops and the shutdown
state is entered. If VCC drops below 4.25V or VCELL drops
below 350mV, charging stops and the LTC4011 returns to
the charge qualification state. If VCELL exceeds 1.95V, charging stops and the IC enters the fault state. If an external
thermistor indicates sensed temperature is beyond a range
of 5°C to 60°C, or the internal die temperature exceeds an
Charge Termination
Fast charge termination parameters are dependent upon
the battery chemistry selected with the CHEM pin. Voltage-based termination (–∆V) is always active after the
initial voltage stabilization period. If an external thermistor
network is present, chemistry-specific limits for ∆T/∆t
(rate of temperature rise) are also used in the termination
algorithm. Temperature-based termination, if enabled,
becomes active as soon as the fast charge state is entered.
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Top-Off Charge State
If NiMH fast charge termination occurs because the ∆T/∆t
limit is exceeded after an initial period of tMAX/12 has expired, the LTC4011 enters the top-off charge state. Top-off
charge is implemented by sourcing one-tenth the programmed charge current for tMAX/3 minutes to ensure that
100% charge has been delivered to the battery. The CHRG
and TOC status outputs are active during the top-off state.
If NiCd cells have been selected with the CHEM pin, the
LTC4011 never enters the top-off state.
will resume when all temperatures return to acceptable
levels. Refer to the Status Outputs section for more detail.
Insertion and Removal of Batteries
The LTC4011 automatically senses the insertion or removal of a battery by monitoring the VCELL pin voltage.
Should this voltage fall below 350mV, the IC considers the
battery to be absent. Removing and then inserting a
battery causes the LTC4011 to initiate a completely new
charge cycle beginning with charge qualification.
Automatic Recharge State
External Pause Control
Once charging is complete, the automatic recharge state
is entered to address the self-discharge characteristics of
nickel chemistry cells. The charge status outputs are
inactive during automatic recharge, but VCDIV remains
switched to GND to monitor the average cell voltage. If the
VCELL voltage drops below 1.325V without falling below
350mV, the charge timer is reset and a new fast charge
cycle is initiated.
After charging is initiated, the VTEMP pin may be used to
pause operation at any time. When the voltage between
VTEMP and GND drops below 200mV, the charge timer
pauses, fast charge termination algorithms are inhibited
and the PWM outputs are disabled. The status and VCDIV
outputs all remain active. Normal function is fully restored
from the previous state when pause ends.
The internal termination algorithms of the LTC4011 are
adjusted when a fast charge cycle is initiated from automatic recharge, because the battery should be almost fully
charged. Voltage-based termination is enabled immediately and the NiMH ∆T/∆t limit is fixed at a battery
temperature rise of 1°C/minute.
Fault State
As discussed previously, the LTC4011 enters the fault
state based on detection of invalid battery voltages during
various charging phases. The IC also monitors the regulation of the PWM control loop and will enter the fault state
if this is not within acceptable limits. Once in the fault state,
the battery must be removed or DC input power must be
cycled in order to initiate further charging. In the fault
state, the FAULT output is active, the READY output is
inactive, charging stops and the charge indicator outputs
are inactive. The VCDIV output remains connected to GND
to allow detection of battery removal.
Note that the LTC4011 also uses the FAULT output to
indicate that charging is suspended due to invalid battery
or internal die temperatures. However, the IC does not
enter the fault state in these cases and normal operation
Status Outputs
The LTC4011 open-drain status outputs provide valuable
information about the IC’s operating state and can be
used for a variety of purposes in applications. Table 1
summarizes the state of the four status outputs and the
VCDIV pin as a function of LTC4011 operation. The status
outputs can directly drive current-limited LEDs terminated to the DC input. The VCDIV column in Table 1is
strictly informational. VCDIV should only be used for the
VCELL resistor divider, as previously discussed.
Table 1. LTC4011 Status Pins
READY FAULT
CHRG
TOC
VCDIV
CHARGER STATE
Off
Off
Off
Off
Off
Off
On
Off
Off
Off
On
Ready to Charge
(VTEMP Held Low)
or Automatic Recharge
On
Off
On
Off
On
Precharge or Fast Charge
(May be Paused)
On
Off
On
On
On
NiMH Top-Off Charge
(May be Paused)
On
On
On
Temperature Limits
Exceeded
Off
On
On
Fault State (Latched)
On or Off On or Off
Off
Off
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PWM Current Source Controller
An integral part of the LTC4011 is the PWM current source
controller. The charger uses a synchronous step-down
architecture to produce high efficiency and limited thermal
dissipation. The nominal operating frequency of 550kHz
allows use of a smaller external filter components. The
TGATE and BGATE outputs have internally clamped voltage swings. They source peak currents tailored to smaller
surface-mount power FETs likely to appear in applications
providing an average charge current of 3A or less. During
the various charging states, the LTC4011 uses the PWM
controller to regulate an average voltage between SENSE
and BAT that ranges from 10mV to 100mV.
A conceptual diagram of the LTC4011 PWM control loop
is shown in Figure 2.
The voltage across the external current programming
resistor RSENSE is averaged by integrating error amplifier
EA. An internal programming current is also pulled from
input resistor R1. The IPROG • R1 product establishes the
desired average voltage drop across RSENSE, and hence,
the average current through RSENSE. The ITH output of the
error amplifier is a scaled control current for the input of
VCC
LTC4011
P
17
N
15
11
TGATE
Q
BGATE
SENSE
R3
BAT
R4
RSENSE
12
PWM CLOCK
S
R
R1
CC
–
ITH
R2
+
the PWM comparator CC. The ITH • R3 product sets a peak
current threshold for CC such that the desired average
current through RSENSE is maintained. The current comparator output does this by switching the state of the SR
latch at the appropriate time.
At the beginning of each oscillator cycle, the PWM clock
sets the SR latch and the external P-channel MOSFET is
switched on (N-channel MOSFET switched off) to refresh
the current carried by the external inductor. The inductor
current and voltage drop across RSENSE begin to rise
linearly. During normal operation, the PFET is turned off
(NFET on) during the cycle by CC when the voltage
difference across RSENSE reaches the peak value set by
the output of EA. The inductor current then ramps down
linearly until the next rising PWM clock edge. This closes
the loop and maintains the desired average charge current
in the external inductor.
Low Dropout Charging
After charging is initiated, the LTC4011 does not require
that VCC remain at least 500mV above BAT because
situations exist where low dropout charging might occur.
In one instance, parasitic series resistance may limit PWM
headroom (between VCC and BAT) as 100% charge is
reached. A second case can arise when the DC adapter
selected by the end user is not capable of delivering the
current programmed by RSENSE, causing the output voltage of the adapter to collapse. While in low dropout, the
LTC4011 PWM runs near 100% duty cycle with a frequency that may not be constant and can be less than
550kHz. The charge current will drop below the programmed value to avoid generating audible noise, so the
actual charge delivered to the battery may depend primarily on the LTC4011 charge timer.
EA
Internal Die Temperature
IPROG
4011 F02
Figure 2. LTC4011 PWM Control Loop
The LTC4011 provides internal overtemperature detection to protect against electrical overstress, primarily at
the FET driver outputs. If the die temperature rises above
this thermal limit, the LTC4011 stops switching and
indicates a fault as previously discussed.
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External DC Source
The external DC power source should be connected to the
charging system and the VCC pin through either a power
diode or P-channel MOSFET. This prevents catastrophic
system damage in the event of an input short to ground or
reverse-voltage polarity at the DC input. The LTC4011
automatically senses when this input is present. The opencircuit voltage of the DC source should be between 4.5V
and 34V, depending on the number of cells being charged.
In order to avoid low dropout operation, ensure 100%
capacity at charge termination, and allow reliable detection of battery insertion, removal or overvoltage, the
following equation can be used to determine the minimum
full-load voltage that should be provided by the external
DC power source.
voltage clamping may be necessary on an external PMOS
transistor used in this manner at higher input voltages.
Alternatively, a diode can be used in place of this FET.
Battery Chemistry Selection
The desired battery chemistry is selected by programming
the CHEM pin to the proper voltage. If it is wired to GND,
a set of parameters specific to charging NiMH cells is
selected. When CHEM is left floating or connected to VRT,
charging is optimized for NiCd cells. The various charging
parameters are detailed in Table 2.
Programming Charge Current
Charge current is programmed using the following
equation:
DCIN(MIN) = (n • 2V) + 0.3V
where n is the number of series cells in the battery pack.
The LTC4011 will properly charge over a wide range of
DCIN and BAT voltage combinations. Operating the
LTC4011 in low dropout or with DCIN much greater than
BAT will force the PWM frequency to be much less than
550kHz. The LTC4011 disables charging and sets a fault if
a large DCIN to BAT differential would cause generation of
audible noise.
PowerPath Control
Proper PowerPath control is an important consideration
when fast charging nickel cells. This control ensures that
the system load remains powered at all times, but that
normal system operation and associated load transients
do not adversely affect fast charge termination. For high
efficiency and low dropout applications, the LTC4011 can
provide gate drive from the INFET pin directly to an input
P-channel MOSFET.
The battery should also be connected to the raw system
supply by a switch that selects the battery for system power
only if an external DC source is not present. Again, for
applications requiring higher efficiency, a P-channel
MOSFET with its gate driven from the DC input can be used
to perform this switching function (see Figure 8). Gate
RSENSE =
100mV
IPROG
RSENSE is an external resistor connected between the
SENSE and BAT pins. A 1% resistor with a low temperature
coefficient and sufficient power dissipation capability to
avoid self-heating effects is recommended.
Programming Maximum Charge Times
Connecting the appropriate resistor between the TIMER
pin and GND programs the maximum duration of various
charging states. To some degree, the value should reflect
how closely the programmed charge current matches the
1C rate of targeted battery packs. The maximum fast
charge period is determined by the following equation:
RTIMER (Ω) =
tMAX (Hours)
30 • 10 – 6
Some typical timing values are detailed in Table 3. RTIMER
should not be less than 15k. The actual time limits used by
the LTC4011 have a resolution of approximately ±30
seconds in addition to the tolerances given the Electrical
Characteristics table. The maximum time period is approximately 4.3 hours.
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Table 2. LTC4011 Charging Parameters
STATE
CHEM
PIN
BAT
CHEMISTRY TIMER
TMIN
TMAX
ICHRG
Both
tMAX/12
5°C
45°C
IPROG/5
Open
NiCd
tMAX
5°C
60°C
IPROG
–20mV per Cell or 2°C/Minute
GND
NiMH
tMAX
5°C
60°C
IPROG
1.5°C/Minute for First tMAX/12 Minutes if Initial
VCELL < 1.325V
PC
FC
TERMINATION CONDITION
Timer Expires
–10mV per Cell or 1°C/Minute After tMAX/12 Minutes
or if Initial VCELL > 1.325V
TOC
GND
NiMH
AR
tMAX/3
Both
5°C
60°C
IPROG/10
Timer Expires
5°C
45°C
0
VCELL < 1.325V
PC: Precharge
FC: Fast Charge (Initial –∆V Termination Hold Off of tMAX/12 Minutes May Apply)
TOC: Top-Off Charge (Only for NiMH ∆T/∆t FC Termination After Initial tMAX/12 Period)
AR: Automatic Recharge (Temperature Limits Apply to State Termination Only)
Table 3. LTC4011 Time Limit Programming Examples
TYPICAL FAST
CHARGE RATE
PRECHARGE LIMIT
(MINUTES)
FAST CHARGE
VOLTAGE STABILIZATION
(MINUTES)
FAST CHARGE LIMIT
(HOURS)
24.9k
2C
3.8
3.8
0.75
15
33.2k
1.5C
5
5
1
20
49.9k
1C
7.5
7.5
1.5
30
66.5k
0.75C
10
10
2
40
100k
C/2
15
15
3
60
RTIMER
Cell Voltage Network Design
An external resistor network is required to provide the
average single-cell voltage to the VCELL pin of the LTC4011.
The proper circuit for multicell packs is shown in Figure 3.
The ratio of R2 to R1 should be a factor of (n – 1), where
n is the number of series cells in the battery pack. The value
of R1 should be between 1k and 100k. This range limits the
sensing error caused by VCELL leakage current and prevents the ON resistance of the internal NFET between VCDIV
and GND from causing a significant error in the VCELL
voltage. The external resistor network is also used to
detect battery insertion and removal. The filter formed by
C1 and the parallel combination of R1 and R2 is recommended for rejecting PWM switching noise. The value of
C1 should be chosen to yield a 1st order lowpass frequency of less than 500Hz. In the case of a single cell, the
TOP-OFF
CHARGE
(MINUTES)
FOR TWO OR
MORE SERIES CELLS
BAT 12
LTC4011
VCELL
VCDIV
+
R2
8
R1
C1
9
R2 = R1(n – 1)
GND
5
4011 F03
Figure 3. Mulitple Cell Voltage Divider
external application circuit shown in Figure 4 is recommended to provide the necessary noise filtering and missing battery detection.
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12
9
8
BAT
VCDIV
1 CELL
10k
10k
VCELL
33nF
4011 F04
Figure 4. Single-Cell Monitor Network
Thermistor Network Design
The network for proper temperature sensing using a
thermistor with a negative temperature coefficient (NTC)
is shown in Figure 5. R3 is only required for thermistors
with a room temperature value above 10k. For thermistors
with a room temperature value of 10k or less, replace R3
with a short.
The LTC4011 is designed to work best with a 1% 10k NTC
thermistor with a β of 3750. In this case, the values for the
external network are given by:
R1 = 10.7k
R2 = 30.9k
R3 = 0Ω
The filter formed by R4 and C1 in Figure 5 is optional but
recommended for rejecting PWM switching noise. Alternatively, R4 may be replaced by a short, and a value
chosen for C1 which will provide adequate filtering from
the Thevenin impedance of the remaining thermistor network. The filter pole frequency, which should be less than
500Hz, will vary more with battery temperature without
R4. External components should be chosen to make the
Thevenin impedance from VTEMP to GND 100kΩ or less,
including R4, if present.
VRT
R1 R4
51k
R3
RT
VTEMP
R2
6
7
C1
10nF
4011 F05
Figure 5. External NTC Thermistor Network
Disabling Thermistor Functions
However, the LTC4011 will operate with other NTC thermistors having different nominal values or exponential
temperature coefficients. For these thermistors, the general-purpose design equations for the passive resistors in
the external linearization network are as follows:
where:
RO = Thermistor (RT) value at TO (Ω)
TO = Thermistor reference temperature (°K)
β = Thermistor exponential temperature coefficient of
resistance
Temperature sensing is optional in LTC4011 applications.
For low cost systems where temperature sensing may not
be required, the VTEMP pin may simply be wired to VRT to
disable temperature qualification of all charging operations. However, this practice is not recommended for
NiMH cells charged well above or below their 1C rate,
because fast charge termination based solely on voltage
inflection may not be adequate to protect the battery from
a severe overcharge. A resistor between 10k and 20k may
be used to connect VTEMP to VRT if the pause function is
still desired.
R1 =
1.164RO (β – 2TO )
β
R2 =
RO (β – 2TO )
0.141 β + 2TO
R3 =
11.46 R2 β R1RO – (R1 R2 + R1 RO + R2 RO )TO
, if RO < 10k
(R1+ R2) TO
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INTVDD Regulator Output
Sample Applications
If BGATE is left open, the INTVDD pin of the LTC4011 can
be used as an additional source of regulated voltage in the
host system any time READY is active. Switching loads on
INTVDD may reduce the accuracy of internal analog circuits used to monitor and terminate fast charging. In
addition, DC current drawn from the INTVDD pin can
greatly increase internal power dissipation at elevated VCC
voltages. A minimum ceramic bypass capacitor of 0.1µF is
recommended.
Figures 6 through 9 detail sample charger applications of
various complexities. Combined with the Typical Application on the first page of this data sheet, these Figures
demonstrate some of the proper configurations of the
LTC4011. MOSFET body diodes are shown in these figures strictly for reference only.
Calculating Average Power Dissipation
The user should ensure that the maximum rated IC junction temperature is not exceeded under all operating
conditions. The thermal resistance of the LTC4011 package (θJA) is 38°C/W, provided the exposed metal pad is
properly soldered to the PCB. The actual thermal resistance in the application will depend on the amount of PCB
copper to which the package is soldered. Feedthrough vias
directly below the package that connect to inner copper
layers are helpful in lowering thermal resistance. The
following formula may be used to estimate the maximum
average power dissipation PD (in watts) of the LTC4011
under normal operating conditions.
PD = VCC (7mA + IDD + IVRT + 615k(Q TGATE + Q BGATE))
– 3 IVRT
⎛V –V ⎞
– 3.85IDD + 60n ⎜ CC LED ⎟
⎝ RLED + 30 ⎠
2
where:
IDD = Average external INTVDD load current, if any
IVRT = Load current drawn by the external thermistor
network from VRT, if any
QTGATE = Gate charge of external P-channel MOSFET
in coulombs
QBGATE = Gate charge of external N-channel MOSFET
(if used) in coulombs
VLED = Maximum external LED forward voltage
RLED = External LED current-limiting resistor used in
the application
n = Number of LEDs driven by the LTC4011
Figure 6 shows a minimum application, which might be
encountered in low cost NiCd fast charge applications.
FET-based PowerPath control allows for maximum input
voltage range from the DC adapter. The LTC4011 uses
–∆V to terminate the fast charge state, as no external
temperature information is available. Nonsynchronous
PWM switching is employed to reduce external component cost. A single LED indicates charging status.
A 3A NiMH application of medium complexity is shown
in Figure 7. PowerPath control that is completely FETbased allows for both minimum input voltage overhead
and minimum switchover loss when operating from the
battery.
P-channel MOSFET Q4 functions as a switch to connect
the battery to the system load whenever the DC input
adapter is removed. If the maximum battery voltage is less
than the maximum rated VGS of Q4, diode D1 and resistor
R5 are not required. Otherwise choose the Zener voltage
of D1 to be less than the maximum rated VGS of Q4. R5
provides a bias current of (VBAT – VZENER)/(R5 + 20k) for
D1 when the input adapter is removed. Choose R5 to make
this current, which is drawn from the battery, just large
enough to develop the desired VGS across D1.
Precharge, fast charge and top-off states are indicated by
external LEDs. The VTEMP thermistor network allows the
LTC4011 to accurately terminate fast charge under a
variety of applied charge rates. Use of a synchronous
PWM topology improves efficiency and lowers power
dissipation.
A full-featured 2A LTC4011 application is shown in Figure 8. FET-based PowerPath allows for maximum input
voltage range from the DC adapter. The inherent voltage
ratings of the VCELL, VCDIV, SENSE and BAT pins allow
charging of from one to sixteen series nickel cells in this
application, governed only by the VCC overhead limits
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FROM
ADAPTER
4.5V TO 34V
10µF
3k
INFET
FAULT
CHRG
TOC
READY
R
TO
SYSTEM
LOAD
VCC
TGATE
BGATE
10µH
PGND
LTC4011
SENSE
0.1Ω
TIMER
BAT
49.9k
GND
CHEM
VCDIV
VRT
VCELL
INTVDD VTEMP
10k
NiCd
PACK
(1AHr)
10µF
R2
33nF
0.1µF
4011 F06
Figure 6. Minimum LTC4011 Application
R5
10k
FROM
ADAPTER
4.5V TO 34V
3k
3k
R
D1
6V
INFET
FAULT
CHRG
TOC
READY
R
TO
SYSTEM
20µF LOAD
Q4
VCC
TGATE
BGATE
LTC4011
PGND
10µH
SENSE
20k
DCIN
TIMER
33mΩ
BAT
49.9k
GND
VCDIV
CHEM
VCELL
VRT
INTVDD VTEMP
0.1µF
10k
0.033µF
R2
20µF
0.068µF
30.9k
10.7k
NiMH PACK
WITH 10k NTC
(3AHr)
4011 F07
Figure 7. 3A NiMH Charger with Full PowerPath Control
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R5
10k
FROM
ADAPTER
4.5V TO 34V
3k
G
3k
R
3k
R
INFET
FAULT
CHRG
TOC
READY
VCC
TGATE
BGATE
LTC4011
PGND
DCIN
TIMER
20k
10µF
6V
3k
Y
49.9k
TO
SYSTEM
LOAD
10µH
SENSE
0.05Ω
BAT
GND
VCDIV
CHEM
VCELL
VRT
INTVDD VTEMP
0.1µF
10k
R2
10µF
51k
33nF
22nF
30.9k
10.7k
NiCd PACK
WITH 10k NTC
(2AHr)
4011 F08
Figure 8. Full-Featured 2A LTC4011 Application
previously discussed. The application includes all average
cell voltage and battery temperature sensing circuitry
required for the LTC4011 to utilize its full range of charge
qualification, safety monitoring and fast charge termination features. A green LED indicates valid DC input voltage
and installed battery, while a pair of red LEDs indicates
charging. A yellow LED indicates fault conditions. The
grounded CHEM pin selects the NiMH charge termination
parameter set.
While the LTC4011 is a complete, standalone solution,
Figure 9 shows that it can also be interfaced to a host
microprocessor. The MCU can control the charger directly
with an open-drain I/O port connected to the VTEMP pin, if
that port is low leakage and can tolerate at least 2V. The
charger state is monitored on the four LTC4011 status
outputs. Charging of NiMH batteries is selected in this
example. However, NiCd (CHEM → VRT) parameters could
be chosen as well.
Unlike all of the other applications discussed so far, the
battery continues to power the system during charging.
The MCU could be powered directly from the battery or
from any type of post regulator operating from the battery.
In this configuration, the LTC4011 relies expressly on the
ability of the host MCU to know when load transients will
be encountered. The MCU should then pause charging
(and thus –∆V processing) during those events to avoid
premature fast charge termination. If the MPU cannot
reliably perform this function, full PowerPath control
should be implemented. Excessive battery load current
variations, such as those generated by a post-regulating
PWM, can generate sufficient voltage noise to cause the
LTC4011 to prematurely terminate a charge cycle and/or
prematurely restart a fast charge. In this case, it may be
necessary to inhibit the LTC4011 after charging is complete until external gas gauge circuitry indicates that
recharging is necessary. Shutdown power is applied to the
LTC4011 through the body diode of Q2 in this application.
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FROM
ADAPTER
4.5V TO 34V
V+
10µF
Q1
STATUS
TO
MCU
INFET
FAULT
CHRG
TOC
READY
VCC
TGATE
Q2
Q3
BGATE
LTC4011
PGND
DCIN
10µH
SENSE
0.1Ω
20k
TIMER
49.9k
10k
GND
CHEM
TO
SYSTEM
LOAD
BAT
R2
VCDIV
VCELL
33nF
VRT
INTVDD VTEMP
0.1µF
10.7k
PAUSE
FROM
MCU
68nF
30.9k
NiCd PACK
WITH 10k NTC
(1AHr)
4011 F09
Figure 9. LTC4011 with MCU Interface
Waveforms
Sample waveforms for a standalone application during a
typical charge cycle are shown in Figure 10. Note that
these waveforms are not to scale and do not represent the
complete range of possible activity. The figure is simply
intended to allow better conceptual understanding and to
highlight the relative behavior of certain signals generated
by the LTC4011 during a typical charge cycle.
Initially, the LTC4011 is in low power shutdown as the
system operates from a heavily discharged battery. A DC
adapter is then connected such that VCC rises above 4.25V
and is 500mV above BAT. The READY output is asserted
when the LTC4011 completes charge qualification.
When the LTC4011 determines charging should begin, it
starts a precharge cycle because VCELL is less than 900mV.
As long as the temperature remains within prescribed
limits, the LTC4011 charges (TGATE switching), applying
limited current to the battery with the PWM in order to
bring the average cell voltage to 900mV.
When the precharge state timer expires, the LTC4011 begins fast charge if VCELL is greater than 900mV. The PWM,
charge timer and internal termination control are suspended if pause is asserted (VCELL < 200mV), but all status
outputs continue to indicate charging is in progress. The
fast charge state continues until the selected voltage or
temperature termination criteria are met. Figure 10 suggests termination based on ∆T/∆t, which for NiMH would
be an increase of 1°C per minute.
Because NiMH charging terminated due to ∆T/∆t and the
fast charge cycle had lasted more than tMAX/12 minutes,
the LTC4011 begins a top-off charge with a current of
IPROG/10. Top-off is an internally timed charge of tMAX/3
minutes with the CHRG and TOC outputs continuously
asserted.
Finally, the LTC4011 enters the automatic recharge state
where the CHRG and TOC outputs are deasserted. The
PWM is disabled but VCDIV remains asserted to monitor
VCELL. The charge timer will be reset and fast charging will
resume if VCELL drops below 1.325V. The LTC4011 enters
4011p
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LTC4011
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SHDN
DCIN
PRECHARGE
FAST CHARGE
TOP-OFF
AUTO
RECHARGE
SHDN
VCC = 4.25V
READY
VCDIV
TGATE
VCELL
VTEMP
(PAUSE)
0.9V
200mV
CHRG
TOC
EXTERNAL
PAUSE
4011 F10
Figure 10. Charging Waveforms Example
shutdown when the DC adapter is removed, minimizing
current draw from the battery in the absence of an input
power source.
While not a part of the sample waveforms of Figure 10,
temperature qualification is an ongoing part of the charging process, if an external thermistor network is detected
by the LTC4011. Should prescribed temperature limits be
exceeded during any particular charging state, charging
would be suspended until the sensed temperature returned to an acceptable range.
Battery-Controlled Charging
Because of the programming arrangement of the LTC4011,
it may be possible to configure it for battery-controlled
charging. In this case, the battery pack is designed to provide customized information to an LTC4011-based charger,
allowing a single design to service a wide range of application batteries. Assume the charger is designed to provide a maximum charge current of 800mA (RSENSE =
125mΩ). Figure 11 shows a 5V NiCd battery pack for which
TIMER
CHEM
VTEMP
10
4
7
NC
66.5k
+
10k
NTC
BATTERY
PACK
1200mAhr
NiCd CELLS
–
4011 F11
Figure 11. NiCd Battery Pack with Time Limit Control
800mA represents a 0.75C rate. When connected to the
charger, this pack would provide battery temperature information and correctly configure both fast charge termination parameters and time limits for the internal NiCd cells.
A second possibility is to configure an LTC4011-based
charger to accept battery packs with varying numbers of
cells. By including R2 of the average cell voltage divider
network shown in Figure 3, battery-based programming
of the number of series-stacked cells could be realized
without defeating LTC4011 detection of battery insertion
or removal. Figure 12 shows a 2-cell NiMH battery pack
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LTC4011
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APPLICATIO S I FOR ATIO
that programs the correct number of series cells when it
is connected to the charger, along with indicating chemistry and providing temperature information.
Any of these battery pack charge control concepts could
be combined in a variety of ways to service custom
application needs.
CHEM
VTEMP
VCELL
4
7
8
10k
NTC
+
R2
2. Place the LTC4011 close to the switching FET gate
terminals, keeping the connecting traces short to
produce clean drive signals. This rule also applies to
IC supply and ground pins that connect to the switching FET source pins. The IC can be placed on the
opposite side of the PCB from the switching FETs.
BATTERY
PACK
1500mAhr
NiMH CELLS
4011 F12
–
Figure 12. NiMH Battery Pack Indicating Number of Cells
PCB Layout Considerations
To prevent magnetic and electrical field radiation and high
frequency resonant problems, proper layout of the components connected to the LTC4011 is essential. Refer to
Figure 13. For maximum efficiency, the switch node rise
and fall times should be minimized. The following PCB
design priority list will help ensure proper topology. Layout the PCB using this specific order.
SWITCH NODE
L1
VBAT
VIN
CIN
HIGH
FREQUENCY
CIRCULATING
PATH
D1
COUT
SWITCHING GROUND
1. Input capacitors should be placed as close as possible
to switching FET supply and ground connections with
the shortest copper traces possible. The switching
FETs must be on the same layer of copper as the input
capacitors. Vias should not be used to make these
connections.
BAT
4011 F13
3. Place the inductor input as close as possible to the
drain of the switching FETs. Minimize the surface area
of the switch node. Make the trace width the minimum
needed to support the programmed charge current.
Use no copper fills or pours. Avoid running the connection on multiple copper layers in parallel. Minimize
capacitance from the switch node to any other trace or
plane.
4. Place the charge current sense resistor immediately
adjacent to the inductor output, and orient it such that
current sense traces to the LTC4011 are short. These
feedback traces need to be run together as a single pair
with the smallest spacing possible on any given layer
on which they are routed. Locate any filter component
on these traces next to the LTC4011, and not at the
sense resistor location.
5. Place output capacitors adjacent to the sense resisitor
output and ground.
6. Output capacitor ground connections must feed into
the same copper that connects to the input capacitor
ground before tying back into system ground.
Figure 13. High Speed Switching Path
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LTC4011
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APPLICATIO S I FOR ATIO
7. Connection of switching ground to system ground, or
any internal ground plane should be single-point. If
the system has an internal system ground plane, a
good way to do this is to cluster vias into a single star
point to make the connection.
8. Route analog ground as a trace tied back to the
LTC4011 GND pin before connecting to any other
ground. Avoid using the system ground plane. A
useful CAD technique is to make analog ground a
separate ground net and use a 0Ω resistor to connect
analog ground to system ground.
9. A good rule of thumb for via count in a given high
current path is to use 0.5A per via. Be consistent when
applying this rule.
10. If possible, place all the parts listed above on the same
PCB layer.
11. Copper fills or pours are good for all power connections except as noted above in Rule 3. Copper planes
on multiple layers can also be used in parallel. This
helps with thermal management and lowers trace
inductance, which further improves EMI performance.
12. For best current programming accuracy, provide a
Kelvin connection from RSENSE to SENSE and BAT.
See Figure 14 for an example.
13. It is important to minimize parasitic capacitance on
the TIMER, SENSE and BAT pins. The traces connecting these pins to their respective resistors should be
as short as possible.
DIRECTION OF CHARGING CURRENT
RSENSE
4011 F14
SENSE
BAT
Figure 14. Kelvin Sensing of Charge Current
4011p
22
LTC4011
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PACKAGE DESCRIPTIO
FE Package
20-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation CB
6.40 – 6.60*
(.252 – .260)
3.86
(.152)
3.86
(.152)
20 1918 17 16 15 14 13 12 11
6.60 ±0.10
2.74
(.108)
4.50 ±0.10
6.40
2.74 (.252)
(.108) BSC
SEE NOTE 4
0.45 ±0.05
1.05 ±0.10
0.65 BSC
1 2 3 4 5 6 7 8 9 10
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.09 – 0.20
(.0035 – .0079)
0.25
REF
0.50 – 0.75
(.020 – .030)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
1.20
(.047)
MAX
0° – 8°
0.65
(.0256)
BSC
0.195 – 0.30
(.0077 – .0118)
TYP
0.05 – 0.15
(.002 – .006)
FE20 (CB) TSSOP 0204
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
4011p
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC4011
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4011p
24
Linear Technology Corporation
LT/TP 0205 1K • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
© LINEAR TECHNOLOGY CORPORATION 2005