IRF IRFR430APBF

SMPS MOSFET
Applications
Switch Mode Power Supply (SMPS)
l Uninterruptible Power Supply
l High speed power switching
l Lead-Free
l
PD -95076B
IRFR430APbF
IRFU430APbF
HEXFET® Power MOSFET
VDSS
RDS(on) max
ID
1.7Ω
5.0A
500V
Benefits
Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective COSS specified (See AN 1001)
l
D-Pak
IRFR430A
I-Pak
IRFU430A
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
5.0
3.2
20
110
0.91
± 30
3.0
-55 to + 150
A
W
W/°C
V
V/ns
300 (1.6mm from case )
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
130
5.0
11
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
1.1
–––
62
°C/W
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
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Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
1
03/02/07
IRFR/U430APbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
500
–––
–––
2.0
–––
–––
–––
–––
Typ.
–––
0.60
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
1.7
Ω
VGS = 10V, ID = 3.0A „
4.5
V
VDS = VGS, ID = 250µA
25
VDS = 500V, VGS = 0V
µA
250
VDS = 400V, VGS = 0V, TJ = 125°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
2.3
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
8.7
27
17
16
490
75
4.5
750
25
51
Max. Units
Conditions
–––
S
VDS = 50V, ID = 3.0A
24
ID = 5.0A
6.5
nC
VDS = 400V
13
VGS = 10V, See Fig. 6 and 13 „
–––
VDD = 250V
–––
I
D = 5.0A
ns
–––
RG = 15Ω
–––
RD = 50Ω,See Fig. 10 „
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 400V …
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 5.0
showing the
A
G
integral reverse
––– –––
20
S
p-n junction diode.
––– ––– 1.5
V
TJ = 25°C, IS = 5.0A, VGS = 0V „
––– 410 620
ns
TJ = 25°C, IF = 5.0A
––– 1.4 2.1
µC
di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
‚ Starting TJ = 25°C, L = 11mH
… Coss eff. is a fixed capacitance that gives the same charging time
max. junction temperature. ( See fig. 11 )
RG = 25Ω, IAS = 5.0A. (See Figure 12)
as Coss while VDS is rising from 0 to 80% VDSS .
ƒ ISD ≤ 5.0A, di/dt ≤ 320A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C.
2
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IRFR/U430APbF
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
10
1
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
0.1
4.5V
0.01
20µs PULSE WIDTH
Tj = 25°C
10
1
4.5V
0.1
20µs PULSE WIDTH
Tj = 150°C
0.01
0.001
0.1
1
10
0.1
100
1
100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
100.00
3.0
I D = 5.0A
2.5
T J = 150°C
1.00
T J = 25°C
0.10
VDS = 100V
20µs PULSE WIDTH
0.01
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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16.0
2.0
(Normalized)
10.00
RDS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (Α)
10
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
TJ , Junction Temperature
80
100
120
140
( ° C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
160
IRFR/U430APbF
10000
VGS , Gate-to-Source Voltage (V)
Ciss
100
Coss
10
Crss
I D = 5.0A
VDS = 400V
VDS = 250V
VDS = 100V
10
Coss = Cds + Cgd
1000
C, Capacitance(pF)
12
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
7
5
2
1
1
10
100
0
1000
0
VDS, Drain-to-Source Voltage (V)
100
ID , Drain-to-Source Current (A)
I SD , Reverse Drain Current (A)
100
10
TJ = 150
TJ = 25 ° C
°C
1
V GS= 0 V
0.1
0.2
0.5
0.8
1.1
V SD,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
8
12
16
20
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
4
4
QG , Total Gate Charge (nC)
10
100µsec
1
0.1
1.4
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1msec
Tc = 25°C
Tj = 150°C
Single Pulse
10
10msec
100
1000
10000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFR/U430APbF
5.5
RD
V DS
VGS
4.4
D.U.T.
ID , Drain Current (A)
RG
3.3
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
2.2
Fig 10a. Switching Time Test Circuit
VDS
1.1
90%
0.0
25
50
75
100
TC , Case Temperature
125
150
( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
(Z thJC )
10
1
Thermal Response
D = 0.50
0.20
P DM
0.10
0.1
0.05
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D =
2. Peak T
0.01
0.00001
0.0001
0.001
0.01
t1/ t 2
J = P DM x Z thJC
+TC
0.1
1
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U430APbF
250
15V
+
V
- DD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
D.U.T
RG
200
DRIVER
L
VDS
TOP
ID
2.2A
3.2A
BOTTOM
5.0A
150
100
50
0
25
50
75
100
125
I AS
150
( ° C)
Starting Tj, Junction Temperature
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
5.0
QGD
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
VGS(th) Gate threshold Voltage (V)
10 V
4.5
ID = 250µA
4.0
3.5
3.0
2.5
-75
VGS
-50
-25
0
25
50
75
100 125
150
T J , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
6
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IRFR/U430APbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 15. For N-Channel HEXFET® Power MOSFETs
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7
IRFR/U430APbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRF R120
WIT H AS S EMBLY
LOT CODE 1234
AS S EMBLED ON WW 16, 2001
IN T HE AS S EMBLY LINE "A"
PART NUMBER
INT ERNAT IONAL
RECT IF IER
LOGO
Note: "P" in ass embly line position
indicates "Lead-F ree"
IRF R120
12
116A
34
AS S EMBLY
LOT CODE
DAT E CODE
YEAR 1 = 2001
WEEK 16
LINE A
"P" in as s embly line pos ition indicates
"Lead-F ree" qualification to the consumer-level
OR
INT ERNAT IONAL
RECT IF IER
LOGO
PART NUMBE R
IRF R120
12
AS S EMB LY
LOT CODE
8
34
DAT E CODE
P = DES IGNAT ES LEAD-F REE
PRODUCT (OPT IONAL)
P = DES IGNAT ES LEAD-F REE
PRODUCT QUALIFIED T O T HE
CONS UMER LEVEL (OPT IONAL)
YEAR 1 = 2001
WEEK 16
A = AS S EMBLY S IT E CODE
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IRFR/U430APbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
E XAMPL E : T H IS IS AN IR F U 120
WIT H AS S E MB L Y
L OT CODE 5678
AS S E MB L E D ON WW 19, 2001
IN T H E AS S E MB L Y L INE "A"
INT E R NAT IONAL
R E CT IF IE R
L OGO
P AR T NU MB E R
IRF U 120
11 9A
56
78
AS S E MB L Y
L OT CODE
Note: "P " in as s embly line pos ition
indicates L ead-F ree"
DAT E CODE
YE AR 1 = 2001
WE E K 19
L INE A
OR
INT E R NAT IONAL
R E CT IF IE R
L OGO
P AR T NU MB E R
IRF U 120
56
AS S E MB L Y
L OT CODE
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78
DAT E CODE
P = DE S IGNAT E S L E AD-F R E E
PR ODU CT (OP T IONAL )
YE AR 1 = 2001
WE E K 19
A = AS S E MB L Y S IT E CODE
9
IRFR/U430APbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.03/2007
10
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