Revised April 2002 CD4093BC Quad 2-Input NAND Schmitt Trigger General Description Features The CD4093B consists of four Schmitt-trigger circuits. Each circuit functions as a 2-input NAND gate with Schmitttrigger action on both inputs. The gate switches at different points for positive and negative-going signals. The difference between the positive (VT+) and the negative voltage ■ Wide supply voltage range: 3.0V to 15V ■ Schmitt-trigger on each input with no external components ■ Noise immunity greater than 50% (VT−) is defined as hysteresis voltage (VH). ■ Equal source and sink currents All outputs have equal source and sink currents and conform to standard B-series output drive (see Static Electrical Characteristics). ■ Standard B-series output drive ■ No limit on input rise and fall time ■ Hysteresis voltage (any input) TA = 25°C Typical VDD = 5.0V VH = 1.5V VDD = 10V VH = 2.2V VDD = 15V VH = 2.7V Guaranteed VH = 0.1 VDD Applications • Wave and pulse shapers • High-noise-environment systems • Monostable multivibrators • Astable multivibrators • NAND logic Ordering Code: Order Number Package Number Package Description CD4093BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4093BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Top View © 2002 Fairchild Semiconductor Corporation DS005982 www.fairchildsemi.com CD4093BC Quad 2-Input NAND Schmitt Trigger October 1987 CD4093BC Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 2) (Note 2) −0.5 to +18 VDC DC Supply Voltage (VDD) Input Voltage (VIN) DC Supply Voltage (VDD) −0.5 to VDD +0.5 VDC −65°C to +150 °C Storage Temperature Range (TS) 700 mW Small Outline 500 mW Symbol IDD VOL VOH VT− VT+ Parameter IOL IOH IIN (Note 2) −55°C Conditions Min Max +25°C Min Typ +125°C Max Min Max Quiescent Device VDD = 5V 0.25 0.25 7.5 Current VDD = 10V 0.5 0.5 15.0 VDD = 15V 1.0 1.0 30.0 LOW Level VIN = VDD, |IO| < 1 µA Output Voltage VDD = 5V 0.05 0 0.05 0.05 VDD = 10V 0.05 0 0.05 0.05 VDD = 15V 0.05 0 0.05 0.05 HIGH Level VIN = VSS, |IO| < 1 µA Output Voltage VDD = 5V 4.95 4.95 5 VDD = 10V 9.95 9.95 10 9.95 VDD = 15V 14.95 14.95 15 14.95 |IO| < 1 µA VDD = 5V, VO = 4.5V 1.3 2.25 1.5 1.8 2.25 1.5 2.3 VDD = 10V, VO = 9V 2.85 4.5 3.0 4.1 4.5 3.0 4.65 VDD = 15V, VO = 13.5V 4.35 6.75 4.5 6.3 6.75 4.5 6.9 3.5 VDD = 5V, VO = 0.5V 2.75 3.6 2.75 3.3 3.5 2.65 VDD = 10V, VO = 1V 5.5 7.15 5.5 6.2 7.0 5.35 7.0 VDD = 15V, VO = 1.5V 8.25 10.65 8.25 9.0 10.5 8.1 10.5 Hysteresis (VT+ − VT−) VDD = 5V 0.5 2.35 0.5 1.5 2.0 0.35 2.0 VDD = 10V 1.0 4.3 1.0 2.2 4.0 0.70 4.0 VDD = 15V 1.5 6.3 1.5 2.7 6.0 1.20 6.0 LOW Level Output VIN = VDD Current (Note 3) VDD = 5V, VO = 0.4V 0.64 0.51 0.88 0.36 VDD = 10V, VO = 0.5V 1.6 1.3 2.25 0.9 VDD = 15V, VO = 1.5V 4.2 3.4 8.8 2.4 HIGH Level Output VIN = VSS Current (Note 3) VDD = 5V, VO = 4.6V −0.64 0.51 −0.88 −0.36 VDD = 10V, VO = 9.5V −1.6 −1.3 −2.25 −0.9 VDD = 15V, VO = 13.5V −4.2 −3.4 −8.8 −2.4 V V mA −0.1 −10−5 −0.1 −1.0 VDD = 15V, VIN = 15V 0.1 10−5 0.1 1.0 2 V mA VDD = 15V, VIN = 0V Note 3: IOH and IOL are tested one output at a time. www.fairchildsemi.com V |IO| < 1 µA (Any Input) Input Current µA V Voltage (Any Input) Positive-Going Threshold Units 4.95 Negative-Going Threshold Voltage (Any Input) VH Note 2: VSS = 0V unless otherwise specified. 260 °C DC Electrical Characteristics −55°C to +125°C Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation. Lead Temperature (TL) (Soldering, 10 seconds) 0 to VDD VDC Operating Temperature Range (TA) Power Dissipation (PD) Dual-In-Line 3 to 15 VDC Input Voltage (VIN) µA (Note 4) TA = 25°C, CL = 50 pF, RL = 200k, Input tr, tf = 20 ns, unless otherwise specified Symbol tPHL, tPLH tTHL, tTLH Parameter Propagation Delay Time Transition Time Typ Max VDD = 5V Conditions Min 300 450 VDD = 10V 120 210 VDD = 15V 80 160 VDD = 5V 90 145 VDD = 10V 50 75 VDD = 15V 40 60 7.5 CIN Input Capacitance (Any Input) 5.0 CPD Power Dissipation Capacitance (Per Gate) 24 Units ns ns pF pF Note 4: AC Parameters are guaranteed by DC correlated testing. 3 www.fairchildsemi.com CD4093BC AC Electrical Characteristics CD4093BC Typical Applications Gated Oscillator Assume t1 + t2 >> tPHL + tPLH then: t0 = RC ln [VDD/VT−] t1 = RC ln [(VDD − V T−)/(VDD − VT+)] t2 = RC ln [VT+/VT−] Gated One-Shot (a) Negative-Edge Triggered (b) Positive-Edge Triggered www.fairchildsemi.com 4 Typical Transfer Characteristics Guaranteed Trigger Threshold Voltage vs VDD Guaranteed Hysteresis vs VDD Guaranteed Hysteresis vs VDD Input and Output Characteristics VNML = VIH(MIN) − VOL ≅ VIH(MIN) = V T+(MIN) VNMH = VOH − VIL(MAX) ≅ VDD − VIL(MAX) = VDD − VT−(MAX) 5 www.fairchildsemi.com CD4093BC Typical Performance Characteristics CD4093BC AC Test Circuits and Switching Time Waveforms www.fairchildsemi.com 6 CD4093BC Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 7 www.fairchildsemi.com CD4093BC Quad 2-Input NAND Schmitt Trigger Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8