ONSEMI NCP5010

NCP5010
500 mW Boost Converter for
White LEDs
The NCP5010 is a fixed frequency PWM boost converter with
integrated rectification optimized for constant current applications
such as driving white LEDs. This device features small size, minimal
external components and high−efficiency for use in portable
applications and is capable of providing up to 500 mW output power
to 2−5 series connected white LEDs. A single resistor sets the LED
current and the CTRL pin can be pulse width modulated (PWM) to
reduce the LED Current.
The device includes True−Cutoff circuitry to disconnect the load
from the battery when the device is put into standby mode. To protect
the device, an output overvoltage protection, and short circuit
protection have been incorporated. The NCP5010 is housed in a low
profile, space efficient 1.7 x 1.7 mm Flip−Chip package. The device
has been optimized for use with small inductors and ceramic
capacitors.
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MARKING
DIAGRAM
A1
1
DAX
G
A
Y
WW
Features
• 2.7 to 5.5 V Input Voltage Range
• Efficiency: 84% for 5 LED (VF = 3.5 V by LED) at 30 mA and
•
•
•
•
•
•
8−Pin Flip−Chip
FC SUFFIX
CASE 499AJ
= Specific Device Code
= Pb−Free Package
= Assembly Location
= Year
= Work Week
PIN CONNECTIONS
4.2 V VIN
Low Noise 1 MHz PWM DC−DC Converter
Open LED Protection and Short Circuit Protection
Serial LEDs Architecture for Uniform Current Matching
1 mA Shutdown Current Facility with True−Cutoff
Very Small 8−Pin Flip−Chip 1.7 x 1.7 mm Package
This is a Pb−Free Device
A1
A2
A3
AGND CTRL
NC
B1
B3
VIN
FB
C1
C2
C3
VOUT
SW
PGND
Top View
Typical Applications
•
•
•
•
•
DAXG
AYWW
White LED Backlighting for Small Color LCD Displays
Cellular Phones
Digital Cameras
MP3 Players
High Efficiency Step−up Converter
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
90
VOUT = 5 LED (18 V)
80
EFFICIENCY (%)
70
VOUT = 3 LED (11 V)
60
50
40
30
20
10
VIN = 4.2 V
0
1
10
IOUT (mA)
100
Figure 1. Efficiency vs. Output Current
© Semiconductor Components Industries, LLC, 2006
August, 2006 − Rev. 1
1
Publication Order Number:
NCP5010/D
NCP5010
Vbat
2.7 to 5.5 V
L1
22 mH
FB
PGND
C1
Cout
1 mF 0805
X5R 25V
LED
B3
NCP5010
C3
NC
2 to 5 LEDs
SW
B1
VIN
A3
VOUT
CTRL
AGND
A2
A1
ENABLE
LED
C2
Cin
4.7 mF 0603
X5R 6.3V
Rfb
24
Figure 2. Typical Application Circuit
PIN FUNCTION DESCRIPTION
PIN
PIN NAME
TYPE
DESCRIPTION
A1
AGND
POWER
System ground for the analog circuitry. A high quality ground must be provided to avoid spikes and/
or uncontrolled operations. This pin is to be connected to the PGND pin.
B1
VIN
POWER
Power Supply Input. A ceramic capacitor with a minimum value of 1 mF/6.3 V (X5R or X7R) must be
connected to this pin. This capacitor should be placed as close as possible to this pin. In addition,
one end of the external inductor is to be connected at this point.
C1
VOUT
POWER
DC−DC converter output. This pin should be directly connected to the load and a low ESR
(<30 mW) 1 mF (min) 25 V bypass capacitor. This capacitor is required to smooth the current flowing
into the load, thus limiting the noise created by the fast transients present in this circuit. Since this is
a current regulated output, this pin has over voltage protection to protect from open load conditions.
Care must be taken to avoid EMI through the PCB copper tracks connected to this pin.
A2
CTRL
INPUT
An Active High logic level on this pin enables the device. A built−in pulldown resistor disables the
device if the pin is left open. This pin can also be used to control the average current into the load
by applying a low frequency PWM signal. If a PWM signal is applied, the frequency should be high
enough to avoid optical flicker but be no greater than 1 kHz.
C2
SW
POWER
Power switch connection for inductor. Typical application will use a coil from 10 mH to 22 mH and
must be able to handle at least 350 mA. If the desired output power is above 300 mW, the inductor
should have a DCR < 1.4 W.
A3
NC
N/A
B3
FB
INPUT
C3
PGND
POWER
Not Connected
Feedback voltage input used to close the loop by means of a sense resistor connected between the
primary LED branch and the ground. The output current tolerance is depends upon the accuracy of
this resistor and a ±5% or better accuracy metal film resistor is recommended. An analog dimming
signal can be applied to this point to reduce the output current. Please refer to the application
section for additional details.
Power ground. A high quality ground must be used to avoid spikes and/or uncontrolled operation.
Care must be taken to avoid high−density current flow in a limited PCB copper track. This pin is to
be connected to the AGND pin.
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NCP5010
MAXIMUM RATINGS
Rating
Power Supply Voltage (Note 2)
Over Voltage Protection
Human Body Model (HBM) ESD Rating (Note 3)
Machine Model (MM) ESD Rating (Note 3)
Digital Input Voltage
Digital Input Current
Power Dissipation @ TA = +85 °C
Thermal Resistance Junction−to−Air
8−Pin Flip−Chip Package
Symbol
Value
Unit
VIN
7.0
V
VOUT
24
V
ESD HBM
2000
V
ESD MM
200
V
CTRL
−0.3 < VIN < Vbat+0.3
1.0
V
mA
PD
150
mW
°C/W
RqJA
(Note 6)
Operating Ambient Temperature Range
TA
−40 to +85
°C
Operating Junction Temperature Range
TJ
−40 to +125
°C
Tstg
−65 to +150
°C
Storage Temperature Range
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values
(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage
may occur and reliability may be affected.
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = 25°C.
2. According to JEDEC standard JESD22−A108B.
3. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22−A114 for all pins.
Machine Model (MM) ±200 V per JEDEC standard: JESD22−A115 for all pins.
4. Latchup Current Maximum Rating: ±100 mA per JEDEC standard: JESD78.
5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
6. For the 8−Pin Flip−Chip CSP Package, the RqJA is highly dependent on the PCB Heatsink area. For example RqJA can be to 195°C/W with
50 mm total area and also 135°C/W with 500 mm. All the bumps have the same thermal resistance and need to be connected thereby optimizing
the power dissipation.
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NCP5010
ELECTRICAL CHARACTERISTICS (Limits apply for TA between −40°C to +85°C and VIN = 3.6 V, unless otherwise noted)
Pin
Symbol
Rating
Min
Typ
Max
Unit
5.5
V
420
560
mA
0.6
1.0
W
1.2
MHz
B1
VIN
Supply Voltage
2.7
C2
IPEAK_MAX
Switch Current Limit
280
NMOS RDS(on)
Internal Switch On Resistor
FOSC
PWM Oscillator Frequency
0.8
1.0
MDUTY
Maximum Duty Cycle
91
95
%
84
%
22
V
EFF
Efficiency (Note 7)
C1
OVPON
Overvoltage Clamp Voltage
C1
OVPH
Overvoltage Clamp Hysteresis
C1
POUT
Output power (Note 8)
VIN = 3.1 V
VIN < 3.1 V
20
1.0
500
300
C1
IOUT
Minimum Output Current Controlled No Skip Mode
(Note 9)
B3
FBV
Feedback Voltage Threshold in Steady State
Overtemperature range
At 25°C
C1
B1
FBVLR
UVLO
V
mW
1.0
mV
475
490
Feedback Voltage Line Regulation (Notes 9 and 10)
From DC to 100 Hz
VIN Undervoltage Lockout measured at 25°C
Threshold to Enable the Converter
Threshold to Disable the Converter
mA
500
500
525
510
0.2
0.5
2.4
2.2
2.6
2.4
%/V
V
2.2
2.0
B1
UVLOH
Undervoltage Lockout Hysteresis
200
mV
C1
IOUTSC
Short Circuit Output Current
20
mA
B1
SCPT
Short Circuit Protection Threshold
Detected
Released
B1
C2
% of VIN
35
47
ISTDB
Stand by Current, IOUT = 0 mA, CTRL = Low
Vbat = 4.2 V
IQ
Quiescent Current
Device Not Switching (BF = VIN)
Device Switching (RFB disconnected)
50
67
65
87
2.0
mA
0.4
1.0
A2
VIL
Voltage Input Logic Low
A2
VIH
Voltage Input Logic High
1.2
0.3
A2
RCTRL
CTRL Pin Pulldown Resistance
175
7. Efficiency is defined by 100 * (Pout / Pin) at 25°C
VIN = 4.2 V with L= Coilcraft DT1608C−223
IOUT = 30 mA, Load = 5 LEDs (VF = 3.5 V per LED) bypassed by 1 mF X5R
8. Guaranteed by design and characterized with L = 22 mH, DCR = 0.7 W max.
9. Load = 4 LEDs (VF = 3.5 V by LED), COUT = 1 mF X5R, L= Coilcraft DT1608C−223.
10. VIN = 3.6 V, Ripple = 0.2 V P−P, IOUT = 15 mA.
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4
mA
V
V
370
kW
NCP5010
TYPICAL OPERATING CHARACTERISTICS
90
90
80
80
VIN = 2.7 V
70
EFFICIENCY (%)
EFFICIENCY (%)
Condition: Efficiency = 100 x (Number of LED stacked x VLED x ILED)/PIN
VIN = 3.3 V
VIN = 4.2 V
60
50
70
VIN = 2.7 V
60
50
0
10
20
30
40
50
60
0
70
10
20
30
40
IOUT (mA)
IOUT (mA)
90
90
80
80
VIN = 2.7 V
70
50
60
70
Figure 4. Efficiency vs. Current @ 3 LEDS (10.5 V)
L = TDK VLF4012AT−220
EFFICIENCY (%)
EFFICIENCY (%)
Figure 3. Efficiency vs. Current @ 3 LEDS (10.5 V)
L = Coilcraft DT1608C−223
VIN = 3.3 V
VIN = 4.2 V
60
VIN = 2.7 V
70
VIN = 3.3 V
VIN = 4.2 V
60
50
50
0
10
20
30
40
IOUT (mA)
50
60
0
70
80
80
EFFICIENCY (%)
90
70
20
30
40
50
60
70
Figure 6. Efficiency vs. Current @ 4 LEDS (14 V)
L = TDK VLF4012AT−220
90
VIN = 2.7 V
10
IOUT (mA)
Figure 5. Efficiency vs. Current @ 4 LEDS (14 V)
L = Coilcraft DT1608C−223
EFFICIENCY (%)
VIN = 3.3 V
VIN = 4.2 V
VIN = 3.3 V
VIN = 4.2 V
60
VIN = 2.7 V
70
VIN = 3.3 V
VIN = 4.2 V
60
50
50
0
10
20
30
40
50
60
0
70
10
20
30
40
50
60
70
IOUT (mA)
IOUT (mA)
Figure 7. Efficiency vs. Current @ 5 LEDS (17.5 V)
L = Coilcraft DT1608C−223
Figure 8. Efficiency vs. Current @ 5 LEDS (17.5 V)
L = TDK VLF4012AT−220
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NCP5010
TYPICAL OPERATING CHARACTERISTICS
Condition: Efficiency = 100 x (Number of LED stacked x VLED x ILED)/PIN
90
90
IOUT = 33 mA
IOUT = 33 mA
80
80
IOUT = 10 mA
70
IOUT = 23 mA
EFFICIENCY (%)
EFFICIENCY (%)
IOUT = 10 mA
60
50
IOUT = 1 mA
40
70
60
IOUT = 1 mA
50
40
30
30
20
2.5
3.0
3.5
4.0
4.5
5.0
20
2.5
5.5
3.5
4.5
5.0
5.5
Figure 9. Efficiency vs. VIN @ 3 LEDS (10.5 V)
L = Coilcraft DT1608C−223
Figure 10. Efficiency vs. VIN @ 4 LEDS (14 V)
L = Coilcraft DT1608C−223
510
FEEDBACK VOLTAGE (mV)
80
IOUT = 10 mA
IOUT = 23 mA
70
60
IOUT = 1 mA
50
40
30
3.0
3.5
4.0
4.5
5.0
VIN = 3.6 V
505
VIN = 5.5 V
500
VIN = 2.7 V
495
490
−40
5.5
−20
0
20
40
60
80
100
TEMPERATURE (°C)
VIN (V)
Figure 11. Efficiency vs. VIN @ 5 LEDS (17.5 V)
L = Coilcraft DT1608C−223
Figure 12. Feedback Voltage vs. Temperature
1.04
900
VIN = 3.6 V
800
1.02
NMOS RDS(on) (mW)
FREQUENCY (MHz)
4.0
VIN (V)
IOUT = 28 mA
20
2.5
3.0
VIN (V)
90
EFFICIENCY (%)
IOUT = 23 mA
VIN = 5.5 V
1.00
0.98
VIN = 2.7 V
0.96
−40
−20
0
VIN = 3.6 V
700
VIN = 2.7 V
600
500
VIN = 5.5 V
400
20
40
60
80
100
300
−40
−20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 13. Oscillator Frequency vs. Temperature
Figure 14. NMOS RDS(on) vs. Temperature
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100
NCP5010
TYPICAL OPERATING CHARACTERISTICS
3
IOUT (mA)
2
3 LEDs
4 LEDs
1
5 LEDs
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VIN (V)
Figure 16. Typical VOUT Ripple in OVP Conditions
1 VOUT, 500 mV/div, AC 3 VOUT, 5 V/div, DC
Figure 15. Typical Skip Mode Threshold vs. VIN
(COUT = 1 mF X5R 25 V)
Figure 18. Discontinuous Current Mode (DCM)
1 SW, 5 V/div DC, 4 ILED, 50 mA/div, DC, IOUT = 1 mA
Figure 17. Continuous Current Mode (CCM)
1 SW, 5 V/div DC, 4 ILED, 50 mA/div, DC, IOUT = 15 mA
Figure 19. Startup for LED Operating, 4 LEDS
RBF = 22 W, 1 CTRL, 2 V/div DC, 2 FB, 500 mV/div DC,
4 IL 100 mA/div, T = 100 ms/div
Figure 20. Duty Cycle Control Waveforms
1 CTRL, 2 V/div DC, 2 FB, 500 mV/div DC,
4 IL 100 mA/div, T = 1 ms/div
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NCP5010
TYPICAL OPERATING CHARACTERISTICS
Figure 21. Typical Ripple for Voltage Operation
1 SW, 10 V/div DC, 2 FB, 500 mV/div DC, 3 VOUT
20 mV/div AC, T = 500 ns/div
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NCP5010
DETAIL OPERATING DESCRIPTION
VBat
L
2.7 to 5.5 V
Cin
1 mF, 6.3 V X5R 0603
22 mH
VIN
SW
B1
C2
A1
AGND
−
OVP
COMP
UVLO
COMP
UVLO
+
OVP
UVLO REF
FB
VOUT
PROTECTION
MAX D
C1
NMOS
RST
DRIVER
RAMP
COMP
SET
CLOCK
OSC
1 Mhz
+
IPEAK
COMP
−
250 k
CTRL
Cout
1 mF
25 V
X5R 0805
SHORT
CIRCUIT
PROTECTION
ONE
SHOT
IPEAK MAX
SC
DRIVER
−
PWM
COMP
+
CTRL
FB REF
OVP REF
THERMAL
+
−
ERROR
AMP
+
B3
−
MAX DUTY
CYCLE COMP
−
Up to 22 V
+
M DUTY REF
VIN
SENSE
CURRENT
RFB
IPEAK MAX
A2
PGND
C3
Figure 22. Functional Block Diagram
Operation
The internal oscillator provides a 1 MHz clock signal to
trigger the PWM controller on each rising edge (SET signal)
which starts a cycle. During this phase the low side NMOS
switch is turned on thus increasing the current through the
inductor. The switch current is measured by the SENSE
CURRENT and added to the RAMP COMP signal. Then
PWM COMP compares the output of the adder and the signal
from ERROR AMP. When the comparator threshold is
exceeded, the NMOS switch is turned off until the rising edge
of the next clock cycle. In addition, there are six functions
which can reset the flip−flop logic to switch off the NMOS.
The MAX DUTY CYCLE COMP monitors the pulse width
and if it exceeds 95% (nom) of the cycle time the switch will
be turned off. This limits the switch from being on for more
than one cycle. Due to IPEAK COMP, the current through the
inductor is monitored and compared with the IPEAK_MAX
threshold set at 440 mA (nom). If the current exceeds this
value, the controller is will turn off the NMOS switch for the
remainder of the cycle. This is a safety function to prevent any
excessive current that could overload the inductor and the
power stage. The four other safety circuits are SHORT
CIRCUIT PROTECTION, OVP, UVLO, and THERMAL
PROTECTION. Please refer to the detail in following
sections.
The loop stability is compensated by the ERROR AMP
built in integrator. The gain and the loop bandwidth are
fixed internally and provides a phase margin greater than
45° whatever the current supplied.
The NCP5010 DC−DC converter is based on a Current
Mode PWM architecture which regulates the feedback
voltage at 500 mV under normal operating conditions. The
boost converter operates in two separate phases (See
Figure 23). The first one is TON when the inductor is
charged by current from the battery to store up energy,
followed by TOFF step where the power is transmitted
through the internal rectifier to the load. The capacitor
COUT is used to store energy during the TOFF time and to
supply current to the load during the TON stage thus
constantly powering the load.
SW
Start
Cycle
Ipeak
1 MHz
IL
Ivalley
Ton
Toff
ISW
Iout
Figure 23. Basic DC−DC Operation
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NCP5010
LED Current Selection
300
The feedback resistor (RFB) determines the average
maximum current through the LED string. The control loop
regulated the current such that the average voltage at the FB
input is 500 mV (nom). For example, should one need a
20 mA output current in the primary branch, RFB should be
selected according to the following equation:
IPEAK (mA)
F
RFB + BV + 500 mV + 25 W
IOUT
20 mA
150
L = 15 mH
V IN = 3.1 V
V IN = 4.2 V
L = 22 mH
50
10
20
30
40
50
60
70
80
IOUT (mA)
Figure 24. Peak Inductor Currents vs. IOUT (mA)
@ 3 LEDs, 10.5 V
300
L = 10 mH
IPEAK (mA)
250
Inductor Selection
200
150
L = 15 mH
To choose the inductor there are three different electrical
parameters that need to be considered, the absolute value
of the inductor, the saturation current and the DCR. In
normal operation, this device is intended to operate in
Continuous Conduction Mode (CCM) so the following
equation below can be used to calculate the peak current:
100
50
10
I
V D
IPEAK + OUT ) IN
2LF
h(1 * D)
L = 22 mH
20
30
V IN = 3.1 V
V IN = 4.2 V
40
50
IOUT (mA)
60
70
80
Figure 25. Peak Inductor Currents vs. IOUT (mA)
@ 4 LEDs, 14 V
In the equation above, VIN is the battery voltage, IOUT is
the load current, L the inductor value, F the switching
frequency, and the duty cycle D is given by:
300
Ǔ
250
IPEAK (mA)
ǒ
200
100
In white LED applications it is desirable to operate the
LEDs at a specific operating current as the color will shift
as the bias current is changed. As a result of this effect, it
is recommended to dim the LED string by a pulse width
modulation techniques. A low frequency PWM signal can
be applied to the CTRL input and by varying the duty cycle
the brightness of the LED can be changed. To avoid any
optical flicker, the frequency must be higher than 100 Hz
and preferably less than 1 kHz. Due to the soft−start
function set at 600 ms (nom) with higher frequency the
device remains active but the brightness can decrease.
Nevertheless in this case, a dimming control using a
filtered PWM signal (See Figure 33) can be used. Also for
DC voltage control the same technique is suitable and the
filter is takes away.
D + 1 * VIN
VOUT
L = 10 mH
250
h is the global converter efficiency which can vary with
load current (see Figure 3 thru Figure 8). A good
approximation is to use h = 0.8. Figure 24 − Figure 26 are
a graphical representation of the above equations, as a
function of the desired IOUT, VIN, and number of LEDs in
series (VF = 3.5 V nominal). The curves are limited to an
IPEAK_MAX of 300 mA. It is important to analyze this at
worst case Vf conditions to ensure that the inductor current
rated is high enough such that it not saturate.
The recommended inductor value should range between
10 mH and 22 mH. As can be seen from the curves, as the
inductor size is reduced, the peak current for a given set of
conditions increases along with higher current ripple so it
is not possible to deliver maximum output power at lower
inductor values.
200
L = 10 mH
150
L = 15 mH
L = 22 mH
100
50
10
20
30
V IN = 3.1 V
V IN = 4.2 V
40
50
60
70
80
IOUT (mA)
Figure 26. Peak Inductor Currents vs. IOUT (mA)
@ 5 LEDs, 17.5 V
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NCP5010
Finally an acceptable DCR must be selected regarding
losses in the coil and must be lower than 1.4 W to limit
excessive voltage drop. In addition, as DCR is reduced,
overall efficiency will improve. Some recommended
inductors include but are not limited to:
TDK VLF4012AT−220MR51
TDK VLP4612T−220MR34
reaches 66% of VIN, then the PWM circuitry is enabled. In
normal conditions when the device is enabled by an active
high signal on CTRL, the short circuit condition continues
until the output capacitor is charged by the limited current
up to 66% of VIN.
VOUT
TDK VLP5610T−220MR45
Coilcraft LPO6610−223M
Coilcraft DO1605T−223MX
Coilcraft DT1608C−223
2/3 VIN
1/2 VIN
Normal
Running
Capacitor Selection
To minimize the output ripple, a low ESR multi−layer
ceramic capacitor type X5R or equivalent should be
selected. For LED driver applications a 1 mF (min) 25 V is
adequate. The NCP5010 can be operated in a voltage mode
configuration (see Figure 34) for applications such as
OLED power. Under these conditions, COUT can be
increased to 2.2 mF, 25 V or more to reduce the output
ripple.
The input needs to be bypassed by a X5R or an equivalent
low ESR ceramic capacitor near the VIN pin. A 1 mF, 6.3 V
is enough for most applications. However, if the connection
between VIN and the battery is too long then a 4.7 mF or
higher ceramic capacitor may be needed. Some
recommended capacitors include but are not limited to:
TDK C1608X5R1E105MT
TDK C2012X5R1E105MT
SC
Short−Circuit Condition End of Short−Circuit
Occurs Current limited at 20mA Detected Converter
Converter in Standby
Starts Again
T
Figure 27. Example of the VOUT Voltage Behavior
When Short−Circuit Arises
Overvoltage Protection (OVP)
If there is an open load condition such as a loose
connection to the White LED string, the converter will
provide current to the Cout capacitor and the voltage at the
output will rise rapidly. This could cause damage to the part
if there was not some external clamping Zener clamping
circuit. To eliminate the need for these external
components, the NCP5010 incorporates an OVP circuit
which monitors the output voltage with a resistive divider
network and a comparator and voltage reference. If the
output reaches 22 V (nominal), the OVP circuit will detect
a fault and inhibit PWM operation. This comparator has
1 V of hysteresis so when the load is reconnected and the
voltage drops below 21 V, the PWM operation will resume
automatically. The 22 V OVP threshold allows the use of
25 V ceramic capacitors for the output filter capacitor.
TDK C1608X5R0J105MT
TDK C2012X5R1E225MT
Murata GRM185R61A105KE36D
Murata GRM188R60J475KE19D
Undervoltage Lock Out (UVLO)
Murata GRM216R61E105KA12D
To ensure proper operation under all conditions, the
device has a built−in undervoltage lock out (UVLO)
circuit. During power−up, the device will remain disabled
until the input voltage exceeds 2.4 V nominal. This circuit
has 200 mV of hysteresis to provide noise immunity to
transient conditions.
Short−Circuit Protection
If VOUT is falls below 50% of VIN then a short−circuit
condition is detected. When this event is detected, the
PWM circuitry is disabled and the NMOS power switch is
not turned on. Power will be supplied to the load through
the inductor, rectifier and high side switch. Once VOUT
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11
NCP5010
Layout Recommendations
As with all switching DC/DC converter, care must be
observed to the PCB board layout and component
placement. To prevent electromagnetic interference (EMI)
problems and reduce voltage ripple of the device any
copper trace which see high frequency switching path
should be optimized. So the input and output bypass
ceramic capacitor, CIN and COUT as depicted Figure 2 must
be placed as close as possible the NCP5010 and connected
directly between pins and ground plane. In additional, the
track connection between the inductor and the switching
input, SW pin must be minimized to reduce EMI radiation.
Finally it is always good practice to keep way sensitive
tracks such as feedback connection from switched signal
like SW or VOUT connections. Figure 28 shown an
example of optimized PCB layout.
Figure 28. Recommended PCB Layout
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12
NCP5010
TYPICAL APPLICATION CIRCUITS
Basic Feedback
Figure 29 is a basic application where a regulated courant
is drive in a string of LEDs. A 20.8 mA current is fixed by
R1 and LEDs are dim with PWM apply on CTRL pin.
VBat
2.7 to 5.5 V
LED
C2
SW
C1
LED
FB
PGND
VOUT
B3
NCP5010
A1
AGND
CTRL
C3
A2
PWM
VIN
B1
Cin
4.7 mF 0603
X5R 6.3 V
C2
1 mF 0805
X5R 25 V
2 to 5 LEDs
L1
22 mH
L1:
C1:
C2:
R1
24
TDK VLF4012AT−220MR51
TDK C1608X5R0J475MT
TDK C2012X5R1E105MT
Figure 29. Typical Semi−Pulsed Mode of Operation
Different Supply
need a power delivered for example from an LDO. Care
must be observed to have always VBAT above VIN and
minimum output voltage range will be VBAT voltage.
The NCP5010 can operate from two different supply:
One end of the inductor (VBAT) can be directly connected
to a battery like 4 cell alkaline or 2 cell Li−Ion. And VIN pin
VBat
2.7 to 5.5 V
C1
FB
LED
B3
C3
PGND
VOUT
C2
1 mF 0805
X5R 25 V
2 to 5 LEDs
C2
CTRL
NCP5010
LED
L1
22 mH
SW
VIN
A2
AGND
ENABLE
B1
Cin
4.7 mF 0603
X5R 6.3 V
A1
Vin
R1
24
L1:
C1:
C2:
TDK VLF4012AT−220MR51
TDK C1608X5R0J475MT
TDK C2012X5R1E105MT
Figure 30. Operate from Different Supply
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13
NCP5010
Multiple LEDs String
two LEDs branches where the constant current is regulated
in primary branch and the secondary branch is selected by
Q1. The number of LED in each string have to be the same.
Since the output voltage in limited at 22 V (nom.), one
can arrange the LEDs in 2 or more string. Figure 31 shows
VBat
2.7 to 5.5 V
C1
FB
LED
LED
C3
B3
AGND
A1
NCP5010
C2
1 mF 0805
X5R 25 V
LED
2 to 5 LEDs
SW
VOUT
CTRL
PGND
A2
ENABLE
VIN
B1
C2
X5R 6.3 V
C1
4.7 mF 0603
X5R 6.3 V
LED
L1
22 mH
R1
24
L1:
C1:
C2:
R2
24
PRIMARY BRANCH
TDK VLF4012AT−220MR51
TDK C1608X5R0J475MT
TDK C2012X5R1E105MT
Q1
N
ENABLE SECONDARY BRANCH
Figure 31. Multiple LED String Application
Matched LEDs Branches
like this the current in the secondary branch I2 equal the
current in primary branch I1. Thank to this current mirror
the number of LEDs in secondary branch could be lower or
equal than primary one.
Should one need to control precisely the current in two
LEDs branches the schematic Figure 32 can be used. An
dual NPN BC847BD is used to form a current mirror Q1
2.7 to 5.5 V
PGND
C3
NCP5010
LED
C2
1 mF 0805
X5R 25 V
2 to 5 LEDs
C1
LED
FB
B1
VIN
SW
VOUT
CTRL
AGND
A2
A1
ENABLE
C2
X5R 6.3 V
C1
4.7 mF 0603
X5R 6.3 V
LED
L1
22 mH
B3
VBat
I1
LED
I2
NPN Duals
Q1
R1
24
R2
24
Q1:
L1:
C1:
C2:
ON SEMICONDUCTOR BC847BDW1T1
TDK VLF4012AT−220MR51
TDK C1608X5R0J475MT
TDK C2012X5R1E105MT
Figure 32. Matched 2 Branches of LEDs
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14
NCP5010
Analog Dimming Control
signal is put from outside to R2 there is no voltage drop
across R3 and IOUT = VFB/R4. When the voltage put to R2
is increasing the loop balance output voltage to get always
500 mV to FB pin. Thereby voltage across R4 decreases
like this the current in the string of LEDs.
When the NCP5010 is in steady state the output voltage
is controlled in order to have 500 mV to the feedback input
(FB pin). The principle of this schematic is bias by a
resistive network R2/R3 the feedback voltage. If not any
VBat
2.7 to 5.5 V
C1
VOUT
FB
PGND
R3
18 k
B3
C3
A1
AGND
CTRL
NCP5010
2 to 5 LEDs
C2
VIN
A2
ENABLE
SW
B1
C1
4.7 mF 0603
X5R 6.3 V
R1 10 k
C2
1 mF 0805
X5R 25 V
LED
L1
22 mH
LED
R4
24
R2
100 k
L1:
C1:
C2:
C3:
PWM SIGNAL
C3
470 nF
TDK VLF4012AT−220MR51
TDK C1608X5R0J475MT
TDK C2012X5R1E105MT
Standard Capacitor
Average Network
DC VOLTAGE
Select
Figure 33. Dimming Control Using a Filtered PWM Signal or a DC Voltage
DC/DC Boost Application
LCD biasing. An external resistive network is connected to
sense the output voltage and close the loop.
The NCP5010 can be used as DC/DC Boost converter to
deliver constant voltage to powering load like OLED or
Vout + 0.5
) R2Ǔ
ǒR1 R1
VBat
2.7 to 5.5 V
SW
FB
PGND
C1
15 V / 35 mA
R
290 k
B3
NCP5010
VOUT
C3
VIN
CTRL
AGND
A2
A1
ENABLE
B1
C1
4.7 mF 0603
X5R 6.3 V
C2
L1
22 mH
R
10 k
C2
2.2 mF 0805
X5R 25 V
L1:
C1:
C2:
TDK VLF4012AT−220MR51
TDK C1608X5R0J475MT
TDK C2012X5R1E225MT
Figure 34. OLED or LCD Bias Supply
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15
NCP5010
ORDERING INFORMATION
Device
NCP5010FCT1G
Marking
Operating Temperature Range
Package
Shipping†
DAX
−40°C to +85°C
8−Pin Flip−Chip CSP
(Pb−Free)
3000 Tape and Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Two type of demo boards available:
• The NCP5010EVB board which configures the device driving a string of 2−5 White LEDs in series.
• The NCP5010BIASEVB board for applications such as powering an OLED panel or LCD biasing.
Finally in addition to these demo boards, Application Note “ANDXXXX/D” deals with configuring the NCP5010 with a
high side sense resistor.
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NCP5010
PACKAGE DIMENSIONS
8−PIN FLIP−CHIP
FC SUFFIX
CASE 499AJ−01
ISSUE A
−A−
4X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
D
0.10 C
−B−
PIN 1
INDICATOR
E
TOP VIEW
0.10 C
DIM
A
A1
A2
D
E
b
e
D1
E1
A
0.05 C
−C−
A2
A1
SIDE VIEW
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.6 BSC
0.210
0.270
0.330
0.390
1.70 BSC
1.70 BSC
0.290
0.340
0.500 BSC
1.000 BSC
1.000 BSC
SOLDERING FOOTPRINT
0.50
0.0197
D1
DIE SIZE MAY VARY
e
C
B
8X
b
e
0.05 C A B
0.03 C
E1
A
1
2
0.50
0.0197
3
BOTTOM VIEW
0.265
0.01
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17
SCALE 20:1
mm Ǔ
ǒinches
NCP5010
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
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damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
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For additional information, please contact your
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NCP5010/D