NSC MM54HCT688

MM54HCT688/MM74HCT688
8-Bit Magnitude Comparator (Equality Detector)
General Description
This equality detector utilizes advanced silicon-gate CMOS
technology to compare bit for bit two 8-bit words and indicate whether or not they are equal. The P e Q output indicates equality when it is low. A single active low enable is
provided to facilitate cascading of several packages and enable comparison of words greater than 8 bits.
This device is useful in memory block decoding applications, where memory block enable signals must be generated from computer address information.
The comparator combines the low power consumption of
CMOS, but inputs are compatible with TTL logic levels, and
the output can drive 10 low power Schottky equivalent
loads.
MM54HCT/MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS
devices. These parts are also plug in replacements for LSTTL devices and can be used to reduce power consumption
in existing designs.
All inputs are protected from damage due to static discharge by diodes to VCC and ground.
Features
Y
Y
Y
Y
Y
TTL input compatible
Typical propagation delay: 20 ns
Low quiescent current: 80 mA maximum (74HCT Series)
Large output current: 4 mA
Same as HCT521
Logic Diagrams
TL/F/5371 – 2
C1995 National Semiconductor Corporation
TL/F/5371
RRD-B30M105/Printed in U. S. A.
MM54HCT688/MM74HCT688 8-Bit Magnitude Comparator (Equality Detector)
February 1988
Absolute Maximum Ratings (Notes 1 & 2)
Operating Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (VCC)
Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Clamp Diode Current (IIK, IOK)
DC Output Current, per pin (IOUT)
DC VCC or GND Current, per pin (ICC)
Storage Temperature Range (TSTG)
Power Dissipation (PD)
(Note 3)
S.O. Package only
Lead Temperature (TL)
b 1.5 to VCC a 1.5V
g 20 mA
Max
5.5
0
VCC
Units
V
V
b 40
b 55
a 85
a 125
§C
§C
500
ns
Input Rise or Fall Times
(tr, tf)
g 25 mA
g 50 mA
b 65§ C to a 150§ C
600 mW
500 mW
260§ C
DC Electrical Characteristics
Parameter
Operating Temp. Range (TA)
MM74HCT688
MM54HCT688
b 0.5 to VCC a 0.5V
(Soldering 10 seconds)
Symbol
DC Input or Output Voltage
(VIN, VOUT)
b 0.5 to a 7.0V
Min
4.5
(VCC e 5V g 10% unless otherwise specified)
TA e 25§ C
Conditions
74HCT
TA eb40 to 85§ C
Typ
54HCT
TA eb55 to 125§ C
Units
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
2.0
2.0
2.0
V
VIL
Maximum Low Level
Input Voltage
0.8
0.8
0.8
V
VOH
Minimum High Level
Output Voltage
VIN e 0.8V or 2.0V
lIOUTl e 20 mA
lIOUTl e 4.0 mA, VCC e 4.5V
lIOUTl e 4.8 mA, VCC e 5.5V
VCC
4.2
5.7
VCCb0.1
3.98
4.98
VCCb0.1
3.84
4.84
VCCb0.1
3.7
4.7
V
V
V
Maximum Low Level
Voltage
VIN e V0.8V or 2.0V
lIOUTl e 20 mA
lIOUTl e 4.0 mA, VCC e 4.5V
lIOUTl e 4.8 mA, VCC e 5.5V
0
0.2
0.2
0.1
0.26
0.26
0.1
0.33
0.33
0.1
0.4
0.4
V
V
V
IIN
Maximum Input
Current
VIN e VCC or GND
g 0.1
g 1.0
g 1.0
mA
ICC
Maximum Quiescent
Supply Current
VIN e VCC or GND
IOUT e 0 mA
8.0
80
160
mA
VIN e 2.4V or 0.5V (Note 4)
0.3
0.4
0.5
mA
VOL
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C; ceramic ‘‘J’’ package: b 12 mW/§ C from 100§ C to 125§ C.
Note 4: Measured per pin. All other inputs held at VCC or ground.
2
AC Electrical Characteristics
VCC e 5V, TA e 25§ C, CL e 15 pF, tr e tf e 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions
Typ
Guaranteed
Limit
Units
tPHL
Maximum Propagation
Delay - P or Q to Output
19
30
ns
tPLH
Maximum Propagation
Delay - P or Q to Output
13
22
ns
tPHL
Maximum Propagation
Delay - Enable to Output
13
20
ns
tPHL
Maximum Propagation
Delay - Enable to Output
10
18
ns
AC Electrical Characteristics
VCC e 5V g 10%, CL e 50 pF, tr e tf e 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions
TA e 25§ C
74HCT
TA eb40 to 85§ C
Typ
54HCT
TA eb55 to 125§ C
Units
Guaranteed Limits
tPHL
Maximum Propagation
Delay - P or Q to Output
23
35
44
53
ns
tPLH
Maximum Propagation
Delay - P or Q to Output
16
24
30
36
ns
tPHL
Maximum Propagation
Delay - Enable to Output
16
24
30
36
ns
tPLH
Maximum Propagation
Delay - Enable to Output
11
20
25
30
ns
tTHL, tTLH
Maximum Output Rise
and Fall Time
8
15
19
22
ns
CPD
Power Dissipation
Capacitance (Note 5)
45
CIN
Maximum Input
Capacitance
5
pF
10
10
10
pF
Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption,
IS e CPD VCC a ICC.
Connection Diagram
Truth Table
Dual-In-Line Package
Inputs
Data
P, Q
PeQ
PlQ
PkQ
X
TL/F/5371 – 1
Top View
Order Number MM54HCT688 or MM74HCT688
3
Enable
G
PeQ
L
L
L
H
L
H
H
H
MM54HCT688/MM74HCT688 8-Bit Magnitude Comparator (Equality Detector)
Physical Dimensions inches (millimeters)
Order Number MM54HCT688J or MM74HCT688J
NS Package J20A
LIFE SUPPORT POLICY
Order Number MM74HCT688N
NS Package N20A
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