FAN7711 Ballast Control Integrated Circuit Features Description Floating Channel for Bootstrap Operation to +600V The FAN7711, developed with Fairchild’s unique highvoltage process, is a ballast control integrated circuit (IC) for a fluorescent lamp. FAN7711 incorporates a preheating / ignition function, controlled by an user-selected external capacitor, to increase lamp life. The FAN7711 detects switch operation from after ignition mode through an internal active Zero-Voltage Switching (ZVS) control circuit. This control scheme enables the FAN7711 to detect an open-lamp condition, without the expense of external circuitry, and prevents stress on MOSFETs. The high-side driver built into the FAN7711 has a commonmode noise cancellation circuit that provides robust operation against high-dv/dt noise intrusion. Low Start-up and Operating Current: 120μA, 3.2mA Under-Voltage Lockout with 1.8V of Hysteresis Adjustable Run Frequency and Preheat Time Internal Active ZVS Control Internal Protection Function (Latch Mode) Internal Clamping Zener Diode High Accuracy Oscillator Soft-Start Functionality Applications 8-DIP 8-SOP Electronic Ballast Ordering Information Part Number Package FAN7711N 8-DIP FAN7711M Pb-Free Operating Temperature Range Packing Method Yes -25°C ~ 125°C Tube Tube 8-SOP FAN7711MX Tape & Reel Typical Application D5 R3 D6 R1 U1 D1 VDD D2 Main Supply RT C1 CPH D3 D4 GND C2 R2 C3 1 8 2 7 FAN7711 3 6 4 5 VB HO R4 Q1 VS LO C4 D7 C5 L1 C6 R5 Q2 Lamp C7 FAN7711 Rev. 1.00 Figure 1. Typical Application Circuit for Compact Fluorescent Lamp © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com FAN7711 — Ballast Control Integrated Circuit May 2007 V DD 1 HIGH-SIDE DRIVER VB 10V REG VDD sense Reference IPH 4V RT 2 PRE-HEAT Control BGR UVLO IPH* IRT CPH CPH 0A BIAS TSD 3V 5V R Q S Q SDL SYSHALT DEAD-TIME Control Yes 2μA VB Q R Q 7 HO 6 VS 5 LO SET RESET LOW-SIDE GATE DRIVER VDDH/V DD LSH VDDH/V DD LSH OSCILLATOR No S SDH UVLO IPH* CPH<3V 12μA Noise Canceller BIAS & SYSTEM LATCH IRT 8 UVLO SHORT-PULSE GENERATOR IPH=0.6*IRT 15V SHUNT REGULATOR DELAY SDL SDH CPH 3 SDL SDH S Q R Q OUTPUT TRANSITION SENSING ADAPTIVE ZVS CONTROLLER RESET 5V/3V SYSHALT ADAPTIVE ZVS ENABLE LOGIC 4 GND FAN7711 Rev. 1.00 Figure 2. Functional Block Diagram Pin Configuration VB HO VS LO 8 7 6 5 FAN7711 YWW (YWW : Work Week Code) 1 2 3 4 VDD RT CPH GND FAN7711 Rev. 1.00 Figure 3. Pin Configuration (Top View) Pin Definitions Pin # Name 1 VDD Supply voltage Description 2 RT Oscillator frequency set resistor 3 CPH Preheating time set capacitor 4 GND Ground 5 LO Low-side output 6 VS High-side floating supply return 7 HO High-side output 8 VB High-side floating supply © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 2 FAN7711 Ballast Control Integrated Circuit Internal Block Diagram Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified. Symbol Parameter Min. Typ. Max. Unit VB High-side floating supply -0.3 625 V VS High-side floating supply return -0.3 600 V VIN RT, CPH pins input voltage -0.3 8 V ICL Clamping current level 25 mA dVS/dt TA TSTG Allowable offset voltage slew rate 50 V/ns Operating temperature range -25 125 °C Storage temperature range -65 150 °C PD Power dissipation θJA Thermal resistance (junction-to-air) 8-SOP 0.625 8-DIP 1.2 8-SOP 200 8-DIP 100 W °C/W Note: 1. Do not supply a low-impedance voltage source to the internal clamping Zener diode between the GND and the VDD pin of this device. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 3 FAN7711 Ballast Control Integrated Circuit Absolute Maximum Ratings VBIAS (VDD, VBS) = 14.0V, TA = 25°C, unless otherwise specified. Symbol Characteristics Conditions Min. Typ. Max. Unit Supply Voltage Section VDDTH(ST+) VDD UVLO positive going threshold VDD increasing 12.4 13.4 14.4 VDDTH(ST-) VDD UVLO negative going threshold VDD decreasing 10.8 11.6 12.4 VDDHY(ST) VDD-side UVLO hysteresis 1.8 14.8 V VCL Supply clamping voltage IDD =10mA 15.2 IST Start-up supply current VDD = 10V 120 μA IDD Dynamic operating supply current 50kHz, CL = 1nF 3.2 mA High-Side Supply Section (VB-VS) VHSTH(ST+) High-side UVLO positive going threshold VBS increasing 8.5 9.2 10.0 VHSTH(ST-) High-side UVLO negative going threshold VBS decreasing 7.9 8.6 9.5 VHSHY(ST) High-side UVLO hysteresis V 0.6 IHST High-side quiescent supply current VBS = 14V 50 μA IHD High-side dynamic operating supply current 50kHz, CL = 1nF 1 mA ILK Offset supply leakage current VB = VS = 600V 45 μA V Oscillator Section 2.5 3.0 3.5 IPH CPH pin charging current during preheating VCPH = 1V 1.25 2.00 2.85 IIG CPH pin charging current during ignition VCPH = 4V 8 12 16 VMPH CPH pin preheating voltage range 7.0 μA VMO CPH pin voltage level at running mode V fPRE Preheating frequency RT = 80kΩ, VCPH = 2V fOSC Running frequency RT = 80kΩ DTMAX Maximum dead time VCPH = 1V, VS = GND during preheat mode 3.1 μs DTMIN Minimum dead time VCPH = 6V, VS = GND during run mode 1.0 μs 72 85 98 kHz 48.7 53.0 57.3 kHz Output Section IOH+ High-side driver sourcing current PW = 10μs 250 350 IOH- High-side driver sinking current PW = 10μs 500 650 IOL+ Low-side driver sourcing current PW = 10μs 250 350 500 650 IOL- Low-side driver sink current PW = 10μs tHOR High-side driver turn-on rising time CL = 1nF, VBS = 15V 45 tHOL High-side driver turn-off rising time CL = 1nF, VBS = 15V 25 tLOR Low-side driver turn-on rising time CL = 1nF, VBS = 15V 45 tLOL Low-side driver turn-off rising time CL = 1nF, VBS = 15V 25 VS(2) Maximum allowable negative VS swing range for signal propagation to high-side output mA ns -9.8 V Protection Section VCPHSD Shutdown voltage ISD Shutdown current TSD VRT = 0 after run mode Thermal shutdown(2) 2.6 V 250 165 450 μA °C Note: 2. This parameter, although guaranteed, is not 100% tested in production. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 4 FAN7711 Ballast Control Integrated Circuit Electrical Characteristics 3.0 200 2.5 160 IPH [μA] IST [μA] 180 140 120 2.0 1.5 100 80 -40 -20 0 20 40 60 80 100 1.0 -40 120 -20 0 40 60 80 100 120 Figure 5. Preheating Current vs. Temp. 16 4.0 14 3.5 IDD [mA] IIG [μA] Figure 4. Start-Up Current vs. Temp. 12 10 3.0 2.5 8 -40 -20 0 20 40 60 80 100 2.0 -40 120 -20 0 Temperature [°C] 60 80 100 120 400 80 ISD [μA] 300 60 40 200 100 20 -20 0 20 40 60 80 100 0 -40 120 Temperature [°C] -20 0 20 40 60 80 100 120 Temperature [°C] Figure 8. Start-Up Current vs. Temp. Figure 9. Shutdown Current vs. Temp. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 40 Figure 7. Operating Current vs. Temp. 100 0 -40 20 Temperature [°C] Figure 6. Ignition Current vs. Temp IHST [μA] 20 Temperature [°C] Temperature [°C] www.fairchildsemi.com 5 FAN7711 Ballast Control Integrated Circuit Typical Characteristics 10.0 9.6 VHSTH [V] ST+ VDDTH [V] 14.4 14.0 13.6 13.2 12.8 12.4 12.0 11.6 11.2 10.8 10.4 -40 ST- ST+ 9.2 8.8 ST- 8.4 -20 0 20 40 60 80 100 8.0 -40 120 -20 0 Temperature [°C] Figure 10. VDD UVLO vs. Temp. 2.8 16.0 2.6 VCPHSD [V] VCL [V] 15.8 15.6 15.4 60 80 100 1.2 -40 120 -20 0 Figure 12. VDD Clamp Voltage vs. Temp. 60 80 100 120 100 95 fPRE [kHz] 56 fOSC [kHz] 40 Figure 13. Shutdown Voltage vs. Temp. 58 54 52 90 85 80 50 75 -20 0 20 40 60 80 100 70 -40 120 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 14. Running Frequency vs. Temp. Figure 15. Preheating Frequency vs. Temp. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 20 Temperature [°C] Temperature [°C] 48 -40 120 1.8 1.4 40 100 2.0 1.6 20 80 2.2 15.0 0 60 2.4 15.2 -20 40 Figure 11. VBS UVLO vs. Temp. 16.2 14.8 -40 20 Temperature [°C] www.fairchildsemi.com 6 FAN7711 Ballast Control Integrated Circuit Typical Characteristics (Continued) 1.8 4.0 3.6 DTMAX [μs] DTMIN [μs] 1.6 1.4 1.2 1.0 -20 0 20 40 60 80 100 2.0 -40 120 Temperature [°C] -20 0 20 40 60 80 100 120 Temperature [°C] Figure 16. Minimum Dead Time vs. Temp. Figure 17. Maximum Dead Time vs. Temp. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 2.8 2.4 0.8 0.6 -40 3.2 www.fairchildsemi.com 7 FAN7711 Ballast Control Integrated Circuit Typical Characteristics (Continued) 1. Under-Voltage Lockout (UVLO) Function Before the lamp is ignited, the lamp impedance is very high. Once the lamp is turned on, the lamp impedance significantly decreases. Since the resonant peak is very high due to the high-resistance of the lamp at the instant of turning on the lamp, the lamp must be driven at higher frequency than the resonant frequency, shown as (A) in Figure 19. In this mode, the current supplied by the inverter mainly flows through CP. CP connects both filaments and makes the current path to ground. As a result, the current warms up the filament for easy ignition. The amount of the current can be adjusted by controlling the oscillation frequency or changing the capacitance of CP. The driving frequency, fPRE, is called preheating frequency and is derived by: The FAN7711 has UVLO circuits for both high-side and low-side circuits. When VDD reaches VDDTH(ST+), UVLO is released and the FAN7711 operates normally. At UVLO condition, FAN7711 consumes little current, noted IST. Once UVLO is released, FAN7711 operates normally until VDD goes below VDDTH(ST-), the UVLO hysteresis. At UVLO condition, all latches that determine the status of the IC are reset. When the IC is in the shutdown mode, the IC can restart by lowering VDD below VDDTH(ST-). FAN7711 has a high-side gate driver circuit. The supply for the high-side driver is applied between VB and VS. To protect the malfunction of the driver at low supply voltage, between VB and VS, FAN7711 provides an additional UVLO circuit between the supply rails. If VBVS is under VHSTH(ST+), the driver holds low-state to turn off the high-side switch, as shown in Figure 18. As long as VB-VS is higher than VHSTH(ST-) after VB-VS exceeds VHSTH(ST+), operation of the driver continues. After the warm-up, the FAN7711 decreases the frequency, shown as (B) of Figure 19. This action increases the voltage of the lamp and helps the fluorescent lamp ignite. The ignition frequency is described as a function of CPH voltage, as follows: 2. Oscillator The ballast circuit for a fluorescent lamp is based on the LCC resonant tank and a half-bridge inverter circuit, as shown in Figure 18. To accomplish Zero-Voltage Switching (ZVS) of the half-bridge inverter circuit, the LCC is driven at a higher frequency than its resonant frequency, which is determined by L, CS, CP, and RL, where RL is the equivalent lamp's impedance fIG = ⎡⎣0.3 × ( 5-VCPH ) + 1⎤⎦ × fOSC Equation 2 is valid only when VCPH is between 3V to 5V before FAN7711 enters running mode. Once VCPH reaches 5V, the internal latch records the exit from ignition mode. Unless VDD is below VDDTH(ST-), the preheating and ignition modes appear only once during lamp start transition. VDC FAN7711 VDD RT VB Oscillator High-side driver HO LCC resonant tank RT CPH CPH Dead-time controller GND Low-side driver VS L CS RL Finally, the lamp is driven at a fixed frequency by an external resistor, RT, shown as (C) of Figure 19. If VDD is higher than VDDTH(ST+) and UVLO is released, the voltage of RT pin is regulated to 4V. This voltage adjusts the oscillator's control current according to the resistance of RT. Because this current and an internal capacitor set the oscillation frequency, the FAN7711 does not need any external capacitors. Filament CP LO FAN7711 Rev. 1.00 equivalent lamp impedance Figure 18. Resonant Inverter Circuit Based on LCC Resonant Tank The proposed oscillation characteristic is given by: The transfer function of LCC resonant tank is heavily dependent on the lamp impedance, RL, as illustrated in Figure 19. The oscillator in FAN7711 generates effective driving frequencies to assist lamp ignition and improve lamp life longevity. Accordingly, the oscillation frequency is changed in the following sequence: fOSC = Preheating freq.->Ignition freq.-> Normal running freq. 4 × 10 9 RT (EQ 3) Even in the active ZVS mode, shown as (D) in Figure 19, the oscillation frequency is not changed. The dead-time is varied according to the resonant tank characteristic. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 (EQ 2) where VCPH is the voltage of CPH capacitor. . VDD (EQ 1) fPRE = 1.6 × fOSC www.fairchildsemi.com 8 FAN7711 Ballast Control Integrated Circuit Typical Application Information (C) Active ZVS mode 40dB CPH voltage varies by active ZVS control circuit 8 (B) Ignition Mode 7 6 DTMAX RL=100k RL=10k Preheating frequency 3 2 1 Dead Time[μs] (B) 0dB (C) RL=1k (A) Preheating Mode 4 3 DTMIN 20dB 5 2 0 (D) Shutdown mode 1 0 time Oscillation Frequency (A) Preheating Frequency:fPRE Preheating Mode Ignition Mode Running frequency RL=500 t0 Running Frequency: fOSC Running Mode t1 t2 t3 time FAN7711 Rev. 1.00 FAN7711 Rev. 1.00 (D) Dead-time control mode at fixed frequency Figure 20. Operation Modes Figure 19. LCC Transfer Function in Terms of Lamp Impedance 3.1 Preheating Mode (t0~t1) When VDD exceeds VDDTH(ST+), the FAN7711 starts operation. At this time, an internal current source (IPH) charges CPH. CPH voltage increases from 0V to 3V in preheating mode. Accordingly, the oscillation frequency follows the Equation 4. In this mode, the lamp is not ignited, but warmed up for easy ignition. The preheating time depends on the size of CPH: 3. Operation Modes FAN7711 has four operation modes: (A) preheating mode, (B) ignition mode, (C) active ZVS mode, and (D) shutdown mode, depicted in Figure 20. The modes are automatically selected by the voltage of CPH capacitor, shown in Figure 20. In modes (A) and (B), the CPH acts as a timer to determine the preheating and ignition times. After the preheating and ignition modes, the role of the CPH is changed to stabilize the active ZVS control circuit. In this mode, the dead time of the inverter is selected by the voltage of CPH. Only when FAN7711 is in active ZVS mode is it possible to shut off the whole system using CPH pin. Pulling the CPH pin below 2V in active ZVS mode, causes the FAN7711 to enter shutdown mode. In shutdown mode, all active operation is stopped, except UVLO and some bias circuitry. The shutdown mode is triggered by the external CPH control or the active ZVS circuit. The active ZVS circuit automatically detects lamp removal (open-lamp condition) and decreases CPH voltage below 2V to protect the inverter switches from damage. fpreheat = 3 × CPH IPH [Sec.] (EQ 4) According to preheating process, the voltage across the lamp to ignite is reduced and the lifetime of the lamp is increased. In this mode, the dead time is fixed at its maximum value. 3.2 Ignition Mode (t1~t2) When the CPH voltage exceeds 3V, the internal current source to charge CPH is increased about six times larger than IPH, noted as IIG, causing rapid increase in CPH voltage. The internal oscillator decreases the oscillation frequency from fPRE to fOSC as CPH voltage increases. As depicted in Figure 20, lowering the frequency increases the voltage across the lamp. Finally, the lamp ignites. Ignition mode is defined when CPH voltage lies between 3V and 5V. Once CPH voltage reaches 5V, the FAN7711 does not return to ignition mode, even if the CPH voltage is in that range, until the FAN7711 restarts from below VDDTH(ST-). Since the ignition mode continues when CPH is from 3V to 5V, the ignition time is given by: t ignition = 2 × CPH IIG [Sec.] (EQ 5) In this mode, dead time varies according to the CPH voltage. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 9 FAN7711 Ballast Control Integrated Circuit CPH voltage [V] If the voltage of capacitor CPH is decreased below ~2.6V by an external application circuit or internal protection circuit, the IC enters shutdown mode. Once the IC enters shutdown mode, this status continues until an internal latch is reset by decreasing VDD below VDDTH(ST-). Figure 22 shows an example of external shutdown control circuit. When CPH voltage exceeds 5V, the operating frequency is fixed to fOSC by RT. However, active ZVS operation is not activated until CPH reaches ~6V. The FAN7711 prepares for active ZVS operation from the instant CPH exceeds 5V during t2 to t3. When CPH becomes higher than ~6V at t3, the active ZVS operation is activated. To determine the switching condition, FAN7711 detects the transition time of the output (VS pin) of the inverter by using VB pin. From the output-transition information, FAN7711 controls the dead time to meet the ZVS condition. If ZVS is satisfied, the FAN7711 slightly increases the CPH voltage to reduce the dead time and to find optimal dead time, which increases the efficiency and decreases the thermal dissipation and EMI of the inverter switches. If ZVS fails, the FAN7711 decreases CPH voltage to increase the dead time. CPH voltage is adjusted to meet optimal ZVS operation. During the active ZVS mode, the amount of the charging/ discharging current is the same as IPH. Figure 21 depicts normal operation waveforms. 3 Shutdown Figure 22. External Shutdown Circuit The amount of the CPH charging current is the same as IPH, making it possible to shut off the IC using small signal transistor. FAN7711 provides active ZVS operation by controlling the dead time according to the voltage of CPH. If ZVS fails, even at the maximum dead time, FAN7711 stops driving the inverter. The FAN7711 thermal shutdown circuit senses the junction temperature of the IC. If the temperature exceeds ~160°C, the thermal shutdown circuit stops operation of the FAN7711. time Dead time settling 3V 2V Ignition Lamp Voltage Running mode Active ZVS mode The current usages of shutdown mode and undervoltage lockout status are different. In shutdown mode, some circuit blocks, such as bias circuits, are kept alive. Therefore, the current consumption is slightly higher than during under-voltage lockout. time 0V time OUT Preheating period (Filament warm-up) 4. Automatic Open-Lamp Detection 0V FAN7711 can automatically detect the open-lamp condition. When the lamp is opened, the resonant tank fails to make a closed-loop to the ground, as shown in Figure 23. The supplied current from the VS pin is used to charge and discharge the charge pump capacitor, CP. Since the open-lamp condition means resonant tank absence, it is impossible to meet ZVS condition. In this condition, the power dissipation of the FAN7711, due to capacitive load drive, is estimated as: time Zoom-in t=1/fOSC t=1/fOSC GND FAN7711 Rev. 1.00 VDD Active ZVS activated CPH FAN7711 4 VDDTH(ST+) VDDTH(ST-) CPH 6V 5V Q1 CPH t=1/fOSC Perfect ZVS t=1/fOSC Dead time FAN7711 Rev. 1.00 Figure 21. Typical Transient Waveform from Preheating to Active ZVS Mode PDissipation = 1 × CP × VDC 2 × f 2 [W ] (EQ 6) where f is driving frequency and VDC is DC-link voltage. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 10 FAN7711 Ballast Control Integrated Circuit 3.4 Shutdown Mode 3.3 Running and Active Zero-Voltage Switching (AZVS) Modes (t2~) VDC When VDD is lower than VDDTH(ST+), it consumes very little current, IST, making it possible to supply current to the VDD pin using a resistor with high resistance (Rstart in Figure 25). Once UVLO is released, the current consumption is increased and whole circuits are operated, which requires additional power supply for stable operation. The supply must deliver at least several mA. A charge pump circuit is a cost-effective method to create an additional power supply and allows CP to be used to reduce the EMI. FAN7711 VDD CVDD RT VB Oscillator High-side driver CB HO LCC resonant tank RT CPH Dead-time controller CPH GND Low-side driver L VS RL CP LO CCP Dp1 FAN7711 Rev. 1.00 Filament Open CS equivalent lamp impedance Dp2 Charge Pump Figure 23. Current Flow When the Lamp is Open VDC DB Rstart + Ccp Dp1 equivalent lamp impedance Dp2 Charge Pump Figure 25. Local Power Supply for VDD Using a Charge Pump Circuit As presented in Figure 25, when VS is high, the inductor current and CCP create an output transition with the slope of dv/dt. The rising edge of VS charges CCP. At that time, the current that flows through CCP is: I ≅ CCP × dv dt (EQ 7) This current flows along the path (1). It charges CVDD, which is a bypass capacitor to reduce the noise on the supply rail. If CVDD is charged over the threshold voltage of the internal shunt regulator, the shunt regulator is turned on and regulates VDD with the trigger voltage. Automatic Shutdown When VS is changing from high to low state, CCP is discharged through Dp2, shown as path (2) in Figure 26. These charging/discharging operations are continued until FAN7711 is halted by shutdown operation. The charging current, I, must be large enough to supply the operating current of FAN7711. time Active ZVS mode time The supply for the high-side gate driver is provided by the boot-strap technique, as illustrated in Figure 26. When the low-side MOSFET connected between VS and GND pins is turned on, the charging current for VB flows through DB. Every low VS gives the chance to charge the CB. Therefore CB voltage builds up only when FAN7711 operates normally. Shutdown Ignition period mode FAN7711 Rev. 1.00 Figure 24. CPH Voltage Variation in Open-Lamp Condition © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 CP LO FAN7711 Rev. 1.00 Running mode Preheating period (Filament warm-up) dv/dt (2) LCC resonant tank L CS Filament Open VS (1) time 0V CB RL 3V 2V OUT Shunt regulator GND Shutdown Release Restart Active ZVS activated VB HO CPH VDDTH(ST+) VDDTH(ST-) CPH 6V 5V RT CVDD Figure 24 illustrates the waveforms during the openlamp condition. In this condition, the charging and discharging current of CP is directly determined by FAN7711 and considered hard-switching condition. The FAN7711 tries to meet ZVS condition by decreasing CPH voltage to increase dead time. If ZVS fails and CPH goes below 2V, even though the dead time reaches its maximum value, FAN7711 shuts off the IC to protect against damage. To restart FAN7711, VDD must be below VDDTH(ST-) to reset an internal latch circuit, which remembers the status of the IC. VDD FAN7711 VDD Assuming that CP, VDC, and f are 1nF, 311V, and 50kHz, respectively; the power dissipation reaches about 2.4W and the temperature of FAN7711 is increased rapidly. If no protection is provided, the IC can be damaged by the thermal attack. Note that hard-switching condition during the capacitive-load drive causes lots of EMI. www.fairchildsemi.com 11 FAN7711 Ballast Control Integrated Circuit 5. Power Supply DB FAN7711 Ballast Control Integrated Circuit When VS goes high, the diode DB is reverse-biased and CB supplies the current to the high-side driver. At this time, since CB discharges, VB-VS voltage decreases. If VB-VS goes below VHSTH(ST-), the high-side driver cannot operate due to the high-side UVLO protection circuit. CB must be chosen to be large enough not to fall into UVLO range due to the discharge during a half of the oscillation period, especially when the high-side MOSFET is turned on. DB Bootstrap circuit VDC Rstart VDD + CVDD FAN7711 RT CPH VB CB HO Shunt regulator Charging path VS LCC resonant tank L CS Filament Open RL GND CCP Dp1 FAN7711 Rev. 1.00 CP LO equivalent lamp impedance Dp2 Charge Pump Figure 26. Implementation of Floating Power Supply Using the Bootstrap Method © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 12 1. Start-up Circuit If Rstart meets Equation 14, restart operation is possible. However, it is not recommended to choose Rstart at that range because VDD rising time could be long and it increases the lamp's turn-on delay time, as depicted in Figure 27. The start-up current (IST) is supplied to the IC through the start-up resistor, Rstart. Once operation starts, the power is supplied by the charge pump circuit. To reduce the power dissipation in Rstart, select Rstart as high as possible, considering the current requirements at startup. For 220VAC power, the rectified voltage by the fullwave rectifier makes DC voltage, as shown in Equation 8. The voltage contains lots of AC component due to poor regulation characteristic of the simple full-wave rectifier: VDC = 2 × 220[V ] ≅ 311[V ] VDD VCL VDDTH(ST+) VDDTH(ST-) tstart (EQ 8) Considering the selected parameters, Rstart must satisfy the following equation: VDC − VDDTH (ST + ) R start > IST 0 Figure 27. VDD Build-up (EQ 9) Figure 28 shows the equivalent circuit for estimating tstart. From the circuit analysis, VDD variation versus time is given by: From Equation 9, Rstart is selected as: VDC − VDDTH (ST + ) IST > R start ( (EQ 10) VDD (t ) = (VDC − Rstart ⋅ IST ) 1 − e −t /(Rstart ⋅CVDD ) Note that if choosing the maximum Rstart, it takes long time for VDD to reach VDDTH(st+). Considering VDD rising time, Rstart must be selected as shown in Figure 30. − VCL ) R start 2 < 1 [W ] 4 tstart = −Rstart ⋅ CVDD ⋅ ln tstart ≈ Rstart ⋅ CVDD ⋅ VDDTH (ST + ) VDC − Rstart ⋅ IST − VDDTH (ST + ) (EQ 17) IST VDD RT (1) For safe start-up without restart in shutdown mode: 2 (EQ 16) Rstart From Equations 10 - 12; it is possible to select Rstart: 4 (VDC − VCL ) < Rstart < VDD − Rstart ⋅ IST Accordingly, tstart can be controlled by adjusting the value of Rstart and CVDD. For example, if VDC=311V, Rstart=560k, CVDD=10µF, Ist=120µA, and VDDTH(ST+)= 13.5V, tstart is about 0.33s. (EQ 12) > R start VDC − Rstart ⋅ IST − VDDTH (ST + ) In general, Equation 16 can be simplified as: (EQ 11) When the IC operates in shutdown mode due to thermal protection, open-lamp protection, or hard-switching protection, the IC consumes shutdown current, ISD, which is larger than IST. To prevent restart during this mode, Rstart must be selected to cover ISD current consumption. The following equation must be satisfied: ISD (EQ 15) From Equation 15, it is possible to calculate tstart by substituting VDD(t) with VDDTH(ST+): Assuming VDC=311V and VCL=15V, the minimum resistance of Rstart is about 350kΩ. VDC − VDDTH (ST + ) ) where CVDD is the total capacitance of the bypass capacitors connected between VDD and GND. Another important concern for choosing Rstart is the available power rating of Rstart. To use a commercially available, low-cost 1/4Ω resistor, Rstart must obey the following rule: (VDC time FAN7711 Rev. 1.00 VDC − VDDTH (ST + ) ISD CVDD CPH (EQ 13) GND (2) For safe start-up with restart from shutdown mode: VDC − VDDTH (ST + ) ISD < Rstart < VDC − VDDTH (ST + ) IST FAN7711 Rev. 1.00 (EQ 14) Figure 28. Equivalent Circuit During Start © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 13 FAN7711 Ballast Control Integrated Circuit Design Guide 3. Lamp Turn-on Time For the IC supply, the charge pump method is used in Figure 29. Since CCP is connected to the half-bridge output, the supplied current by CCP to the IC is determined by the output voltage of the half-bridge. The turn-on time of the lamp is determined by supply build-up time tstart, preheating time, and ignition time; where tstart has been obtained by Equation 17. When the IC's supply voltage exceeds VDDTH(ST+) after turn-on or restart, the IC operates in preheating mode. This operation continues until CPH pin's voltage reaches ~3V. In this mode, CPH capacitor is charged by IPH current, as depicted in Figure 30. The preheating time is achieved by calculating: When the half-bridge output shows rising slope, CCP is charged and the charging current is supplied to the IC. The current can be estimated as: I = CCP V dV ≈ CCP DC dt DT (EQ 18) where DT is the dead time and dV/dt is the voltage variation of the half-bridge output. t preheat = 3 When the half-bridge shows falling slope, CCP is discharged through Dp2. Total supplied current, Itotal, to the IC during switching period, t, is: CPH IPH (EQ 21) The preheating time is related to lamp life (especially filament); therefore, the characteristics of a given lamp should be considered when choosing the time. (EQ 19) Itotal = I ⋅ DT = CCP ⋅ VDC VDD From Equation 19, the average current, Iavg, supplied to the IC is obtained by: RT IPH CPH Iavg = Itotal CCP ⋅ VDC = = CCP ⋅ VDC ⋅ f t t CPH (EQ 20) GND FAN7711 Rev. 1.00 For the stable operation, Iavg must be higher than the required current. If Iavg exceeds the required current, the residual current flows through the shunt regulator implemented on the chip, which can cause unwanted heat generation. Therefore, CCP must be selected considering stable operation and thermal generation. Figure 30. Preheating Timer Compared to the preheating time, it is almost impossible to exactly predict the ignition time, whose definition is the time from the end of the preheating time to ignition. In general, the lamp ignites during the ignition mode. Therefore, assume that the maximum ignition time is the same as the duration of ignition mode, from 3V until CPH reaches 5V. Thus, ignition time can be defined as: For example, if CCP=0.5nF, VDC=311V, and f=50kHz, Iavg is ~7.8mA; it is enough current for stable operation. Charging mode CCP Dp1 To VDD Idp1 Dp2 CVDD tignition = (5 − 3 ) Discharging mode CCP Dp1 Idp1=0 Dp2 To VDD CPH CPH =2 IIG IIG (EQ 22) Note that, at ignition mode, CPH is charged by IIG, which is six times larger than IPH. Consequently, total turn-on time is approximately: CVDD f=1/t VDC VDD Build-Time + Preheating Time + Ignition Time = DT:dead time Half-bridge output tignition = (5 − 3 ) CPH CPH =2 [Sec.] IIG IIG (EQ 23) Idp1 FAN7711 Rev. 1.00 Figure 29. Charge Pump Operation © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 14 FAN7711 Ballast Control Integrated Circuit 2. Current Supplied by Charge Pump In addition, the ground return path of the timing components (CPH, RT) and VDD decoupling capacitor should be connected directly to the IC GND lead and not via separate traces or jumpers to other ground traces on the board. These connection techniques prevent highcurrent ground loops from interfering with sensitive timing component operations and allow the control circuit to reduce common-mode noise due to output switching. Component selection and placement on PCB is important when using power control ICs. Bypass the VCC to GND as close to the IC terminals as possible with a low-ESR/ ESL capacitor, as shown in Figure 31. This bypassed capacitor (CBP) can reduce the noise from the power supply parts, such as start-up resistor and charge pump. The signal GND must be separated from the power GND. So, the signal GND should be directly connected to the rectify capacitor using an individual PCB trace. HOT Cbp RT Cph One point SGND SGND PGND Figure 31. Preheating Timer © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 15 FAN7711 Ballast Control Integrated Circuit 4. PCB Guideline Rectified Waveform D5 L2 VDC D6 ZD 1 R1 D1 FUSE C6 R3 R10 D2 R11 R4 NTC TNR L1 C1 C5 C3 R2 C2 1 INV 2 COMP 3 MOT 4 CS C4 R6 D3 D4 R7 FAN7529 AC INPUT D7 VCC 8 OUT 7 GND 6 ZCD 5 D8 M1 R5 C8 C7 C9 C11 R13 R8 R12 C10 R9 Rectified Waveform L3 D50 R50 C55 D51 R51 Lamp C56 R52 1 VDD 3 CPH R53 C51 C50 C52 4 GND FAN7711 2 RT VB 8 HO 7 M2 R54 VS 6 LO 5 C53 D52 C54 L4 R55 C57 R56 M3 Lamp R57 C58 FAN7711 Rev. 1.00 Figure 32. Application Circuit of 32W Two Lamps © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 16 FAN7711 Ballast Control Integrated Circuit Typical Application Diagram Part Value Note Resistor Part Value Note C55 15nF/630V Miller Capacitor R1 330kΩ 1/2W C56 2.7nF/1kV Miller Capacitor R2 750kΩ 1/4W C57 15nF/630V Miller Capacitor R3 100Ω 1/2W C58 2.7nF/1kV Miller Capacitor R4 20kΩ 1/4W Diode R5 47Ω 1/4W D1 1N4007 1kV,1A R6 10kΩ 1/4W D2 1N4007 1kV,1A R7 50kΩ 1/4W D3 1N4007 1kV,1A R8 47kΩ 1/4W D4 1N4007 1kV,1A R9 0.3Ω 1W D5 UF4007 Ultra Fast,1kV,1A R10 1MΩ 1/4W D6 UF4007 Ultra Fast,1kV,1A R11 1MΩ 1/4W D7 1N4148 100V,1A R12 12.6kΩ 1/4W,1% D8 1N4148 100V,1A R13 220kΩ 2W D50 UF4007 Ultra Fast,1kV,1A R50 150kΩ 1/4W D51 UF4007 Ultra Fast,1kV,1A R51 150kΩ 1/4W D52 UF4007 Ultra Fast,1kV,1A R52 150kΩ 1/4W ZD1 IN4746A Zener 18V, 1W R53 90kΩ 1/4W,1% R54 10Ω 1/4W M1 FQPF5N60C MOSFET 500V,6A R55 47Ω 1/4W M2 FQPF5N50C 500V,5A R56 47kΩ 1/4W M3 FQPF5N50C 500V,5A R57 47Ω 1/4W R58 47kΩ 1/4W Fuse 3A/250V Fuse Capacitor TNR 47nF/275VAC Box Capacitor C2 150nF/275VAC Box Capacitor C3 2200pF/3kV Ceramic Capacitor C4 2200pF/3kV Ceramic Capacitor C5 0.22µF/630V Miller Capacitor C1 C6 12nF/50V Ceramic Capacitor C7 22µF/50V Electrolytic Capacitor C8 39pF/50V Ceramic Capacitor C9 1µF/50V Ceramic Capacitor TNR 471 NTC NTC 10D-09 Line Filter LF1 40mH Transformer L1 0.94mH(75T:10T) EI2820 Inductor C10 0.1µF/50V Ceramic Capacitor L2 3.2mH(130T) EI2820 C11 47µF/450V Electrolytic Capacitor L3 3.2mH(130T) EI2820 C50 10µF/50V Electrolytic Capacitor C51 1µF/50V Ceramic Capacitor U1 FAN7711 Fairchild Semiconductor C52 0.47µF/25V Ceramic Capacitor,5% U2 FAN7529 Fairchild Semiconductor C53 100nF/50V Ceramic Capacitor C54 470pF/1kV Ceramic Capacitor IC © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 17 FAN7711 Ballast Control Integrated Circuit Component List for 32W Two Lamps Part Value Note Part Value Resistor Note Diode R1 470kΩ 1/4W D1 1N4007 1kV/1A R2 90kΩ 1/4W D2 1N4007 1kV/1A R3 10Ω 1/4W D3 1N4007 1kV/1A R4 47Ω 1/4W D4 1N4007 1kV/1A R5 47Ω 1/4W D5 UF4007 1kV/1A,Ultra Fast D6 UF4007 1kV/1A,Ultra Fast D7 UF4007 1kV/1A,Ultra Fast Capacitor C1 22µF/250V Electrolytic Capacitor Inductor C2 10µF/50V Electrolytic Capacitor C3 470nF/25V Miller Capacitor C4 100nF/25V Miller Capacitor Q1 FQPF1N50C 500V,1A C5 470pF/630V Miller Capacitor Q2 FQPF1N50C 500V,1A C6 33nF/630V Miller Capacitor C7 3.3nF/1kV Miller Capacitor L1 2.5mH (280T) EE1616S MOSFET IC U1 FAN7711 Fairchild Semiconductor Note: 3. Refer to the typical application circuit provided in Figure 1. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 18 FAN7711 Ballast Control Integrated Circuit Component List for 20W CFL FAN7711 Ballast Control Integrated Circuit Package Dimensions 8-SOP Dimensions are in millimeters unless otherwise noted. Figure 33. 8-Lead Small Outline Package (SOP) © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 19 FAN7711 Ballast Control Integrated Circuit Package Dimensions 8-DIP Dimensions are in inches and [millimeters] unless otherwise noted. Figure 34. 8-Lead Dual In-Line Package (DIP) © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 20 ® ACEx Across the board. Around the world.¥ ActiveArray¥ Bottomless¥ Build it Now¥ CoolFET¥ CorePLUS¥ CROSSVOLT¥ CTL™ Current Transfer Logic™ DOME¥ 2 E CMOS¥ ® EcoSPARK EnSigna¥ FACT Quiet Series™ ® FACT ® FAST FASTr¥ FPS¥ ® FRFET GlobalOptoisolator¥ GTO¥ HiSeC¥ i-Lo¥ ImpliedDisconnect¥ IntelliMAX¥ ISOPLANAR¥ MICROCOUPLER¥ MicroPak¥ MICROWIRE¥ Motion-SPM™ MSX¥ MSXPro¥ OCX¥ OCXPro¥ ® OPTOLOGIC ® OPTOPLANAR PACMAN¥ PDP-SPM™ POP¥ ® Power220 ® Power247 PowerEdge¥ PowerSaver¥ Power-SPM¥ ® PowerTrench Programmable Active Droop¥ ® QFET QS¥ QT Optoelectronics¥ Quiet Series¥ RapidConfigure¥ RapidConnect¥ ScalarPump¥ SMART START¥ ® SPM STEALTH™ SuperFET¥ SuperSOT¥-3 SuperSOT¥-6 SuperSOT¥-8 SyncFET™ TCM¥ ® The Power Franchise TinyBuck¥ ® TinyLogic TINYOPTO¥ TinyPower¥ TinyWire¥ TruTranslation¥ PSerDes¥ ® UHC UniFET¥ VCX¥ Wire¥ ™ TinyBoost¥ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Definition Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I27 © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.3 www.fairchildsemi.com 21 FAN7711 Ballast Control Integrated Circuit TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.