FAIRCHILD 74LCX541MSA

74LCX541
Low Voltage Octal Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
Features
General Description
■ 5V tolerant input and outputs
The LCX541 is an octal buffer/line driver designed to be
employed as memory and address drivers, clock drivers
and bus oriented transmitter/receivers. The LCX541 is a
non inverting option of the LCX540.
■ 2.3V–3.6V VCC specifications provided
■ 6.5ns tPD max (VCC = 3.3V), 10µA ICC max
■ Power-down high impedance inputs and outputs
This device is similar in function to the LCX244 while
providing flow-through architecture (inputs on opposite
side from outputs). This pinout arrangement makes this
device especially useful as an output port for microprocessors, allowing ease of layout and greater PC board
density.
■ Supports live insertion/withdrawal1
■ ±24 mA output drive (VCC = 3.0V)
■ Implements patented noise/ EMI reduction circuitry
■ Latch-up performance exceeds JEDEC 78 conditions
■ ESD performance
– Human body model > 2000V
– Machine model > 200V
■ Leadless Pb-Free DQFN package
The LCX541 is designed for low voltage applications
with capability of interfacing to a 5V signal environment.
The LCX541 is fabricated with an advanced CMOS
technology to achieve high speed operation while
maintaining CMOS low power dissipation.
Ordering Information
Package
Number
Package Description
74LCX541WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCX541SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Order Number
74LCX541BQX2
MLP020B Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),
JEDEC MO-241, 2.5 x 4.5mm
74LCX541MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX541MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
74LCX541MTC_NL3
MTC20
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC
MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDED J-STD-020B.
Notes:
1. To ensure the high impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum
value of the resistor is determined by the current-sourcing capability of the driver.
2. DQFN package available in Tape and Reel only.
3. “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
©2006 Fairchild Semiconductor Corporation
74LCX541 Rev. 2.0.0
1
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
February 2006
Pin Descriptions
IEEE/IEC
&
OE1
OE2
Description
OE1, OE2
3-STATE Output Enable Inputs
I0–I7
Inputs
O0–O7
Outputs
EN
I0
I1
I2
I3
I4
I5
I6
I7
O0
O1
O2
O3
O4
O5
O6
O7
Truth Table
Inputs
Connection Diagrams
Pin Assignments for
SOIC, SOP, SSOP, TSSOP
OE1
I0
I1
I2
I3
I4
I5
I6
I7
GND
Pin Names
1
20
2
19
3
18
4
17
5
16
6
7
15
14
8
13
9
12
10
11
Outputs
OE1
OE2
I
On
L
L
H
H
H
X
X
Z
X
H
X
Z
L
L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
VCC
OE2
O0
O1
O2
O3
O4
O5
O6
O7
Pad Assignment for DQFN
OE1 VCC
1
20
I0 2
19 OE2
I1 3
18 O0
I2 4
17 O1
I3 5
16 O2
I4 6
15 O3
I5 7
14 O4
I6 8
13 O5
I7 9
12 O6
10
11
GND O7
(Top View)
2
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Logic Symbol
The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are
not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the
conditions for actual device operation.
Symbol
Parameter
Conditions
Value
Units
VCC
Supply Voltage
−0.5 to +7.0
V
VI
DC Input Voltage
−0.5 to +7.0
V
VO
DC Output Voltage
−0.5 to +7.0
V
Output in 3-STATE
Output in HIGH or LOW
State4
−0.5 to VCC + 0.5
IIK
DC Input Diode Current
VI < GND
−50
mA
IOK
DC Output Diode Current
VO < GND
−50
mA
VO > VCC
+50
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current per Supply Pin
±100
mA
IGND
DC Ground Current per Ground Pin
±100
mA
TSTG
Storage Temperature
−65 to +150
°C
Recommended Operating Conditions5
Symbol
VCC
Parameter
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOH / IOL
Output Current
TA
Free-Air Operating Temperature
∆t / ∆V
Input Edge Rate
Conditions
Min.
Max.
Units
Operating
2.0
3.6
V
Data Retention
1.5
3.6
0
5.5
V
HIGH or LOW State
0
VCC
V
3-STATE
0
5.5
VCC = 3.0V − 3.6V
±24
VCC = 2.7V − 3.0V
±12
VCC = 2.3V − 2.7V
±8
VIN = 0.8V – 2.0V, VCC = 3.0V
mA
−40
85
°C
0
10
ns / V
Notes:
4. IO Absolute Maximum Rating must be observed.
5. Unused inputs or I/O’s must be held HIGH or LOW. They may not float.
3
74LCX541 Rev. 2.0.0
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Absolute Maximum Ratings
TA = −40°C to +85°C
Symbol
VIH
VIL
VOH
VOL
Parameter
Conditions
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
VCC (V)
Min.
2.3 − 2.7
1.7
2.7 − 3.6
2.0
Max.
V
2.3 − 2.7
0.7
2.7 − 3.6
0.8
IOH = −100µA
2.3 − 3.6
VCC – 0.2
IOH = –8 mA
2.3
1.8
IOH = −12 mA
2.7
2.2
IOH = −18 mA
3.0
2.4
IOH = −24 mA
3.0
2.2
IOL = 100µA
2.3 − 3.6
0.2
V
IOL = 8mA
2.3
0.6
IOL = 12 mA
2.7
0.4
IOL = 16 mA
3.0
0.4
IOL = 24 mA
3.0
0.55
2.3 − 3.6
±5.0
µA
0
10
µA
µA
II
Input Leakage Current
0 ≤ VI ≤ 5.5V
Power-Off Leakage Current
VI or VO = 5.5V
ICC
Quiescent Supply Current
VI = VCC or GND
2.3 − 3.6
10
3.6V ≤ VI, VO ≤
2.3 − 3.6
±10
2.3 − 3.6
500
Increase in ICC per Input
V
V
IOFF
∆ICC
Units
5.5V6
VIH = VCC = 0.6V
µA
AC Electrical Characteristics
TA = −40°C to +85°C, RL = 500Ω
Symbol
Parameter
VCC = 3.3V ± 0.3V
VCC = 2.7V
VCC = 2.5V ± 0.2V
CL = 50pF
CL = 50pF
CL = 30pF
Min.
Max.
Min.
Max.
Min.
Max.
Units
tPHL, tPLH
Propagation Delay
1.5
6.5
1.5
7.5
1.5
7.8
ns
tPZL, tPZH
Output Enable Time
1.5
8.5
1.5
9.5
1.5
10.5
ns
tPLZ, tPHZ
Output Disable Time
1.5
7.5
1.5
8.5
1.5
9.0
ns
tOSHL, tOSLH
Output to Output
Skew7
1.0
ns
Notes
6. Outputs disabled or 3-STATE only.
7. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the
same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t OSHL) or LOW-toHIGH (tOSLH).
4
74LCX541 Rev. 2.0.0
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
DC Electrical Characteristics
Symbol
VOLP
VOLV
Parameter
Conditions
VCC
(V)
TA = 25°C
Typical
Units
V
CL = 50 pF, VIH = 3.3V, VIL = 0V
3.3
0.8
CL = 30 pF, VIH = 2.5V, VIL = 0V
2.5
0.6
Quiet Output Dynamic Valley VOL CL = 50 pF, VIH = 3.3V, VIL = 0V
3.3
−0.8
CL = 30 pF, VIH = 2.5V, VIL = 0V
2.5
−0.6
Quiet Output Dynamic Peak VOL
V
Capacitance
Symbol
Parameter
Conditions
Typical
Units
CIN
Input Capacitance
VCC = Open, VI = 0V or VCC
7
pF
COUT
Output Capacitance
VCC = 3.3V, VI = 0V or VCC
8
pF
CPD
Power Dissipation Capacitance
VCC = 3.3V, VI = 0V or VCC, f = 10 MHz
25
pF
5
74LCX541 Rev. 2.0.0
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Dynamic Switching Characteristics
74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
AC Loading and Waveforms (Generic for LCX Family)
VCC
OPEN
500Ω
TEST
SIGNAL
tPLH, tPHI
tPZH, tPHZ
tPZL, tPLZ
GND
DUT
VI
CL
500Ω
Figure 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
Switch
tPLH, tPHL
tPZL, tPLZ
Open
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
GND
tPZH, tPHZ
DATA
IN
VCC
Vmi
tpxx
OUTPUT
CONTROL
GND
tPZL
tpxx
DATA
OUT
Waveform for Inverting and
Non-Inverting Functions
tS
tPLH
MR
OR
CLEAR
Vmo
OUTPUT
CONTROL
Vmi
tPZH
GND
VCC
GND
trec
Vmi
tr
VCC
tf
GND
tPHZ
Vmo
VCC
Setup Time, Hold Time and
Recovery Time for Logic
Propagation Delay, Pulse Width and
trec Waveforms
DATA
OUT
Vmi
tS
Vmo
tH
CONTROL
INPUT
Vmi
OUTPUT
Vmi
GND
trec
tPHL
VX
VOL
DATA
IN
VCC
Vmi
CLOCK
Vmo
3-STATE Output High Enable and
Disable Times for Logic
tW
CONTROL
IN
GND
tPLZ
DATA
OUT
Vmo
VCC
Vmi
ANY
OUTPUT
VOH
VY
90%
10%
90%
10%
VOH
VOL
trise and tfall
3-STATE Output Low Enable and
Disable Times for Logic
Figure 2. Waveforms (Input Characteristics; f = 1MHz, tr = tf = 3ns)
Symbol
3.3V ± 0.3V
VCC
2.7V
Vmi
Vmo
Vx
Vy
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
6
74LCX541 Rev. 2.0.0
2.5V ± 0.2V
VCC / 2
VCC / 2
VOL + 0.15V
VOH − 0.15V
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Input Stage
P2
P1
VCC
Data
ESD
P5
D2 N+/P–
X1
VDD
N1
N2
GTO™
Output
Input Stage
D6
N+/P–
P4
P3
N5
Enable
N4
ESD
D4 N+/P–
N3
7
74LCX541 Rev. 2.0.0
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Schematic Diagram (Generic for LCX Family)
Tape Format for DQFN
Package
Designator
Tape
Section
Number
Cavities
Cavity
Status
Cover Tape
Status
BQX
Leader (Start End)
125 (typ)
Empty
Sealed
Carrier
3000
Filled
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
Tape Dimensions inches (millimeters)
Reel Dimensions inches (millimeters)
Tape Size
A
B
C
D
N
W1
W2
12 mm
13.0
(330.0)
0.059
(1.50)
0.512
(13.00)
0.795
(20.20)
2.165
(55.00)
0.488
(12.4)
0.724
(18.4)
8
74LCX541 Rev. 2.0.0
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Tape and Reel Specification
74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC),
JEDEC MS-013, 0.300" Wide Package Number M20B
9
74LCX541 Rev. 2.0.0
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued) inches (millimeters) unless otherwise noted
20-Lead Small Outline Package (SOP),
EIAJ TYPE II, 5.3mm Wide Package Number M20D
10
74LCX541 Rev. 2.0.0
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued) inches (millimeters) unless otherwise noted
Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),
JEDEC MO-241, 2.5 x 4.5mm Package Number MLP020B
11
74LCX541 Rev. 2.0.0
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued) inches (millimeters) unless otherwise noted
20-Lead Shrink Small Outline Package (SSOP),
JEDEC MO-150, 5.3mm Wide Package Number MSA20
12
74LCX541 Rev. 2.0.0
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued) inches (millimeters) unless otherwise noted
20-Lead Thin Shrink Small Outline Package (TSSOP),
JEDEC MO-153, 4.4mm Wide Package Number MTC20
13
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I18
14
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
TRADEMARKS