CY7C1020CV33 512 K (32 K × 16) Static RAM 512 K (32 K × 16) Static RAM Features Functional Description ■ Pin- and function-compatible with CY7C1020CV33 ■ Temperature Ranges ❐ Commercial: 0 °C to 70 °C ❐ Industrial: –40 °C to 85 °C ❐ Automotive: –40 °C to 125 °C The CY7C1020CV33 is a high-performance CMOS static RAM organized as 32,768 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0 through A14). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O9 through I/O16) is written into the location specified on the address pins (A0 through A14). ■ High speed ❐ tAA = 10 ns ■ CMOS for optimum speed/power ■ Low active power ❐ 325 mW (max) ■ Automatic power-down when deselected ■ Independent control of upper and lower bits ■ Available in Pb-free and non Pb-free 44-pin TSOP II package Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the back of this data sheet for a complete description of read and write modes. The input/output pins (I/O1 through I/O16) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1020CV33 is available in standard 44-pin TSOP Type II package. Logic Block Diagram 32K × 16 RAM Array SENSE AMPS A7 A6 A5 A4 A3 A2 A1 A0 ROW DECODER DATA IN DRIVERS I/O1–I/O8 I/O9–I/O16 COLUMN DECODER A8 A9 A10 A11 A12 A13 A14 BHE WE CE OE BLE Cypress Semiconductor Corporation Document Number: 38-05133 Rev. *H • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised December 2, 2010 [+] Feedback CY7C1020CV33 Contents Selection Guide ................................................................ 3 Pin Configuration ............................................................. 3 Pin Definitions .................................................................. 4 Maximum Ratings ............................................................. 5 Operating Range ............................................................... 5 Electrical Characteristics ................................................. 5 Capacitance ...................................................................... 5 Thermal Resistance .......................................................... 5 AC Test Loads and Waveforms ....................................... 6 Switching Characteristics ................................................ 6 Switching Waveforms ...................................................... 7 Read Cycle No. 1 ........................................................ 7 Read Cycle No. 2 (OE Controlled) .............................. 7 Write Cycle No. 1 (CE Controlled) ............................... 8 Document Number: 38-05133 Rev. *H Write Cycle No. 2 (BLE or BHE Controlled) ................ 8 Write Cycle No. 3 (WE Controlled, OE LOW) ............. 9 Truth Table ........................................................................ 9 Ordering Information ...................................................... 10 Ordering Code Definitions ......................................... 10 Package Diagrams .......................................................... 10 Acronyms ........................................................................ 11 Document Conventions ................................................. 11 Units of Measure ....................................................... 11 Document History Page ................................................. 12 Sales, Solutions, and Legal Information ...................... 13 Worldwide Sales and Design Support ....................... 13 Products .................................................................... 13 PSoC Solutions ......................................................... 13 Page 2 of 13 [+] Feedback CY7C1020CV33 Selection Guide –10 –12 –15 Unit 10 12 15 ns Commercial/Industrial 90 85 80 mA Automotive – – 85 mA Commercial/Industrial 5 5 5 mA Automotive – – 10 mA Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current Pin Configuration [1] TSOP II Top View NC A3 A2 A1 A0 CE I/O1 I/O2 I/O3 I/O4 VCC VSS I/O5 I/O6 I/O7 I/O8 WE A4 A14 A13 A12 NC 1 44 2 3 43 42 4 41 40 39 38 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE BHE BLE I/O16 I/O15 I/O14 I/O13 VSS VCC I/O12 I/O11 I/O10 I/O9 NC A8 A9 A10 A11 NC Note 1. NC pins are not connected on the die. Document Number: 38-05133 Rev. *H Page 3 of 13 [+] Feedback CY7C1020CV33 Pin Definitions Pin Name TSOP - Pin Number I/O Type Description A0–A14 5, 4, 3, 2, 18, 44, 43, 42, 27, Input 26, 25, 24, 21, 20, 19 Address Inputs used to select one of the address locations. I/O1–I/O16 7-10, 13-16, 29-32, 35-38 Input/Output Bidirectional Data I/O lines. Used as input or output lines depending on operation. No Connects. Not connected to the die. NC 1, 22, 23, 28 No Connect WE 17 Input/Control Write Enable Input, active LOW. When selected LOW, a Write is conducted. When deselected HIGH, a Read is conducted. CE 6 Input/Control Chip Enable Input, active LOW. When LOW, selects the chip. When HIGH, deselects the chip. BHE, BLE 40, 39 Input/Control Byte Write Select Inputs, active LOW. BHE controls I/O16–I/O9, BLE controls I/O8–I/O1. OE 41 Input/Control Output Enable, active LOW. Controls the direction of the I/O pins. When LOW, the I/O pins are allowed to behave as outputs. When deasserted HIGH, I/O pins are tri-stated, and act as input data pins. VSS 12, 34 Ground VCC 11, 33 Power Supply Power Supply inputs to the device. Document Number: 38-05133 Rev. *H Ground for the device. Should be connected to ground of the system. Page 4 of 13 [+] Feedback CY7C1020CV33 Maximum Ratings Current into outputs (LOW) ......................................... 20 mA Exceeding maximum ratings may shorten the useful life of the device. User guidelines are not tested. Storage temperature ................................ –65 C to +150 C Range Supply voltage on VCC to relative GND[2] .....–0.5 V to +4.6 V Ambient Temperature VCC 0 C to +70 C 3.3 V 10% Commercial DC voltage applied to outputs in high Z State[2] .................................. –0.5 V to VCC + 0.5 V DC input Latch-up current ..................................................... > 200 mA Operating Range Ambient temperature with power applied ........................................... –55 C to +125 C voltage[2] Static discharge voltage........................................... > 2001 V (per MIL-STD-883, method 3015) ............................... –0.5 V to VCC + 0.5 V Industrial –40 C to +85 C 3.3 V 10% Automotive –40 C to +125 C 3.3 V 10% Electrical Characteristics Over the Operating Range Parameter Description –10 Test Conditions VOH Output HIGH voltage VCC = Min, IOH = –4.0 mA VOL Output LOW voltage VCC = Min, IOL = 8.0 mA Min –12 Max Min 2.4 – – 0.4 –15 Max Unit Max Min 2.4 – 2.4 – V – 0.4 – 0.4 V VIH Input HIGH voltage 2.0 VCC + 0.3 2.0 VCC + 0.3 2.0 VCC + 0.3 V VIL Input LOW voltage[2] 0.3 0.8 –0.3 0.8 –0.3 0.8 V IIX Input leakage current GND < VI < VCC 1 +1 –1 +1 –1 +1 A IOZ Output leakage current GND < VI < VCC, Output Disabled Commercial/ Industrial Automotive – – – – –20 +20 A Commercial/ Industrial 1 +1 –1 +1 –1 +1 A Automotive – – – – –20 +20 A Commercial/ Industrial – 90 – 85 – 80 mA ICC VCC operating supply current VCC = Max, IOUT = 0 mA, f = fMAX = 1/tRC – – – – – 85 mA ISB1 Automatic CE power-down current —TTL Inputs Max VCC, CE > VIH Commercial/ VIN > VIH or VIN < VIL, Industrial f = fMAX Automotive – 15 – 15 – 15 mA – – – – – 20 mA Automatic CE power-down current —CMOS inputs Max VCC, CE > VCC – 0.3 V, VIN > VCC – 0.3 V, or VIN < 0.3 V, f = 0 Commercial/ Industrial – 5 – 5 – 5 mA Automotive – – – – – 10 mA ISB2 Automotive Capacitance[3] Parameter Description CIN Input capacitance COUT Output capacitance Test Conditions TA = 25 C, f = 1 MHz, VCC = 3.3 V Max Unit 8 pF 8 pF Thermal Resistance[3] Parameter JA JC Description Thermal resistance (Junction to Ambient) Thermal resistance (Junction to Case) Test Conditions Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA/JESD51. 44-pin TSOP-II Unit 76.92 C/W 15.86 C/W Notes 2. VIL (min) = –2.0 V and VIH(max) = VCC + 0.5 V for pulse durations of less than 20 ns. 3. Tested initially and after any design or process changes that may affect these parameters. Document Number: 38-05133 Rev. *H Page 5 of 13 [+] Feedback CY7C1020CV33 AC Test Loads and Waveforms[4] R 317 3.3 V OUTPUT R2 351 30 pF High Z characteristics: R 317 3.3 V ALL INPUT PULSES 3.0 V GND 90% 90% 10% 10% OUTPUT R2 351 5 pF (a) (b) Rise Time: 1 V/ns Fall Time: 1 V/ns (c) Switching Characteristics Over the Operating Range[4] Parameter Description –10 –12 –15 Min Max Min Max Min Max Unit Read Cycle tRC Read cycle time 10 – 12 – 15 – ns tAA Address to data valid – 10 – 12 – 15 ns tOHA Data hold from address change 3 – 3 – 3 – ns tACE CE LOW to data valid – 10 – 12 – 15 ns tDOE OE LOW to data valid – 5 – 6 – 7 ns 0 – 0 – 0 – ns – 5 – 6 – 7 ns 3 – 3 – 3 – ns – 5 – 6 – 7 ns tLZOE OE LOW to low Z[5] Z[5, 6] tHZOE OE HIGH to high tLZCE CE LOW to low Z[5] Z[5, 6] tHZCE CE HIGH to high tPU[7] tPD[7] CE LOW to power-up 0 – 0 – 0 – ns CE HIGH to power-down – 10 – 12 – 15 ns tDBE Byte enable to data valid – 5 – 6 – 7 ns tLZBE Byte enable to low Z 0 – 0 – 0 – ns tHZBE Byte disable to high Z – 5 – 6 – 7 ns tWC Write cycle time 10 – 12 – 15 – ns tSCE CE LOW to write end 8 – 9 – 10 – ns tAW Address set-up to write end 7 – 8 – 10 – ns tHA Address hold from write end 0 – 0 – 0 – ns tSA Address set-up to write start 0 – 0 – 0 – ns tPWE WE pulse width 7 – 8 – 10 – ns tSD Data set-up to write end 5 – 6 – 8 – ns tHD Data hold from write end 0 – 0 – 0 – ns tLZWE WE HIGH to low Z[5] 3 – 3 – 3 – ns – 5 – 6 – 7 ns 7 – 8 – 9 – ns Write Cycle[8] Z[5, 6] tHZWE WE LOW to high tBW Byte enable to end of write Notes 4. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V. 5. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 6. tHZOE, tHZBE, tHZCE, and tHZWE are specified with a load capacitance of 5 pF as in part (c) of AC Test Loads. Transition is measured 500 mV from steady-state voltage. 7. This parameter is guaranteed by design and is not tested. 8. The internal Write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE/BLE LOW. CE, WE and BHE/BLE must be LOW to initiate a Write, and the transition of these signals can terminate the Write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the Write. Document Number: 38-05133 Rev. *H Page 6 of 13 [+] Feedback CY7C1020CV33 Switching Waveforms Read Cycle No. 1[9, 10] tRC ADDRESS tOHA DATA OUT tAA PREVIOUS DATA VALID DATA VALID Read Cycle No. 2 (OE Controlled)[10, 11] ADDRESS tRC CE tACE OE tHZOE tDOE BHE, BLE tLZOE tHZCE tDBE tLZBE DATA OUT HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tHZBE DATA VALID HIGH IMPEDANCE tPD tPU 50% 50% IICC CC IISB SB Notes 9. Device is continuously selected. OE, CE, BHE and/or BHE = VIL. 10. WE is HIGH for Read cycle. 11. Address valid prior to or coincident with CE transition LOW. Document Number: 38-05133 Rev. *H Page 7 of 13 [+] Feedback CY7C1020CV33 Switching Waveforms (continued) Write Cycle No. 1 (CE Controlled)[12, 13] tWC ADDRESS CE tSA tSCE tAW tHA tPWE WE tBW BHE, BLE tSD tHD DATA I/O Write Cycle No. 2 (BLE or BHE Controlled) tWC ADDRESS BHE, BLE tSA tBW tAW tHA tPWE WE tSCE CE tSD tHD DATA I/O Notes 12. Data I/O is high impedance if OE or BHE and/or BLE = VIH. 13. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document Number: 38-05133 Rev. *H Page 8 of 13 [+] Feedback CY7C1020CV33 Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW) tWC ADDRESS tSCE CE tAW tHA tSA tPWE WE tBW BHE, BLE tHZWE tSD tHD DATA I/O tLZWE Truth Table CE OE WE BLE BHE H X X X X High Z L L H L L Data out Data out Read—All bits Active (ICC) L H Data out High Z Read—Lower bits only Active (ICC) H L High Z Data out Read—Upper bits only Active (ICC) L L Data in Data in Write—All bits Active (ICC) L X L I/O1–I/O8 I/O9–I/O16 High Z Mode Power-down Power Standby (ISB) L H Data in High Z Write—Lower bits only Active (ICC) H L High Z Data in Write—Upper bits only Active (ICC) L H H X X High Z High Z Selected, outputs disabled Active (ICC) L X X H H High Z High Z Selected, outputs disabled Active (ICC) Document Number: 38-05133 Rev. *H Page 9 of 13 [+] Feedback CY7C1020CV33 Ordering Information Speed (ns) 15 Ordering Code Package Diagram Package Type Operating Range CY7C1020CV33-15ZSXE 51-85087 44-pin TSOP Type II (Pb-free) Automotive CY7C1020CV33-15ZSXET 51-85087 44-pin TSOP Type II (Pb-free) Automotive Ordering Code Definitions CY7C 1020 C V33 - 15 ZSX E X X = T or Blank T = Tape and Reel; Blank = Tube Temperature Range: E = Automotive Package Type: ZSX = 44-pin TSOP Type II (Pb-free) Speed Grade = 15 ns V33 = 3.3 V Process Technology 0.16 µm 1020 = Part Identifier CY7C = Cypress SRAMs Package Diagrams Figure 1. 44-pin TSOP II, 51-85087 51-85087 *C Document Number: 38-05133 Rev. *H Page 10 of 13 [+] Feedback CY7C1020CV33 Acronyms Document Conventions Acronym Description CMOS complementary metal oxide semiconductor CE chip enable I/O input/output OE output enable SRAM static random access memory TSOP thin small-outline package TTL transistor-transistor logic WE write enable Document Number: 38-05133 Rev. *H Units of Measure Symbol Unit of Measure ns nano seconds V Volts µA micro Amperes mA milli Amperes mW milli Watts MHz Mega Hertz pF pico Farad °C degree Celcius W Watts % percent Page 11 of 13 [+] Feedback CY7C1020CV33 Document History Page Document Title: CY7C1020CV33 512 K (32 K × 16) Static RAM Document Number: 38-05133 REV. ECN NO. Issue Date Orig. of Change ** 109428 12/16/01 HGK New Data Sheet *A 115045 05/30/02 HGK ICC and ISB1 data modified Description of Change *B 117615 08/14/02 DFP Pin 1= NC Pin 18 = A4; remove SOJ package option; remove 8ns option. *C 262949 See ECN RKF Added Automotive Specs to Data sheet *D 334398 See ECN SYT Added Lead-Free Product Information *E 493543 See ECN NXR Added note #1 on page #1 Changed the description of IIX from Input Load Current to Input Leakage Current in DC Electrical Characteristics table Removed IOS parameter from DC Electrical Characteristics table Updated Ordering Information Table *F 2897691 03/23/2010 RAME Updated Ordering Information Updated Package Diagram *G 3057593 10/13/2010 PRAS Updated Ordering Information and added Ordering Code Definitions. *H 3100106 12/02/2010 PRAS Added Acronyms and Units of Measure. Minor edits and updated in new template. Document Number: 38-05133 Rev. *H Page 12 of 13 [+] Feedback CY7C1020CV33 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Automotive Clocks & Buffers Interface Lighting & Power Control PSoC Solutions cypress.com/go/automotive cypress.com/go/clocks psoc.cypress.com/solutions cypress.com/go/interface PSoC 1 | PSoC 3 | PSoC 5 cypress.com/go/powerpsoc cypress.com/go/plc Memory Optical & Image Sensing cypress.com/go/memory cypress.com/go/image PSoC cypress.com/go/psoc Touch Sensing cypress.com/go/touch USB Controllers Wireless/RF cypress.com/go/USB cypress.com/go/wireless © Cypress Semiconductor Corporation, 2001-2010. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 38-05133 Rev. *H Revised December 2, 2010 Page 13 of 13 All products and company names mentioned in this document may be the trademarks of their respective holders. [+] Feedback