FAIRCHILD 74ACT257PC

Revised November 1999
74AC257 • 74ACT257
Quad 2-Input Multiplexer with 3-STATE Outputs
General Description
Features
The AC/ACT257 is a quad 2-input multiplexer with 3STATE outputs. Four bits of data from two sources can be
selected using a Common Data Select input. The four outputs present the selected data in true (noninverted) form.
The outputs may be switched to a high impedance state by
placing a logic HIGH on the common Output Enable (OE)
input, allowing the outputs to interface directly with bus-oriented systems.
■ ICC and IOZ reduced by 50%
■ Multiplexer expansion by tying outputs together
■ Noninverting 3-STATE outputs
■ Outputs source/sink 24 mA
■ ACT257 has TTL-compatible inputs
Ordering Code:
Order Number
Package Number
Package Description
74AC257SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC257SJ
74AC257MTC
MTC16
74AC257PC
N16E
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
74ACT257SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
74ACT257SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT257MTC
MTC16
74ACT257PC
N16E
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
S
Common Data Select Input
OE
3-STATE Output Enable Input
I0a–I0d
Data Inputs from Source 0
I1a–I1d
Data Inputs from Source 1
Za–Zd
3-STATE Multiplexer Outputs
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS009949
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74AC257 • 74ACT257 Quad 2-Input Multiplexer with 3-STATE Outputs
November 1988
74AC257 • 74ACT257
Functional Description
Truth Table
The AC/ACT257 is quad 2-input multiplexer with 3-STATE
outputs. It selects four bits of data from two sources under
control of a Common Data Select input. When the Select
input is LOW, the I0x inputs are selected and when Select
is HIGH, the I1x inputs are selected. The data on the
selected inputs appears at the outputs in true (noninverted)
form. The device is the logic implementation of a 4-pole, 2position switch where the position of the switch is determined by the logic levels supplied to the Select input. The
logic equations for the outputs are as follows:
Output
Select
Data
Enable
Input
Inputs
OE
S
I0
I1
Z
H
X
X
X
Z
L
H
X
L
L
L
H
X
H
H
Za = OE • (11a • S + I0a • S)
L
L
L
X
L
Zb = OE • (11b • S + I0b • S)
L
L
H
X
H
Zc = OE • (11c • S + I0c • S)
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Zd = OE • (11d • S + I0d • S)
When the Output Enable (OE) is HIGH, the outputs are
forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum ratings. Designers should ensure the Output Enable
signals to 3-STATE devices whose outputs are tied
together are designed so there is no overlap.
Outputs
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Recommended Operating
Conditions
−0.5V to +7.0V
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
−20 mA
VI = VCC +0.5V
+20 mA
Supply Voltage (VCC)
−0.5V to VCC + 0.5V
DC Input Voltage (VI)
VO = VCC +0.5V
+20 mA
0V to VCC
−40°C to +85°C
Minimum Input Edge Rate (∆V/∆t)
AC Devices
DC Output Source ort
VIN from 30% to 70% of VCC
±50 mA
VCC @ 3.3V, 4.5V, 5.5V
DC VCC or Ground Current
125 mV/ns
Minimum Input Edge Rate (∆V/∆t)
±50 mA
Per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
0V to VCC
Operating Temperature (TA)
−0.5V to VCC + 0.5V
Sink Curren (IO)
4.5V to 5.5V
Output Voltage (VO)
−20 mA
DC Output Voltage (VO)
2.0V to 6.0V
ACT
Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
AC
ACT Devices
−65°C to +150°C
VIN from 0.8V to 2.0V
Junction Temperature (TJ)
VCC @ 4.5V, 5.5V
PDIP
140°C
125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for AC
Symbol
VIH
VIL
VOH
Parameter
VCC
TA = +25°C
TA = −40°C to +85°C
(V)
Typ
Guaranteed Limits
Minimum HIGH Level
3.0
1.5
2.1
Voltage Input
4.5
2.25
3.15
3.15
5.5
2.75
3.85
3.85
Units
Maximum LOW Level
3.0
1.5
0.9
0.9
Voltage Input
4.5
2.25
1.35
1.35
5.5
2.75
1.65
1.65
Minimum HIGH Level
3.0
2.99
2.9
2.9
Voltage Output
4.5
4.49
4.4
4.4
5.5
5.49
5.4
5.4
3.0
2.56
2.46
4.5
3.86
3.76
5.5
4.86
4.76
Conditions
VOUT = 0.1V
2.1
V
or VCC − 0.1V
VOUT = 0.1V
V
or VCC − 0.1V
V
IOUT = −50 µA
VIN = VIL or VIH
VOL
Maximum LOW Level
3.0
0.002
0.1
0.1
Voltage Output
4.5
0.001
0.1
0.1
5.5
0.001
0.1
0.1
3.0
0.36
0.44
4.5
0.36
0.44
IOH = −12 mA
V
IOH = −24 mA
IOH = −24 mA (Note 2)
V
IOUT = 50 µA
VIN = VIL or VIH
IOL = 12 mA
V
IOL = 24 mA
IOL = 24 mA (Note 2)
5.5
0.36
0.44
5.5
± 0.1
± 1.0
µA
VI = VCC, GND
Leakage Current
5.5
±0.25
±2.5
µA
VI = VCC, GND
IOLD
Minimum Dynamic (Note 3)
5.5
75
mA
VOLD = 1.65V Max
IOHD
Output Current
5.5
−75
mA
VOHD = 3.85V Min
ICC (Note 4)
Maximum Quiescent Supply Current
5.5
40.0
µA
VIN = VCC or GND
IIN (Note 4)
Maximum Input Leakage Current
IOZ
Maximum 3-STATE
VI (OE) = VIL, VIH
VO = VCC, GND
4.0
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
3
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74AC257 • 74ACT257
Absolute Maximum Ratings(Note 1)
74AC257 • 74ACT257
DC Electrical Characteristics for ACT
Symbol
Parameter
VIL
VOH
TA = −40°C to +85°C
(V)
Typ
4.5
1.5
Input Voltage
5.5
1.5
2.0
2.0
Maximum LOW Level
4.5
1.5
0.8
0.8
Input Voltage
5.5
1.5
0.8
0.8
Minimum HIGH Level
4.5
4.49
4.4
4.4
Output Voltage
5.5
5.49
5.4
5.4
3.86
3.76
Minimum HIGH Level
VIH
TA = +25°C
VCC
Guaranteed Limits
2.0
2.0
Units
V
V
Conditions
VOUT = 0.1V
or VCC − 0.1V
VOUT = 0.1V
or VCC − 0.1V
V
IOUT = −50 µA
V
IOH = −24 mA
VIN = VIL or VIH
4.5
5.5
VOL
IOH = −24 mA (Note 5)
4.86
4.76
Maximum LOW Level
4.5
0.001
0.1
0.1
Output Voltage
5.5
0.001
0.1
0.1
4.5
0.36
0.44
5.5
0.36
0.44
5.5
±0.1
±1.0
µA
5.5
± 0.5
± 5.0
µA
V
IOUT = 50 µA
V
IOL = 24 mA
VIN = VIL or VIH
IIN
Maximum Input
Leakage Current
IOZ
Maximum 3-STATE
Leakage Current
ICCT
Maximum
5.5
VI = VCC, GND
VI = VIL, VIH
VO = VCC, GND
VI = VCC − 2.1V
1.5
mA
IOLD
Dynamic Output Current
5.5
75
mA
VOLD = 1.65V Max
IOHD
Minimum (Note 6)
5.5
−75
mA
VOHD = 3.85V Min
ICC
Maximum Quiescent
40.0
µA
ICC/Input
Supply Current
0.6
IOL = 24 mA (Note 5)
5.5
4.0
VIN = VCC
or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
Symbol
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Parameter
VCC
TA = +25°C
(V)
CL = 50 pF
CL = 50 pF
(Note 7)
Min
Propagation Delay
3.3
1.5
5.0
8.5
1.0
9.0
In to Zn
5.0
1.5
4.0
6.0
1.0
7.0
Propagation Delay
3.3
1.5
6.0
8.5
1.0
9.0
In to Zn
5.0
1.5
4.5
6.0
1.0
7.0
Propagation Delay
3.3
1.5
7.0
10.5
1.5
11.5
S to Zn
5.0
1.5
5.0
7.5
1.0
8.5
Propagation Delay
3.3
1.5
7.5
10.5
1.5
11.5
S to Zn
5.0
1.5
5.5
7.5
1.0
8.5
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
Max
Min
3.3
1.5
6.5
9.5
1.0
10.5
1.5
5.0
7.5
1.0
8.5
3.3
1.5
5.5
9.0
1.0
10.0
5.0
1.5
5.0
8.5
1.0
9.5
3.3
1.5
5.5
10.0
1.0
11.0
5.0
1.5
5.0
9.0
1.0
10.0
3.3
1.5
5.5
9.0
1.0
10.0
5.0
1.5
5.0
8.0
1.0
9.0
Voltage Range 5.0 is 5.0V ± 0.5V
4
Units
Max
5.0
Note 7: Voltage Range 3.3 is 3.0V ± 0.3V
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Typ
TA = −40°C to +85°C
ns
ns
ns
ns
ns
ns
ns
ns
Symbol
tPLH
Parameter
Propagation Delay
In to Zn
tPHL
Propagation Delay
In to Zn
tPLH
Propagation Delay
S to Zn
tPHL
Propagation Delay
S to Zn
VCC
TA = +25°C
(V)
CL = 50 pF
TA = −40°C to +85°C
CL = 50 pF
Units
(Note 8)
Min
Typ
Max
Min
Max
5.0
1.5
5.0
7.0
1.0
7.5
ns
5.0
2.0
6.0
7.5
1.5
8.5
ns
5.0
2.0
7.0
9.5
1.5
10.5
ns
5.0
2.5
7.0
10.5
2.0
11.5
ns
ns
tPZH
Output Enable Time
5.0
2.0
6.0
8.0
1.5
9.0
tPZL
Output Enable Time
5.0
2.0
6.0
8.0
1.5
9.0
ns
tPHZ
Output Disable Time
5.0
2.5
6.5
9.0
1.5
10.0
ns
tPLZ
Output Disable Time
5.0
2.0
6.0
7.5
1.5
8.5
ns
Note 8: Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Typ
Units
CIN
Symbol
Input Capacitance
Parameter
4.5
pF
VCC = OPEN
CPD
Power Dissipation Capacitance
50.0
pF
VCC = 5.0V
5
Conditions
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74AC257 • 74ACT257
AC Electrical Characteristics for ACT
74AC257 • 74ACT257
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
Package Number M16A
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6
74AC257 • 74ACT257
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
7
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74AC257 • 74ACT257
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
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8
74AC257 • 74ACT257 Quad 2-Input Multiplexer with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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