Revised March 2000 DM74LS259 8-Bit Addressable Latches General Description Features These 8-bit addressable latches are designed for general purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers, and active-high decoders or demultiplexers. They are multifunctional devices capable of storing single-line data in eight addressable latches, and being a 1-of-8 decoder or demultiplexer with active-high outputs. ■ 8-Bit parallel-out storage register performs serial-to-parallel conversion with storage Four distinct modes of operation are selectable by controlling the clear and enable inputs as enumerated in the function table. In the addressable-latch mode, data at the datain terminal is written into the addressed latch. The addressed latch will follow the data input with all unaddressed latches remaining in their previous states. In the memory mode, all latches remain in their previous states and are unaffected by the data or address inputs. To eliminate the possibility of entering erroneous data in the latches, the enable should be held HIGH (inactive) while the address lines are changing. In the 1-of-8 decoding or demultiplexing mode, the addressed output will follow the level of the D input with all other outputs LOW. In the clear mode, all outputs are LOW and unaffected by the address and data inputs. ■ Expandable for N-bit applications ■ Asynchronous parallel clear ■ Active high decoder ■ Enable/disable input simplifies expansion ■ Direct replacement for Fairchild DM9334 ■ Four distinct functional modes ■ Typical propagation delay times: Enable-to-output 18 ns Data-to-output 16 ns Address-to-output 21 ns Clear-to-output 17 ns ■ Fan-out IOL (sink current) 8 mA IOH (source current) −0.4 mA ■ Typical ICC 22 mA Ordering Code: Order Number Package Number Package Description DM74LS259M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS259WM M16B 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS259N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 2000 Fairchild Semiconductor Corporation DS006418 www.fairchildsemi.com DM74LS259 8-Bit Addressable Latches August 1986 DM74LS259 Connection Diagram Function Table Inputs Clear E Output of Each Addressed Other Latch Output Function Addressable Latch H L D Qi0 H H Qi0 Qi0 L L D L 8-Line Demultiplexer L H L L Clear Memory Latch Selection Table Select Inputs Latch C B A Addressed L L L 0 L L H 1 L H L 2 L H H 3 H L L 4 H L H 5 H H L 6 H H H 7 H = HIGH Level L = LOW Level D = the Level of the Data Input Qi0 = the Level of Qi (i = 0, 1,…7, as Appropriate) before the Indicated Steady-State Input Conditions Were Established. www.fairchildsemi.com 2 Supply Voltage Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the “Electrical Characteristics” table are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 7V Input Voltage 7V 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Recommended Operating Conditions Symbol Parameter Min Nom Max 4.75 5 5.25 Units VCC Supply Voltage VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −0.4 mA IOL LOW Level Output Current 8 mA tW Pulse Width Enable 15 (Note 5) Clear 15 Setup Time Data tSU ns ns 15↓ Hold Time Data 2.5↑ (Note 2)(Note 3)(Note 5) Select 2.5↑ Free Air Operating Temperature TA V 15↑ (Note 2)(Note 3)(Note 4)(Note 5) Select tH V 2 ns 0 °C 70 Note 2: The symbols (↓, ↑) indicate the edge of the clock pulse used for reference: ↑ for rising edge, ↓ for falling edge. Note 3: Setup and hold times are with reference to the enable input. Note 4: The select-to-enable setup time is the time before the HIGH-to-LOW enable transition that the select must be stable so that the correct latch is selected and the others not affected. Note 5: TA = 25°C and VCC = 5V. Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = −18 mA VOH HIGH Level VCC = Min, IOH = Max Output Voltage VIL = Max, VIH = Min VOL LOW Level VCC = Min, IOL = Max Output Voltage VIL = Max, VIH = Min Min 2.7 IOL = 4 mA, VCC = Min Typ (Note 6) Max Units −1.5 V 3.4 V 0.35 0.5 0.25 0.4 V Input Current @ Max VCC = Max, VI = 7V Input Voltage VI = 10V 0.1 mA IIH HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA IIL LOW Level Input Current VCC = Max, VI = 0.4V −0.4 Enable VCC = Max, VI = 0.4V −0.8 IOS Short Circuit Output Current VCC = Max (Note 7) ICC Supply Current VCC = Max (Note 8) II −20 22 mA −100 mA 36 mA Note 6: All typicals are at VCC = 5V, TA = 25°C. Note 7: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 8: ICC is measured with all inputs at 4.5V, and all outputs OPEN. 3 www.fairchildsemi.com DM74LS259 Absolute Maximum Ratings(Note 1) DM74LS259 Switching Characteristics at VCC = 5V and TA = 25°C CL = 50 pF From (Input) Symbol Parameter RL = 2 kΩ To (Output) Min tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output www.fairchildsemi.com Units Max Enable to Output 38 ns Enable to Output 32 ns Data to Output 35 ns Data to Output 30 ns Select to Output 41 ns Select to Output 38 ns Clear to Output 36 ns 4 DM74LS259 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M16B 5 www.fairchildsemi.com DM74LS259 8-Bit Addressable Latches Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6