LTC3425 5A, 8MHz, 4-Phase Synchronous Step-Up DC/DC Converter DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LTC®3425 is a synchronous, 4-phase boost converter with output disconnect capable of operation below 1V input. It includes four N-channel MOSFET switches and four P-channel synchronous rectifiers for an effective RDS(ON) of 0.045Ω and 0.05Ω, respectively. 4-phase operation greatly reduces peak inductor currents, and capacitor ripple current, and increases effective switching frequency, minimizing inductor and capacitor sizes. True output disconnect eliminates inrush current and allows zero load current in shutdown. External Schottky diodes are not required in most applications (VOUT < 4.3V). Power saving Burst Mode operation can be user controlled or left in automatic mode. High Efficiency: Up to 95% Up to 3A Continuous Output Current 4-Phase Operation for Low Output Ripple and Tiny Solution Size Output Disconnect and Inrush Current Limiting Very Low Quiescent Current: 12µA 0.5V to 4.5V Input Range 2.4V to 5.25V Adjustable Output Voltage Adjustable Current Limit Adjustable, Fixed Frequency Operation from 100kHz to 2MHz per Phase Synchronizable Oscillator with Sync Output Internal Synchronous Rectifiers Manual or Automatic Burst Mode® Operation Power Good Comparator <1µA Shutdown Current Antiringing Control 5mm × 5mm Thermally Enhanced QFN Package Other features include 1µA shutdown current, programmable frequency with sync in and out, programmable soft-start, antiringing control, thermal shutdown, adjustable current limit, reference output and power good comparator. U APPLICATIO S ■ ■ Handheld Computers Point-of-Load Regulators 3.3V to 5V Conversion , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. U ■ The LTC3425 is available in a small, thermally enhanced 32-pin QFN package. TYPICAL APPLICATIO VIN 2V TO 3V 2.2µF 2.7µH 2.7µH 2.7µH 2.7µH 100 OFF ON SWA SWB SHDN REFOUT CCM REFEN SWC SWD VOUTS VOUTA VOUTB VOUTC VOUTD 90 80 4.7µF ×4 LTC3425 VOUT 3.3V 2A 1M 10k SYNCIN BURST 0.01µF RT 15k 20k 75k ILIM SGND GNDA GNDB FB COMP SS SYNCOUT PGOOD GNDC GNDD 22pF 590k 330pF 33k 0.01µF 3425 TA01 CIN: TAIYO YUDEN JMK107BJ225MA COUT: TAIYO YUDEN JMK212BJ475MG (×4) EFFICIENCY (%) VIN 70 60 Burst Mode OPERATION FIXED FREQUENCY MODE 50 40 30 VIN = 2.4V VOUT = 3.3V 10 f = 1MHz/PHASE L = 2.7µH 0 1 10 100 1000 0.1 LOAD CURRENT (mA) 20 10000 3425 TA02 L1-L4: TDK RLF5018T-2R7M1R8 3425f 1 LTC3425 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO VIN Voltage ................................................. – 0.3V to 6V SWA-D Voltages ..........................................– 0.3V to 6V VOUTA-D, VOUTS Voltages............................ – 0.3V to 6V BURST, SHDN, SS, REFEN, SYNCOUT, PGOOD, REFOUT, CCM, SYNCIN Voltages ............... – 0.3V to 6V Operating Ambient Temperature Range (Note 5) .............................................. – 40°C to 85°C Storage Temperature Range ................. – 65°C to 125°C Lead Temperature (Soldering, 10 sec).................. 300°C CCM ILIM RT VIN SYNCIN SHDN SS TOP VIEW SYNCOUT (Note 1) 32 31 30 29 28 27 26 25 GNDA 1 24 GNDD GNDA 2 23 GNDD SWA 3 22 SWD VOUTA 4 21 VOUTD 33 VOUTB 5 20 VOUTC SWB 6 19 SWC GNDB 7 18 GNDC GNDB 8 17 GNDC PGOOD REFOUT BURST COMP FB SGND VOUTS REFEN 9 10 11 12 13 14 15 16 UH PACKAGE 32-LEAD (5mm × 5mm) PLASTIC QFN TJMAX = 125°C, θJA = 40°C/W 1 LAYER BOARD, θJA = 35°C/W 4 LAYER BOARD, θJC = 1.1°C/W EXPOSED PAD IS GND (PIN 33) MUST BE SOLDERED TO PCB ORDER PART NUMBER UH PART MARKING LTC3425EUH 3425 Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 1.2V, VOUT = 3.3V, RT = 15k, unless otherwise noted. PARAMETER CONDITIONS Minimum Start-Up Voltage VOUT = 0V, ILOAD < 1mA Minimum Operating Voltage (Note 3) MIN TYP MAX 0.88 1 V 0.5 V 5.25 V 1.220 1.244 V 1 50 nA 12 18 25 35 µA µA ● Output Voltage Adjust Range ● 2.4 Feedback Regulation Voltage ● 1.196 Feedback Input Current UNITS VOUT Quiescent Current—Burst Mode Operation BURST = 0V, REFEN = 0V, FB = 1.3V (Note 2) BURST = 0V, REFEN = 2V, FB = 1.3V (Note 2) VIN Quiescent Current—Shutdown SHDN = 0V, VOUT = 0V, Not Including Switch Leakage 0.1 1 µA VOUT Quiescent Current—Active VC = 0V, Nonswitching (Note 2) 1.8 3 mA NMOS Switch Leakage VSW = 5V 0.1 5 µA 10 µA PMOS Switch Leakage VSW = 5V, VOUT = 0V 0.1 NMOS Switch On Resistance (Note 4) 0.04 Ω PMOS Switch On Resistance (Note 4) 0.05 Ω NMOS Current Limit ILIM Resistor = 75k (Note 4) ILIM Resistor = 200k (Note 4) 7.0 2.7 A A ● ● 5.0 1.8 3425f 2 LTC3425 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 1.2V, VOUT = 3.3V, RT = 15k, unless otherwise noted. PARAMETER CONDITIONS PMOS Turn-Off Current CCM < 0.4V MIN –80 mA PMOS Reverse Current Limit CCM > 1.4V 0.6 A Max Duty Cycle ● Min Duty Cycle ● 83 Frequency Accuracy RT = 15k ● 0.8 SHDN Input High VOUT = 0V (Initial Start-Up) VOUT > 2.4V ● ● 1 0.65 SHDN Input Low SHDN Input Current TYP 90 1 0.01 –0.50 REFEN, CCM Input High ● REFEN, CCM Input Low ● REFEN, Input Current VREFEN = 5V SYNCIN Input High (Note 7) ● SYNCIN Input Low (Note 7) ● SYNCIN Input Current VSYNCIN = 5V CCM Input Current VCCM = 5V ● SYNC Out High % 1.2 MHz 0.25 V 1 µA µA 0.4 V 1 µA 2.5 V 0.5 V 0.3 1 µA 2 4 µA µs 0.1 3 V 0.4 V REFEN > 1.4V, No Load ● 1.190 1.220 1.251 V ISOURCE < 100µA, ISINK < 10µA ● 1.184 1.220 1.252 V Error Amp Transconductance Error Amp Output High % 0 V SYNC Out Low REFOUT 97 1.4 0.01 SYNC Input Pulse Width Range UNITS V V ● VSHDN = 5V or 0V VSHDN = 2V MAX µS 50 ILIM Resistor = 75k Error Amp Output Low 2.2 V 0.15 V PGOOD Threshold (Falling Edge) Referenced to Feedback Voltage ● –9.5 PGOOD Hysteresis Referenced to Feedback Voltage ● 1.5 PGOOD Low Voltage ISINK = 1mA (10mA Max) ● PGOOD Leakage VPGOOD = 5.5V ● 0.01 SS Current Source VSS = 1V Burst Threshold Voltage Falling Edge Burst Threshold Hysteresis Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Current is measured into the VOUTS pin since the supply current is bootstrapped to the output. The current will reflect to the input supply by VOUT/(VIN • Efficiency). The outputs are not switching. Note 3: Once the output is started, the IC is not dependent on the VIN supply. Note 4: Total with all four FETs in parallel. –11.4 –13.5 % 2.5 4 % 0.12 0.25 V 1 µA µA 2.7 ● 0.84 0.94 120 1.04 V mV Note 5: The LTC3425E is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 6: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 7: The typical logic threshold for this input is: VOUT/2 3425f 3 LTC3425 U W TYPICAL PERFOR A CE CHARACTERISTICS SWA, SWB, SWC, SWD at 1MHz/Phase SW Pin and Oscillator SYNCOUT IL 0.2A/DIV SWA 2V/DIV SWA TO SWD 5V/DIV SYNCOUT 2V/DIV 250ns/DIV SW Pin and Inductor Current in Discontinous Mode. Antiring Circuit Eliminates High Frequency Ringing SW 2V/DIV 250ns/DIV 3425 G01 VIN = 2.4V VOUT = 3.3V COUT = 220µF 3425 G02 3425 G03 Output Voltage Ripple at 2.5A Load with a 47µF Ceramic Bulk Capacitor Output Voltage Ripple at 2.5A Load with Only Four 4.7µF Ceramic Capacitors Transient Response 0.5A to 1.5A Fixed Frequency Mode Operation 250ns/DIV VOUT AC 100mV/DIV VOUT AC 50mV/DIV VOUT AC 10mV/DIV LOAD CURRENT 0.5A/DIV VIN = 2.4V VOUT = 3.3V COUT = 220µF 100µs/DIV VIN = 2.4V 500ns/DIV VOUT = 3.3V FREQUENCY = 1MHz/PHASE 3425 G04 Soft-Start and Inrush Current Limiting VIN = 2.4V 500ns/DIV VOUT = 3.3V FREQUENCY = 1MHz/PHASE 3425 G05 3425 G06 Transient Response 10mA to 1A Automatic Burst Mode Operation Burst Mode Operation IOUT 1A/DIV IIN 0.5A/DIV SWA 2V/DIV SS Pin 1V/DIV BURST PIN 1V/DIV VOUT AC 50mV/DIV VOUT 2V/DIV VIN = 2.4V 500µs/DIV VOUT = 3.3V CSOFTSTART = 0.015µF 3425 G07 VOUT AC 200mV/DIV VIN = 2.4V VOUT = 3.3V COUT = 220µF 25µs/DIV 3425 G08 VIN = 2.4V VOUT = 3.3V COUT = 220µF 1ms/DIV 3425 G10 3425f 4 LTC3425 U W TYPICAL PERFOR A CE CHARACTERISTICS Converter Efficiency for VOUT = 3.3V 100 98 100 80 80 VIN = 1.2V 70 EFFICIENCY (%) VIN = 2.4V 60 VIN = 1.2V 50 40 30 TA = 25°C 96 VIN = 2.4V VOUT = 3.3V 94 1MHz/PHASE VIN = 3.3V 90 VIN = 2.4V 70 VIN = 3.3V 60 EFFICIENCY (%) VIN = 2.4V 90 VIN = 2.4V 50 40 30 20 Burst Mode OPERATION 1MHz/PHASE TA = 25°C 0 0.1 1 10 100 1000 OUTPUT CURRENT (mA) TA = 25°C 0 0.1 1 10 100 1000 OUTPUT CURRENT (mA) 3425 G11 EFFICIENCY (%) 80 FORCED CONTINUOUS MODE 40 140 60 FORCED CONTINUOUS MODE 50 40 30 20 20 10 10 0 DISCONTINUOUS MODE 70 30 0 1 10 100 1000 CONVERTER OUTPUT CURRENT (mA) 10 1 100 PEAK CURRENT IN EACH PHASE (A) FREQUENCY (MHz) 100 3425 G17 VOUT = 5V 80 60 VOUT = 3.3V 40 20 0 1.5 1000 2.0 2.5 3.0 VIN (V) 3.5 4.0 TA = 25°C 1.6 1.4 1.2 1.0 0.8 60 80 100 120 140 160 ILIM RESISTOR (kΩ) 4.5 3425 G16 Effective RDS(ON) 0.6 10 RT (kΩ) 100 Peak Current Limit 1.8 TA = 25°C 1 TA = 25°C 3425 G15 Oscillator Frequency 1 10000 120 LOAD (mA) 3425 G14 10 1000 LOAD (mA) Converter No Load Input Current vs VIN (Burst Mode Operation) TA = 25°C 90 1MHz/PHASE 80 DISCONTINUOUS MODE 70 3 PHASE 3425 G13 100 TA = 25°C 90 1MHz/PHASE EFFICIENCY (%) 80 100 10000 Efficiency Comparison of Discontinuous Mode and Forced Continuous Mode at Light Loads for VIN = 3.3V, VOUT = 5V 100 50 86 3425 G12 Efficiency Comparison of Discontinuous Mode and Forced Continuous Mode at Light Loads for VIN = 2.4V, VOUT = 3.3V 60 4 PHASE 88 82 Burst Mode OPERATION 1MHz/PHASE 10 10000 90 2 PHASE CONVERTER INPUT CURRENT (µA) 10 92 84 20 180 200 3425 G18 0.065 RDS(ON) (ALL FOUR PHASES IN PARALLEL) EFFICIENCY (%) Converter Efficiency for 2-, 3- and 4-Phase Operation Converter Efficiency for VOUT = 5V TA = 25°C 0.060 PMOS 0.055 0.050 NMOS 0.045 0.040 2.5 3 4 3.5 VOUT (V) 4.5 5 3425 G19 3425f 5 LTC3425 U W TYPICAL PERFOR A CE CHARACTERISTICS Maximum Output Current in Burst Mode Operation 350 0.7 TA = 25°C 100 TA = 25°C VOUT = 3.3V 250 VOUT = 5V 200 150 100 0.5 0.4 VOUT = 5V 0.3 0.2 0.1 50 0 0.9 0 1 2 1.5 2.5 3 3.5 4 4.5 5 1.0 1.1 VIN (V) 1.2 1.3 VIN (V) 1.4 1.5 Shutdown Voltage vs Temperature VIN > 2.3V LEAVE Burst Mode OPERATION 70 ENTER Burst Mode OPERATION VOUT = 3.3V 0.425 SHUTDOWN VOLTAGE (V) SS CHARGE CURRENT (µA) VOUT = 3.3V 2.0 1.5 VIN < 2.3V (START-UP MODE) 1.0 0.5 50 VOUT = 5V TA = 25°C RBURST = 33k 3 2.5 VIN (V) 3.5 0 –45 –25 –5 4 0.375 0.350 15 35 55 75 TEMPERATURE (°C) 95 115 0.300 –45 –25 –5 PMOS Reverse Current in Forced CCM vs Temperature 0.90 0.85 0.80 0.75 95 115 3425 G26 11.8 800 11.7 750 PMOS REVERSE CURRENT (mA) PGOOD THRESHOLD (1% BELOW VFB) 1.00 11.6 11.5 11.4 11.3 11.2 11.1 11.0 10.9 10.8 –45 –25 –5 95 115 3425 G25 PGOOD Threshold vs Temperature 0.95 15 35 55 75 TEMPERATURE (°C) 3425 G24 Minimum Start-Up Voltage vs Temperature 15 35 55 75 TEMPERATURE (°C) 0.400 0.325 3425 G23 0.70 –45 –25 –5 1000 3425 G22 2.5 90 2 100 BURST RESISTOR (kΩ) 0.450 VOUT = 5V 40 1.5 ENTER Burst Mode OPERATION 10 1 10 1.6 3.0 100 60 LEAVE Burst Mode OPERATION Soft-Start Charging Current vs Temperature Automatic Burst Mode Thresholds vs VIN 80 TA = 25°C 3425 G21 3425 G20 LOAD CURRENT (mA) AVERAGE LOAD CURRENT (mA) 0.6 VOUT = 3.3V LOAD CURRENT (A) OUTPUT CURRENT (mA) 300 START VOLTAGE (V) Automatic Burst Mode Current Thresholds vs RBURST Maximum Start-Up Load vs VIN (Constant Current Load) 700 650 600 550 500 450 400 350 15 35 55 75 TEMPERATURE (°C) 95 115 3425 G27 300 –45 –25 –5 15 35 55 75 TEMPERATURE (°C) 95 115 3425 G28 3425f 6 LTC3425 U W TYPICAL PERFOR A CE CHARACTERISTICS Peak Current Limit vs Temperature 3 1.225 2 PEAK ILIM (NORMALIZED) (%) 1.230 1.215 1.210 1.205 15 35 55 75 TEMPERATURE (°C) 95 115 2.0 1 0 –1 –2 –3 –45 –25 –5 15 35 55 75 TEMPERATURE (°C) 3425 G29 95 115 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –45 –25 –5 15 35 55 75 TEMPERATURE (°C) 3425 G30 Burst Mode VOUT Quiescent Current vs Temperature 95 115 3425 G31 Error Amplifier gm vs Temperature 20 55 15 50 gm (µS) 1.200 –45 –25 –5 QUIESCENT CURRENT (µA) VFB (V) 1.220 Oscillator Frequency vs Temperature OSCILLATOR (NORMALIZED) (%) Feedback Voltage vs Temperature 10 5 –45 –25 –5 45 15 35 55 75 TEMPERATURE (°C) 95 115 3425 G32 40 –45 –25 –5 15 35 55 75 TEMPERATURE (°C) 95 115 3425 G33 3425f 7 LTC3425 U U U PI FU CTIO S GNDA–D (Pins 1, 2, 7, 8, 17, 18, 23, 24): Power Ground for the IC and the Four Internal N-channel MOSFETs. Connect directly to the power ground plane. SWA–D (Pins 3, 6, 19, 22): Switch Pins. Connect inductors here. Minimize trace length to keep EMI to a minimum. For discontinuous inductor current, a controlled impedance is internally connected from SW to VIN to minimize EMI. For applications where VOUT > 4.3V, it is required to have Schottky diodes from SW to VOUT or a snubber circuit to stay within absolute maximum rating on the SW pins. VOUTA–D (Pins 4, 5, 20, 21): Output of the Four Synchronous Rectifiers. Connect output filter capacitors to these pins. Connect one low ESR ceramic capacitor directly from each pin to the ground plane. REFEN (Pin 9): Pull this pin above 1.4V to enable the REF output. Grounding this pin turns the REF output off to reduce quiescent current. VOUTS (Pin 10): VOUT Sense Pin. Connect VOUTS directly to an output filter capacitor. The top of the feedback divider network should also be tied to this point. SGND (Pin 11): Signal Ground Pin. Connect to ground plane, near the feedback divider resistor. FB (Pin 12): Feedback Pin. Connect FB to a resistor divider, keeping the trace as short as possible. The output voltage can be adjusted according to the following formula: VOUT = 1.22 • R1 + R2 R1 where R1 is connected from FB to SGND and R2 is connected from FB to VOUTS. COMP (Pin 13): Error Amp Output. A frequency compensation network is connected from this pin to ground to compensate the loop. See the section Closing the Feedback Loop for guidelines. BURST (Pin 14): Burst Mode Threshold Adjust Pin. A resistor/capacitor combination from this pin to ground programs the average load current at which automatic Burst Mode operation is entered. For manual control of Burst Mode operation, ground BURST to force Burst Mode operation or connect it to VOUT to force fixed frequency PWM mode. Note that BURST must not be pulled higher than VOUT. REFOUT (Pin 15): Buffered 1.22V Reference Output. This pin can source up to 100µA and sink up to 10µA (only active when REFEN is pulled high). This pin must be decoupled with a 0.1µF capacitor for stability. PGOOD (Pin 16): Open-Drain Output of the Power Good Comparator. This pin will go low when the output voltage drops 11% below its regulated value. Maximum sink current should be limited to 10mA. SYNCOUT (Pin 25): Sync Output Pin. A clock is provided at the oscillator frequency, but phase-shifted 180 degrees to allow for synchronizing two devices for an 8-phase converter. CCM (Pin 26): This pin is used to select forced continuous conduction mode. Normally this pin is grounded to allow CCM or DCM operation. To force continuous conduction mode, tie this pin to VOUT. In this mode, a reverse current of up to about 0.6A will be allowed before turning off the synchronous rectifier. This will prevent pulse skipping at light load when Burst Mode operation is disabled, and will also improve the large-signal transient response when going from a heavy load to a light load. For Burst Mode operation, CCM should be low. 3425f 8 LTC3425 U U U PI FU CTIO S ILIM (Pin 27): Current Limit Adjust Pin. Connect a resistor from ILIM to SGND to set the peak current limit threshold for the N-channel MOSFETs, according to the formula (note that this is the peak current in each inductor): ILIM = 130 R VOUT 2 where I is in Amps and R is in kΩ. Do not use values less than 75k. RT (Pin 28): Connect a resistor from RT to SGND (or SGND plane) to program the oscillator frequency, according to the formula: fOSC = 60 RT fSWITCH = SYNCIN (Pin 30): Oscillator Synchronization Pin. A clock pulse width of 100ns minimum is required to synchronize the internal oscillator. If not used, SYNCIN should be grounded. The typical logic threshold for this input is: fOSC 15 = 4 RT where fOSC is in MHz and RT is in kΩ. VIN (Pin 29): Input Supply Pin. Connect this to the input supply and decouple with 1µF minimum low ESR ceramic capacitor. OPERATING MODE Automatic Burst (Operating Mode is Load Dependent) The SYNCIN is ignored in Burst Mode operation. SHDN (Pin 31): Shutdown Pin. Grounding SHDN (or pulling it below 0.25V) shuts down the IC. Pull pin up to ≥1V to enable. Once enabled, the pin only needs to be ≥0.65V. SS (Pin 32): Soft-Start pin. Connect a capacitor from this pin to ground to set the soft-start time, according to the formula: t(ms) = CSS (µF) • 320 The nominal soft-start charging current is 2.5µA. The active range of SS is from 0.8V to 1.6V. Note that this is the rise time of SS. The actual rise time of VOUT will be a function of load and output capacitance. Exposed Pad (Pin 33): Additional Power Ground for the IC. Connect directly to the power ground plane. BURST PIN CCM PIN RC Network to Ground Low Forced Burst Low Low Forced Fixed Frequency with Pulse Skipping at Light Load High Low Forced Fixed Frequency, Low Noise (No Pulse Skipping) High High 3425f 9 LTC3425 W BLOCK DIAGRA 1V TO 4.5V + 29 3 VIN FB 6 SWA 1 OF 4 SWB 19 22 SWC SWD VOUTA 4 VOUTB 5 + ANTIRING 0.8V – PMOS ENABLE PWM LOGIC AND DRIVERS MODE CONTROL 26 VOUTC 20 P CCM VOUTD 21 + – VOUT 2.5V TO 5.25V N I/2000 ZERO DIVIDER 4-PHASE GEN 28 SYNC 30 RT 4 + CLK SLOPE 4 IOSC OSC Σ VOUTS 10 + Σ + – – + + 1.086/ 1.116 + PGOOD 16 – SYNCIN 4 4 4 + + 1.22V MODE 25 Burst Mode CONTROL SYNCOUT – BURST COMP 0.94V ERROR AMP FB – COMP SLEEP THERMAL SHDN SHUTDOWN VREF OFF ON REFOUT 9 UV REFEN –3% VREF 1.22V + REFOUT + 15 + SHDN 13 – OFF ON 31 12 START-UP, SOFT-START AND THERMAL REG – – OV GNDA GNDB 1 7 2 8 GNDC 17 18 GNDD 23 24 BURST SGND 11 3% 33 14 SS 32 ILIMIT ILIM 27 3425f 10 LTC3425 U OPERATIO DETAILED DESCRIPTION OUTPUT RIPPLE CURRENT (A) The LTC3425 provides high efficiency, low noise power for high current boost applications such as cellular phones and PDAs. The true output disconnect feature eliminates inrush current and allows VOUT to go to zero during shutdown. The current mode architecture with adaptive slope compensation provides ease of loop compensation with excellent transient load response. The low RDS(ON), low gate charge synchronous switches eliminate the need for an external Schottky rectifier, and provide efficient high frequency pulse width modulation (PWM) control. High efficiency is achieved at light loads when Burst Mode operation is entered, where the IC’s quiescent current is a low 12µA typical on VOUT. 5 SINGLE PHASE 4 3 FOUR PHASE 2 1 0 0 1 0.5 1.5 TIME (µs) 3425 F01 Figure 1. Comparison of Output Ripple Current with Single Phase and 4-Phase Boost Converter in a 2A Load Application Operating at 50% Duty Cycle MULTIPHASE OPERATION Example: The LTC3425 uses a 4-phase architecture, rather than the conventional single phase of other boost converters. By having multiple phases equally spaced (90° apart), not only is the output ripple frequency increased by a factor of four, but the output capacitor ripple current is greatly reduced. Although this architecture requires four inductors, rather than a single inductor, there are a number of important advantages. The following example, operating at 50% duty cycle, illustrates the advantages of multiphase operation over a conventional single-phase design. • Much lower peak inductor current allows the use of smaller, lower cost inductors. • Greatly reduced output ripple current minimizes output capacitance requirement. • Higher frequency output ripple is easier to filter for low noise applications. • Input ripple current is also reduced for lower noise on VIN. The peak boost inductor current is given by: ILPEAK = IO di + (1 – D) • N 2 Where IO is the average load current, D is the PWM duty cycle, N is the number of phases and di is the inductor ripple current. This relationship is shown graphically in Figure 1 using a single phase and a 4-phase example. VIN = 1.9V, VOUT = 3.6V, Efficiency = 90% (approx), IOUT = 2A, Frequency = 1MHz, L = 2.2µH Table 1 SINGLE PHASE FOUR PHASE CHANGE FROM 1 TO 4 PHASE Peak-Peak Output Ripple Current 4.227A 0.450A Reduced by 89% RMS Output Ripple Current 2.00A 0.184A Reduced by 91% Peak Inductor Current 4.227A 1.227A Reduced by 71% Output Ripple Frequency 1MHz 4MHz Increased by 4× PARAMETER With 4-phase operation, at least one of the phases will be delivering current to the load whenever VIN is greater than one quarter VOUT (duty cycles less than 75%). For lower duty cycles, there can be as many as two or three phases delivering load current simultaneously. This greatly reduces both the output ripple current and the peak current in each inductor, compared with a single-phase converter. This is illustrated in the waveforms of Figures 2 and 3. Operation Using Only Two or Three Phases The LTC3425 can operate as a 2- or 3-phase converter by simply eliminating the inductor from the unused phase(s). 3425f 11 LTC3425 U OPERATIO SWITCH A VOLTAGE SWITCH B VOLTAGE SWITCH C VOLTAGE SWITCH D VOLTAGE INDUCTOR A CURRENT INDUCTOR B CURRENT INDUCTOR C CURRENT INDUCTOR D CURRENT INPUT CURRENT RECTIFIER A CURRENT RECTIFIER B CURRENT RECTIFIER C CURRENT RECTIFIER D CURRENT OUTPUT RIPPLE CURRENT 3425 F02 Figure 2. Simplified Voltage and Current Waveforms for 4-Phase Operation at 50% Duty Cycle This approach can be used to reduce solution cost and board area in applications not requiring the full power capability of the LTC3425, or where peak efficiency may not be as important as cost and size. In this case, phase A should always be used, since this is the only phase active in Burst Mode operation and phase C is recommended as the second phase for the lowest output ripple, since it is 180° out of phase with phase A. Figure 4 illustrates the efficiency differences with two, three and four phases in a typical 2-cell to 3.3V boost application. In this example, you can see that for maximum loads less than 1A, the efficiency penalty for using only two or three phases is fairly small. Keep in mind, however, that this penalty will grow larger as the input voltage drops. Output ripple will also increase with each phase that is eliminated. Low Voltage Start-Up The LTC3425 includes an independent start-up oscillator designed to start up at input voltages as low as 0.88V. The frequency and peak current limit during start-up are 3425f 12 LTC3425 U OPERATIO SWITCH A VOLTAGE SWITCH B VOLTAGE SWITCH C VOLTAGE SWITCH D VOLTAGE INDUCTOR A CURRENT INDUCTOR B CURRENT INDUCTOR C CURRENT INDUCTOR D CURRENT INPUT CURRENT RECTIFIER A CURRENT RECTIFIER B CURRENT RECTIFIER C CURRENT RECTIFIER D CURRENT OUTPUT RIPPLE CURRENT 3432 F03 Figure 3. Simplified Voltage and Current Waveforms for 4-Phase Operation at 75% Duty Cycle internally controlled. The device can start up under some load (see the graph Start-Up Current vs Input Voltage). Soft-start and inrush current limiting is provided during start-up as well as normal mode. The same soft-start capacitor is used for each operating mode. During start-up, all four phases switch in unison. When either VIN or VOUT exceeds 2.3V, the IC enters normal operating mode. Once the output voltage exceeds the input by 0.3V, the IC powers itself from VOUT instead of VIN. At this point the internal circuitry has no dependency on the VIN input voltage, eliminating the requirement for a large input capacitor. The input voltage can drop as low as 0.5V without affecting circuit operation. The limiting factor for the application becomes the ability of the power source to supply sufficient energy to the output at the low voltages, and the maximum duty cycle that is clamped at 90%. 3425f 13 LTC3425 U OPERATIO EFFICIENCY (%) 98 60 RT TA = 25°C 96 VIN = 2.4V VOUT = 3.3V 94 1MHz/PHASE fOSC = 92 fSWITCH = 90 4 PHASE 88 where fOSC is in MHz and RT is in kΩ. 86 2 PHASE 3 PHASE 84 82 80 100 fOSC 15 = 4 RT 1000 LOAD (mA) 10000 3425 G13 Figure 4. LTC3425 Efficiency vs Load for 2-, 3- and 4-Phase Operation Low Noise Fixed Frequency Operation Shutdown: The part is shut down by pulling SHDN below 0.25V and made active by pulling the pin above 1V. Note that SHDN can be driven above VIN or VOUT, as long as it is limited to less than 5.5V. Soft-Start: The soft-start time is programmed with an external capacitor to ground on SS. An internal current source charges it with a nominal 2.5µA (1µA while in startup mode when VIN and VOUT are both below 2.3V). The voltage on the soft-start pin (in conjunction with the external resistor on the ILIM pin) is used to control the peak current limit until the voltage on the capacitor exceeds 1.6V, at which point the external resistor sets the peak current. In the event of a commanded shutdown or a thermal shutdown, the capacitor is discharged automatically. Note that Burst Mode operation is inhibited during the soft-start time. t(ms) = CSS(µF) • 320 Oscillator: The frequency of operation is set through a resistor from the RT pin to ground. An internally trimmed timing capacitor resides inside the IC. The internal oscillator frequency is then divided by four to generate the four phases, each phase shifted by 90°. The oscillator frequency and resulting switching frequency of each of the four phases are calculated using the following formula: The oscillator can be synchronized with an external clock applied to SYNCIN. When synchronizing the oscillator, the free running frequency must be set to an approximately 30% lower frequency than the desired synchronized frequency. SYNCOUT is provided for synchronizing two or more devices. The output sync pulse is 180° out of phase from the internal oscillator, allowing two devices to be synchronized to create an 8-phase converter. Note that in Burst Mode operation, the oscillator is turned off and SYNCOUT is driven low. In fixed frequency operation, the minimum on-time before pulse skipping occurs (at light load) is typically 110ns. Current Sensing: Lossless current sensing converts the peak current signal to a voltage to sum in with the internal slope compensation. This summed signal is compared to the error amplifier output to provide a peak current control command for the PWM. The internal slope-compensation is adaptive to the input and output voltage, therefore the converter provides the proper amount of slope compensation to ensure stability, but not an excess to cause a loss of phase margin in the converter. Error Amp: The error amplifier is a transconductance amplifier with its positive input internally connected to the 1.22V reference and its negative input connected to FB. A simple compensation network is placed from COMP to ground. Internal clamps limit the minimum and maximum error amp output voltage for improved large-signal transient response. During Burst Mode operation, the compensation pin is high impedance, however clamps limit the voltage on the external compensation network, preventing the compensation capacitor from discharging to zero. 3425f 14 LTC3425 U OPERATIO Current Limit: The programmable current limit circuit sets the maximum peak current in the NMOS switches. The current limit level is programmed using a resistor to ground on the ILIM pin. Do not use values below 75k. In Burst Mode operation, the current limit is automatically set to a nominal value of 0.6A peak for optimal efficiency. ILIM = 130 per Phase R where I is in Amps and R is in kΩ. Synchronous Rectifier and Zero Current Amp: To prevent the inductor current from running away, the PMOS synchronous rectifier is only enabled when V OUT > (VIN + 0.3V) and FB is > 0.8V.The zero current amplifier monitors the inductor current to the output and shuts off the synchronous rectifier once the current is below 50mA typical, preventing negative inductor current. If CCM is tied high, the amplifier will allow up to 0.6A of negative current in the synchronous rectifier. Antiringing Control: The antiringing control connects a resistor across the inductor to damp the ringing on SW in discontinuous conduction mode. The LCSW ringing (L = inductor, CSW = Capacitance on Switch pin) is low energy, but can cause EMI radiation. Power Good: An internal comparator monitors the FB voltage. If FB drops 11.4% below the regulation value, PGOOD will pull low (sink current should be limited to 10mA max). The output will stay low until the FB voltage is within 9.5% of the regulation voltage. A filter prevents noise spikes from causing nuisance trips. Reference Output: The internal 1.22V reference is buffered and brought out to REFOUT. It is active when REFEN is pulled high (above 1.4V). For stability, a minimum of 0.1µF capacitor must be placed on REFOUT. The output can source up to 100µA and sink up to 10µA. For the lowest possible quiescent current in Burst Mode operation, the reference output should be disabled by grounding REFEN. Thermal Shutdown: An internal temperature monitor will start to reduce the programmed peak current limit if the die temperature exceeds 135°C. If the die temperature continues to rise and reaches 150°C, the part will go into thermal shutdown and all switches will be turned off and the soft-start capacitor will be reset. The part will be enabled again when the die temperature has dropped about 10°C. Note: Overtemperature protection is intended to protect the device during momentary overload conditions. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. Burst Mode Operation Burst Mode operation can be automatic or user controlled. In automatic operation, the IC will automatically enter Burst Mode operation at light load and return to fixed frequency PWM mode for heavier loads. The user can program the average load current at which the mode transition occurs using a single resistor. During Burst Mode operation, only Phase A is active and the other three phases are turned off, reducing quiescent current and switching losses by 75%. Note that the oscillator is also shut down in this mode, since the on time is determined by the time it takes the inductor current to reach a fixed peak current, and the off time is determined by the time it takes for the inductor current to return to zero. In Burst Mode operation, the IC delivers energy to the output until it is regulated and then goes into a sleep mode where the outputs are off and the IC is consuming only 12µA of quiescent current. In this mode, the output ripple has a variable frequency component with load current and will be typically 2% peak-peak. This maximizes efficiency at very light loads by minimizing switching and quiescent losses. Burst Mode ripple can be reduced slightly by using more output capacitance (47µF or greater). This capacitor does not need to be a low ESR type if low ESR ceramics are also used. Another method of reducing Burst Mode ripple is to place a small feedforward capacitor across the upper resistor in the VOUT feedback divider network. During Burst Mode operation, COMP is disconnected from the error amplifier in an effort to hold the voltage on the external compensation network where it was before entering Burst Mode operation. To minimize the effects of leakage current and stray resistance, voltage clamps limit the min and max voltage on COMP during Burst Mode operation. This minimizes the transient experienced when 3425f 15 LTC3425 U OPERATIO a heavy load is suddenly applied to the converter after being in Burst Mode operation for an extended period of time. For automatic operation, an RC network should be connected from BURST to ground. The value of the resistor will control the average load current (IBURST) at which Burst Mode operation will be entered and exited (there is hysteresis to prevent oscillation between modes). The equation given for the capacitor on BURST is for the minimum value, to prevent ripple on BURST from causing the part to oscillate in and out of Burst Mode operation at the current where the mode transition occurs. IBURST = 2.75 to leave Burst Mode operation RBURST 1.7 IBURST = to enter Burst Mode operation RBURST where RBURST is in kΩ and IBURST is in Amps. For load currents under 20mA, refer to the curve Automatic Burst Mode Thresholds vs RBURST. CBURST = COUT • VOUT 10, 000 where CBURST(MIN) and COUT are in µF. When the voltage on BURST drops below 0.94V, the part will enter Burst Mode operation. When the BURST pin voltage is above 1.06V, it will be in fixed frequency mode. In the event that a sudden load transient causes the feedback pin to drop by more than 4% from the regulation value, an internal pull-up is applied to BURST, forcing the part quickly out of Burst Mode operation. For optimum transient response when going between Burst Mode operation and PWM mode, the mode should be controlled manually by the host. This way PWM mode can be commanded before the load step occurs, minimizing output voltage droop. For manual control of Burst Mode operation, the RC network can be eliminated. To force fixed frequency PWM mode, BURST should be connected to VOUT. To force Burst Mode operation, BURST should be grounded. The circuit connected to BURST should be able to sink up to 2mA. Note that Burst Mode operation is inhibited during start-up and soft-start. Note that if VIN is raised to within 200mV or less below VOUT, the part will exit Burst Mode operation and the synchronous rectifier will be disabled. It will remain in fixed frequency mode until VIN is at least 300mV below VOUT. If the load applied during forced Burst Mode operation (BURST = GND) exceeds the current that can be supplied, the output voltage will start to droop and the part will automatically come out of Burst Mode operation and enter fixed frequency mode, raising VOUT. The part will then enter Burst Mode operation once again, the cycle will repeat, resulting in about 4% output ripple. The maximum current that can be supplied in Burst Mode operation is given by: IO(MAX) = 0.60 in Amps VOUT – VIN 2 • 1+ VIN Output Disconnect and Inrush Limiting The LTC3425 is designed to allow true output disconnect by eliminating body diode conduction of the internal PMOS rectifiers. This allows VOUT to go to zero volts during shutdown, drawing no current from the input source. It also allows for inrush current limiting at turn-on, minimizing surge currents seen by the input supply. Note that to obtain the advantages of output disconnect, there cannot be any external Schottky diodes connected between the switch pins and VOUT. Note: Board layout is extremely critical to minimize voltage overshoot on the switch pins due to stray inductance. Keep the output filter capacitors as close as possible to the VOUT pins, and use very low ESR/ESL ceramic capacitors tied to a good ground plane. For applications with VOUT over 4.3V, Schottky diodes are required to limit the peak switch voltage to less than 6V. These must also be very close to minimize stray inductance. See the section Applications Where VOUT > 4.3V. 3425f 16 LTC3425 U W U U APPLICATIO S I FOR ATIO L1 The inductor current ripple is typically set to 20% to 40% of the maximum inductor current. RT CIN CSS L4 COUT For high efficiency, choose an inductor with high frequency core material, such as ferrite to reduce core loses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R losses, and must be able to handle the peak inductor current without saturating. To minimize radiated noise, use a shielded inductor. (Note that the inductance of shielded types will drop more as current increases, and will saturate more easily). See Table 2 for a list of inductor manufacturers. COUT LTC3425 COUT COUT L2 L3 Table 2. Inductor Vendor Information 3425 F05 Figure 5. Typical Board Layout SUPPLIER Coilcraft Murata Sumida LTC3425 3425 F06 TDK Figure 6. Example Board Layout for a 10W, 4-Phase Boost Converter. Total Area = 0.50in2 (with All Components Mounted on the Topside of Board) COMPONENT SELECTION Inductor Selection The high frequency, multiphase operation of the LTC3425 allows the use of small surface mount inductors. The minimum inductance value is proportional to the operating frequency and is limited by the following constraints: L> ( VIN(MIN) • VOUT(MAX) – VIN(MIN) 2 and L > f f • Ripple • VOUT(MAX) ) where: f = Operating frequency in MHz (of each phase) Ripple = Allowable inductor current ripple (amps peak-peak) VIN(MIN) = Minimum input voltage VOUT(MAX) = Maximum output voltage PHONE (847) 639-6400 USA: (814) 237-1431 USA: (847) 956-0666 Japan: 81-3-3607-5111 (847) 803-6100 FAX (847) 639-1469 USA: (814) 238-0490 USA: (847) 956-0702 Japan: 81-3-3607-5144 (847) 803-6296 WEB SITE www.coilcraft.com www.murata.com www.japanlink.com/ sumida www.component. tdk.com Some example inductor part types are: Coilcraft DO-1608, DS-1608 and DT-1608 series Murata LQH3C, LQH4C, LQH32C and LQN6C series Sumida CDRH3D16, CDRH4D18, CDRH4D28, CR32, CR43 series TDK RLF5018T and NLFC453232T series Output Capacitor Selection The output voltage ripple has three components to it. The bulk value of the capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The max ripple due to charge is given by: VRBULK = IP • VIN COUT • VOUT • f • 4 where: IP = peak inductor current f = switching frequency of one phase 3425f 17 LTC3425 U W U U APPLICATIO S I FOR ATIO The ESR (equivalent series resistance) is usually the most dominant factor for ripple in most power converters. The ripple due to capacitor ESR is given by: VRCESR = IP • CESR where CESR = Capacitor Series Resistance The ESL (equivalent series inductance) is also an important factor for high frequency converters. Using small, surface mount ceramic capacitors, placed as close as possible to the VOUT pins, will minimize ESL. Low ESR/ESL capacitors should be used to minimize output voltage ripple. For surface mount applications, AVX TPS Series tantalum capacitors, Sanyo POSCAP or X5R type ceramic capacitors are recommended. In all applications, a minimum of 1µF, low ESR ceramic capacitor should be placed as close to each of the four VOUT pins as possible, and grounded to a local ground plane. Input Capacitor Selection The input filter capacitor reduces peak currents drawn from the input source and reduces input switching noise. Since the IC can operate at voltages below 0.5V once the output is regulated (as long as SHDN is above 0.65V), the demand on the input capacitor to lower ripple is much less. Taiyo Yuden offers very low ESR capacitors, for example the 2.2µF in a 0603 case (JMK107BJ22MA). See Table 3 for a list of capacitor manufacturers for input and output capacitor selection. Table 3. Capacitor Vendor Information SUPPLIER AVX Sanyo TDK Murata PHONE (803) 448-9411 (619) 661-6322 (847) 803-6100 USA: (814) 237-1431 (800) 831-9172 Taiyo Yuden (408) 573-4150 FAX (803) 448-1943 (619) 661-1055 (847) 803-6296 USA: (814) 238-0490 WEB SITE www.avxcorp.com www.sanyovideo.com www.component.tdk.com www.murata.com (408) 573-4159 www.t-yuden.com Applications Where VOUT > 4.3V Due to the very high slew rates associated with the switch nodes, Schottky diode clamps are required in any application where VOUT can exceed 4.3V to prevent the switch voltage from exceeding its maximum rating during the break-before-make time. Surface mount diodes, such as the MBR0520L or equivalent, must be used and must be located very close to the pins to minimize stray inductance. Two example application circuits are shown in Figures 7 and 8, one with output disconnect and one without. Operating Frequency Selection There are several considerations in selecting the operating frequency of the converter. The first is, which are the sensitive frequency bands that cannot tolerate any spectral noise? For example, in products incorporating RF communications, the 455kHz IF frequency is sensitive to any noise, therefore switching above 600kHz is desired. Some communications have sensitivity to 1.1MHz, and in that case, a 1.5MHz converter frequency may be employed. The second consideration is the physical size of the converter. As the operating frequency goes up, the inductor and filter capacitors go down in value and size. The trade off is in efficiency, since the switching losses increase proportionally with frequency. Thermal Considerations To deliver the power that the LTC3425 is capable of, it is imperative that a good thermal path be provided to dissipate the heat generated within the package. This can be accomplished by taking advantage of the large thermal pad on the underside of the IC. It is recommended that multiple vias in the printed circuit board be used to conduct heat away from the IC and into a copper plane with as much area as possible. In the event that the junction temperature gets too high, the peak current limit will automatically be decreased. If the junction temperature continues to rise, the part will go into thermal shutdown, and all switching will stop until the temperature drops. Closing the Feedback Loop The LTC3425 uses current mode control with internal adaptive slope compensation. Current mode control eliminates the 2nd order filter, due to the inductor and output capacitor exhibited in voltage mode controllers, and simplifies it to a single pole filter response. The product of the 3425f 18 LTC3425 U W U U APPLICATIO S I FOR ATIO VIN 3.3V CIN 2.2µF L1 2.7µH L2 2.7µH L3 2.7µH L4 2.7µH D1 CS 0.47µF ×2 D2 D3 D4 VIN SWA SWB SWC SHDN REFOUT CCM REFEN SWD VOUTS VOUTA VOUTB VOUTC VOUTD Q1 COUT 4.7µF ×4 LTC3425 SYNCIN BURST VOUT RT RT 12.1k ILIM RLIM 75k SGND GNDA GNDB FB COMP SS SYNCOUT PGOOD GNDC GNDD R2 309k R4 100k CBULK 150µF 6.3V VOUT 5V 2.5A R1 100k C2 220pF CSS 0.01µF + R3 100k PGOOD 3425 F07 CIN: TAIYO YUDEN JMK107BJ225MA CS: TAIYO YUDEN LMK107BJ474KA COUT: TAIYO YUDEN JMK212BJ475MG (×4) CBULK: AVX TPSD157M006R0050 D1 TO D4: MOTOROLA MBR0520L L1 TO L4: TDK RLF5018T-2R7M1R8 Q1: ZETEX ZXM61P02F Figure 7. Application Circuit for VOUT > 4.3V with Inrush Limiting and Output Disconnect VIN 3.3V CIN 2.2µF L1 2.7µH L2 2.7µH L3 2.7µH L4 2.7µH D1 D2 D3 D4 VIN SWA SWB SHDN REFOUT CCM REFEN SWC SWD VOUTS VOUTA VOUTB VOUTC VOUTD COUT 4.7µF ×4 LTC3425 SYNCIN BURST VOUT RT RT 12.1k ILIM RLIM 75k SGND GNDA GNDB FB COMP SS SYNCOUT PGOOD GNDC GNDD R2 309k R4 100k CBULK 150µF 6.3V VOUT 5V 2.5A R1 100k C2 220pF CSS 0.01µF + R3 100k PGOOD 3425 F08 CIN: TAIYO YUDEN JMK107BJ225MA COUT: TAIYO YUDEN JMK212BJ475MG (×4) CBULK: AVX TPSD157M006R0050 D1 TO D4: MOTOROLA MBR0520LT1 L1 TO L4: TDK RLF5018T-2R7M1R8 Figure 8. Application Circuit for VOUT > 4.3V When Inrush Limiting and Output Disconnect are Not Required 3425f 19 LTC3425 U W U U APPLICATIO S I FOR ATIO modulator control to output DC gain, and the error amp open-loop gain gives the DC gain of the system: G DC = G CONTROLOUTPUT • G EA • G CONTROL = VREF VOUT 8 • VIN , G EA ≈ 5, 000 IOUT The output filter pole is given by: IOUT π • VOUT • COUT where COUT is the output filter capacitor. The output filter zero is given by: FFILTERPOLE = FFILTERZERO = 1 2 • π • RESR • COUT where RESR is the output capacitor equivalent series resistance. A troublesome feature of the boost regulator topology is the right half plane zero (RHP), and is given by: VIN2 FRHPZ = 2 • π • IOUT • L At heavy loads this gain increase with phase lag can occur at a relatively low frequency. The loop gain is typically rolled off before the RHP zero frequency. The typical error amp compensation is shown in Figure 9. The equations for the loop dynamics are as follows: 1 2 • π • 100e6 • CC1 which is extremely close to DC FPOLE1 ≈ 1 2 • π • RZ • CC1 1 FPOLE2 = 2 • π • RZ • CC2 FZERO1 = + ERROR AMP – VOUT 1.25V R1 FB R2 VC CC1 RZ CC2 3425 F09 Figure 9 3425f 20 LTC3425 U TYPICAL APPLICATIO S Single or Dual Cell to 3.3V Boost with Automatic Burst Mode Operation VIN = 1.1V TO 3V + CIN 2.2µF L1 2.2µH VIN SWA L2 2.2µH SWB SHDN REFOUT CCM REFEN L3 2.2µH SWC L4 2.2µH SWD VOUTS VOUTA VOUTB VOUTC VOUTD R5 10k C1 22pF COUT 4.7µF ×4 LTC3425 SYNCIN BURST C3 0.056µF R4 20k RT RT 15k RLIM 75k ILIM SGND GNDA GNDB FB COMP SS SYNCOUT PGOOD GNDC GNDD R5 100k + CBULK 150µF 4V R1 301k C2 220pF CSS 0.01µF R2 511k VOUT 3.3V 1A R3 100k PGOOD 3425 TA03 CBULK: AVX TPSD157M004R0050 CIN: TAIYO YUDEN JMK107BJ225MA COUT: TAIYO YUDEN JMK212BJ475MG (×4) L1 TO L4: MURATA LQH4C2R2M04 3425f 21 LTC3425 U TYPICAL APPLICATIO S Application with User Commanded Burst Mode Operation and Buffered Reference Output Enabled VIN = 1.8V TO 3V + CIN 2.2µF L1 3.3µH VIN SWA L2 3.3µH SWB SHDN REFOUT VREF C1 0.1µF CCM VOUT REFEN L3 3.3µH SWC L4 3.3µH SWD VOUTS VOUTA VOUTB VOUTC VOUTD R4 10k C3 22pF COUT 4.7µF ×4 LTC3425 SYNCIN BURST PWM BURST RT RT 30.1k ILIM RLIM 75k SGND GNDA GNDB CIN: TAIYO YUDEN JMK107BJ225MA COUT: TAIYO YUDEN JMK212BJ475MG (×4) L1 TO L4: SUMIDA CDRH4D28 FB COMP SS SYNCOUT PGOOD GNDC GNDD R4 100k R1 301k C2 330pF CSS 0.01µF R2 511k VOUT 3.3V 2A R3 33k PGOOD 3425 TA04 3425f 22 LTC3425 U PACKAGE DESCRIPTIO UH Package 32-Lead Plastic QFN (5mm × 5mm) (Reference LTC DWG # 05-08-1693) 0.57 ±0.05 5.35 ±0.05 4.20 ±0.05 3.45 ±0.05 (4 SIDES) PACKAGE OUTLINE 0.23 ± 0.05 0.50 BSC RECOMMENDED SOLDER PAD LAYOUT 5.00 ± 0.10 (4 SIDES) BOTTOM VIEW—EXPOSED PAD R = 0.115 TYP 0.75 ± 0.05 0.00 – 0.05 0.40 ± 0.10 31 32 PIN 1 TOP MARK 1 2 3.45 ± 0.10 (4-SIDES) (UH) QFN 0102 0.200 REF NOTE: 1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE M0-220 VARIATION WHHD-(X) (TO BE APPROVED) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 0.23 ± 0.05 0.50 BSC 3425f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LTC3425 U TYPICAL APPLICATIO 10MHz, High Current, Very Low Profile, 8-Phase Converter Using Two LTC3425s Operating in Fixed Frequency Mode with Forced CCM (Max Component Height = 1.6mm) VIN 2.5V CIN1 2.2µF L1 1µH VIN SWA L2 1µH SWB SHDN REFOUT CCM VOUT REFEN L3 1µH SWC SWD VOUTS VOUTA VOUTB VOUTC VOUTD LTC3425 SYNCIN BURST RT RT1 12.1k ILIM R5 75k SGND GNDA GNDB CIN2 2.2µF L4 1µH VIN L5 1µH SWA L6 1µH SWB SHDN REFOUT COUT1 4.7µF ×4 FB COMP SS SYNCOUT PGOOD GNDC GNDD CCM VOUT RF4 17.4k REFEN L7 1µH SWC L8 1µH SWD VOUTS VOUTA VOUTB VOUTC VOUTD LTC3425 SYNCIN BURST RT ILIM RF3 10.2k RT2 14.7k R6 75k SGND CIN1,2: TAIYO YUDEN JMK107BJ225MA COUT: TAIYO YUDEN JMK212BJ475MG (×8) L1 TO L8: MURATA LQH32CN1R0M51 GNDA GNDB FB COMP SS SYNCOUT PGOOD GNDC GNDD COUT2 4.7µF ×4 RF2 17.4k C1 330pF CSS 0.022µF R4 100k VOUT 3.3V 5A RF1 10.2k R3 33k PGOOD 3425 TA05 RELATED PARTS PART NUMBER LT®1370/LT1370HV LT1371/LT1371HV LT1613 LT1618 LTC1700 LTC1871 LT1930/LT1930A LT1946/LT1946A LT1961 LTC3400/LTC3400B LTC3401/LTC3402 LTC3701 DESCRIPTION 6A (ISW) 500kHz, High Efficiency Step-Up DC/DC Converters 3A (ISW) 500kHz, High Efficiency Step-Up DC/DC Converters 550mA (ISW) 1.4MHz, High Efficiency Step-Up DC/DC Converter 1.5A (ISW) 1.25MHz, High Efficiency Step-Up DC/DC Converter No RSENSETM 530kHz, Synchronous Step-Up DC/DC Controller Wide Input Range, 1MHz, No RSENSE Current Mode Boost, Flyback and SEPIC Controller 1A (ISW) 1.2MHz/2.2MHz, High Efficiency Step-Up DC/DC Converters 1.5A (ISW) 1.2MHz/2.7MHz, High Efficiency Step-Up DC/DC Converters 1.5A (ISW) 1.25MHz, High Efficiency Step-Up DC/DC Converter 600mA (ISW) 1.2MHz, Synchronous Step-Down DC/DC Converters 1A/2A (ISW) 3MHz, Synchronous Step-Up DC/DC Converters 2-Phase, 550kHz, Low Input Voltage, Dual Step-Down DC/DC Controller COMMENTS VIN: 2.7V to 30V, VOUT(MAX): 35V/42V, IQ: 4.5mA, ISD: <12µA, DD, TO220-7 VIN: 2.7V to 30V, VOUT(MAX): 35V/42V, IQ: 4mA, ISD: <12µA, DD, TO220-7, S20 90% Efficiency, VIN: 0.9V to 10V, VOUT(MAX): 34V, IQ: 3mA, ISD: <1µA, ThinSOT 90% Efficiency, VIN: 1.6V to 18V, VOUT(MAX): 35V, IQ: 1.8mA, ISD: <1µA, MS10 95% Efficiency, VIN: 0.9V to 5V, IQ: 200µA, ISD: <10µA, MS10 92% Efficiency, VIN: 2.5V to 36V, IQ: 250µA, ISD: <10µA, MS10 High Efficiency, VIN: 2.6V to 16V, VOUT(MAX): 34V, IQ: 4.2mA/5.5mA, ISD: <1µA, ThinSOT High Efficiency, VIN: 2.45V to 16V, VOUT(MAX): 34V, IQ: 3.2mA, ISD: <1µA, MS8 90% Efficiency, VIN: 3V to 25V, VOUT(MAX): 35V, IQ: 0.9mA, ISD: 6µA, MS8E 92% Efficiency, VIN: 0.85V to 5V, VOUT(MAX): 5V, IQ: 19µA/300µA, ISD: <1µA, ThinSOT 97% Efficiency, VIN: 0.5V to 5V, VOUT(MAX): 6V, IQ: 38µA, ISD: <1µA, MS10 97% Efficiency, VIN: 2.5V to 10V, IQ: 460µA, ISD: <9µA, SSOP-16 3425f 24 Linear Technology Corporation LT/TP 0803 1K PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2003