M65850P/FP Digital Echo (Digital Delay) REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Description The M65850P/FP is a CMOS IC for generating echo to be added to the voice through a Karaoke microphone. It is optimal to provide the echo effect function for Karaoke player, such as radio cassette recorders, mini audio components and television sets. Increased master clock frequency assures high-performance short delay, enabling the IC to be used for Dolby prologic surround system. Features • Built-in input/output filters, A/D and D/A converters, and memory realize a delay system with only a single chip. • Built-in current control type clock oscillator circuit avoids clock affection outside, thus allowing prevention of undesired radiation. • Delay time = 164 ms (with master clock set at 1 MHz) (Selection of delay time in a range between 15 ms and 200 ms) • Small package (14-pin DIP: PRDP0014AA-A (14P4), 16-pin SOP: PRSP0016DE-A (16P2N-A)) • Built-in 20 Kbit SRAM • Built-in auto reset circuit (The IC reset as power is turned on) • Single power supply (5 V) Recommended Operating Condition • Supply voltage range: VCC = 3.5 to 5.5 V • Rated supply voltage: VCC = 5 V System Configuration RAM HPF L Vocal cut R LPF BASS MIX L MIX BASS MIX R Key control HPF MIC1 MIX MIC VOL MIC AMP MIX MIC2 MIC VOL MIX Echo Echo VOL MIC AMP M65850P/FP Note: Dolby is the registered trademarks of Dolby Laboratories Licensing Corporation. REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 1 of 11 M65850P/FP Block Diagram • M65850P CLOCK 13 CC2 6 OP2 OUT 10 LPF2 IN 9 LPF2 OUT 8 LPF2 D/A Oscillator REF 12 OP2 IN 11 1/2 VCC DO1 CLOCK MO Auto reset RESET Main control 20 kbit SRAM MI D1 DO0 A/D LPF1 1 LPF1 IN 2 LPF1 OUT 3 OP1 OUT 4 OP1 IN 5 CC1 7 GND 14 VCC CC2 7 OP2 IN 12 OP2 OUT 11 LPF2 IN 10 LPF2 OUT 9 • M65850FP CLOCK 14 LPF2 D/A Oscillator REF 13 1/2 VCC NC 16 DO1 CLOCK MO NC 1 Auto reset Main control RESET 20 kbit SRAM MI D1 DO0 A/D LPF1 2 LPF1 IN 3 LPF1 OUT REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 2 of 11 4 OP1 OUT 5 OP1 IN 6 CC1 8 GND 15 VCC M65850P/FP Pin Arrangement M65850P LPF1 IN 1 M65850FP NC 1 14 VCC LPF1 IN 2 13 CLOCK LPF1 OUT 2 12 REF OP1 OUT 3 CC1 5 10 OP2 OUT CC2 6 9 LPF2 IN GND 7 8 LPF2 OUT 15 VCC LPF1 OUT 3 11 OP2 IN OP1 IN 4 16 NC 14 CLOCK OP1 OUT 4 13 REF 12 OP2 IN OP1 IN 5 CC1 6 11 OP2 OUT CC2 7 10 LPF2 IN GND 8 9 LPF2 OUT (Top view) Outline: PRDP0014AA-A (14P4) (Top view) Outline: PRSP0016DE-A (16P2N-A) Pin Description Pin No. P FP 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 Symbol Name I/O LPF1 IN LPF1 OUT OP1 OUT OP1 IN CC1 CC2 GND LPF2 OUT LPF2 IN OP2 OUT OP2 IN REF CLOCK Low pass filter 1 input Low pass filter 1 output Operational amplifier 1 output Operational amplifier 1 input Current control 1 Current control 2 GND Low pass filter 2 output Low pass filter 2 input Operational amplifier 2 output Operational amplifier 2 input Reference Clock generator input I O O I — — — O I O I — I 14 15 VCC Supply voltage — — 1, 16 NC No connection — REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 3 of 11 Function To form input-side low pass filter by connecting external capacitor and resistor To form A/D conversion integrator by connecting external capacitor ADM control of A/D converter ADM control of D/A converter To form input-side low pass filter by connecting external capacitor and resistor To form D/A conversion integrator by connecting external capacitor Analog reference voltage ≈ 1/2 VCC To form clock generator by connecting external resistor To apply 3.5 to 5.5 V power (Rated voltage: 5 V) M65850P/FP Absolute Maximum Ratings (Ta = 25°C, unless otherwise noted) Item Supply voltage Circuit current Power dissipation Operating temperature Storage temperature Symbol Ratings 6.0 100 800 (P), 550 (FP) –20 to +75 –40 to +125 Units V mA mW °C °C Conditions Min Limits Typ Max Unit Conditions 3.5 0.8 5 — 5.5 11.0 V MHz VCC ICC Pd Topr Tstg Recommended Operating Condition Item Supply voltage Clock frequency Symbol VCC fck Electrical Characteristics (VCC = 5 V, f = 1 kHz, Vi = 100 mVrms, fck = 1 MHz, Ta = 25°C, unless otherwise noted) Item Circuit current Voltage gain Maximum output voltage Total harmonic distortion Output noise voltage Clock frequency Symbol ICC GV Vomax THD No fck REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 4 of 11 Min Limits Typ Max Unit 5 –3.0 0.7 — — 0.85 13 0 1.0 1.2 –85 1 25 3.0 — 3.0 –70 1.15 mA dB Vrms % dBV MHz Test Conditions No signal input RL = 47 kΩ THD = 10% 30 kHz LPF DIN-AUDIO RC = 120 kΩ M65850P/FP Function Description 1. Delay time Td The delay time can be calculated by the equation: Td = 8N / fck (N = the number of memory bits = 20480) When fck = 1 MHz (fs = 125 kHz), Td can be set at 164 ms. <Reference> The M65850P/FP adopts ADM (Adaptive Delta Modulation) system in A/D, D/A converters. The sampling frequency can be calculated by the following equation: fs = clock frequency / 8 (Hz) For clock frequency (fck ) = 1MHz, the calculated sampling frequency is : fs= 1 MHz / 8 = 125 kHz 2. Clock oscillator circuit The M65850P incorporates a current control type clock oscillator circuit in it, thus providing circuit configuration just by connecting a resistor for current control to pin 13 (FP: pin 14) CLOCK. Fully internal clock supply prevents occurrence of undesired radiation without affecting any external circuit. The oscillator frequency is: fck = 1 MHz (RC = 120 kΩ) The resistor for current control can be calculated using the following equation. Rc ≈ K / Clock frequency (fck) [Ω] VCC RC * 13 * (FP: 14) Clock oscillator circuit Clock frequency: fck K is the coefficient, and changes according to clock frequency, as shown below. (VCC = 5 V, Ta = 25°C) Delay Time (ms) 15 to 30 31 to 100 101 to 200 Clock Frequency (Hz) 11.0 M to 5.5 M 5.3 M to 1.64 M 1.62 M to 800 k REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 5 of 11 K Value 0.8 × 1011 1.0 × 1011 1.2 × 1011 RC (Ω) 7.5 k to 15 k 18 k to 62 k 75 k to 150 k M65850P/FP 3. Input/output LPF It is necessary to change the LPF setting (signal pass band, fsig) of digital echo according to the clock frequency. (Refer to the table below) LPF1 LPF2 REF REF + – 1 + – * C2 * (FP: 2) 2 * 9 * (FP: 3) 8 * * (FP: 9) R2 R1 R1 R1 C1 ∴ fsig = C2 * (FP: 10) R2 R1 * C1 1 2π C1 • C2 • R1 • R2 (VCC = 5 V, Vi = 100mVrms, f = 1 kHz, Ta = 25°C) LPF Distortion (Reference Value) (%) Delay Time (ms) Clock Frequency (Hz) Signal Pass Band (Hz) 15 to 30 11.0 M to 5.5 M 7k R1 (Ω) 15 k R2 (Ω) 15 k C1 (F) 3300 p C2 (F) 680 p 31 to 100 5.3 M to 1.64 M 5k 13 k 13 k 4700 p 1000 p 0.3% (Td = 50 ms) 101 to 200 1.62 M to 800 k 3k 16 k 16 k 6800 p 1500 p 1.2% (Td = 160 ms) 4. Mute When power is turned on, the mute function works automatically to prevent noise generation. (Here, however, “mute” means the function which prevents noise generation after the reset time.) Power on time Reset period Mute period (about 260 ms) When power is ON (fck = 1 MHz) REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 6 of 11 Mute off time 0.2% (Td = 20 ms) M65850P/FP Test Conditions Item Circuit current Voltage gain between input and output Maximum output voltage Output distortion Output noise voltage Symbol ICC GV Vomax THD No REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 7 of 11 S1 2 1 1 1 2 S14 2 1 1 1 1 Remarks No-signal time RL = 47 kΩ THD = 10% 30 kHz LPF DIN-AUDIO M65850P/FP Test Circuit • M65850P 0.1 μ 0.068 μ 47 μ + 47 μ 6800 p 16 k 16 k 16 k 1μ 47 k + (2) S14 (1) A + 120 k OP2 OUT LPF2 IN LPF2 OUT CC1 CC2 GND OP2 IN OP1 IN 8 REF 9 OP1 OUT 10 CLOCK 11 LPF1 OUT 12 LPF1 IN 13 VCC 1500 p 14 1 2 3 4 5 6 7 1500 p 0.22 μ 0.068 μ 51 16 k + (1) S1 0.22 μ 16 k 1μ (2) Vo 16 k 6800 p Vi • M65850FP 0.1 μ 0.068 μ 47 μ + 47 μ 6800 p 16 k 16 k 16 k 1μ 47 k + (2) S15 (1) A + REF OP2 OUT LPF2 IN LPF2 OUT OP1 OUT OP1 IN CC1 CC2 GND 1 2 3 4 5 6 7 8 1500 p 0.068 μ 51 1μ (1) S2 0.22 μ Vo 0.22 μ 16 k 16 k + (2) 1500 p 10 9 CLOCK 11 LPF1 OUT 12 VCC 13 LPF1 IN 14 NC 15 NC 16 OP2 IN 120 k 6800 p 16 k Vi REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 8 of 11 Units R: Ω C: F M65850P/FP Application Example 1. Echo Delay time 164 ms (Signal pass band 3 kHz) • M65850P 0.1 μ 0.068 μ 47 μ + + 47 μ 16 k 16 k 1 μ OUT + 6800 p 16 k 120 k OP2 OUT LPF2 IN LPF2 OUT CC1 CC2 GND OP2 IN OP1 IN 1 2 3 4 5 6 7 1500 p 16 k 16 k 1μ IN 8 REF 9 OP1 OUT 10 CLOCK 11 LPF1 OUT 12 LPF1 IN 13 VCC 1500 p 14 0.22 μ 0.22 μ 0.068 μ 16 k + 0.15 μ 6800 p 50 k Feedback gain setting volume • M65850FP 0.1 μ 0.068 μ 47 μ + + 47 μ 16 k 16 k 1 μ OUT + 6800 p 16 k REF OP2 OUT LPF2 IN LPF2 OUT OP1 OUT OP1 IN CC1 CC2 GND 1 2 3 4 5 6 7 8 1500 p IN 1μ 1500 p 10 9 CLOCK 11 LPF1 OUT 12 VCC 13 LPF1 IN 14 NC 15 NC 16 OP2 IN 120 k 16 k 16 k 16 k + 6800 p 0.22 μ 0.22 μ 0.068 μ 0.15 μ 50 k Feedback gain setting volume REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 9 of 11 Units R: Ω C: F M65850P/FP 2. Surround Delay time 20 ms (Signal pass band 7 kHz) • M65850P 0.1 μ 0.047 μ 47 μ + + 47 μ 15 k 15 k 1 μ OUT + 3300 p 15 k 11 k OP2 OUT LPF2 IN LPF2 OUT CC1 CC2 GND 2 3 4 5 6 7 680 p 15 k 15 k 1μ IN 8 OP1 IN 9 REF 10 OP1 OUT 11 CLOCK 12 LPF1 OUT VCC LPF1 IN 1 13 OP2 IN 680 p 14 0.15 μ 0.15 μ 0.047 μ 15 k + 3300 p • M65850FP 0.1 μ 0.047 μ 47 μ + + 47 μ 15 k 15 k 1 μ OUT + 3300 p 15 k 11 k OP2 OUT LPF2 IN LPF2 OUT CC2 GND 3 4 5 6 7 8 680 p IN 1μ 15 k 15 k 15 k 9 CC1 10 OP1 IN 11 REF 12 OP1 OUT 2 13 CLOCK VCC LPF1 IN 1 14 LPF1 OUT NC NC 15 OP2 IN 680 p 16 0.15 μ 0.15 μ 0.047 μ + 3300 p Units R: Ω C: F REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 10 of 11 M65850P/FP Package Dimensions RENESAS Code PRDP0014AA-A Previous Code 14P4 8 1 7 c *1 E 14 MASS[Typ.] 1.0g e1 JEITA Package Code P-DIP14-6.3x19-2.54 D Reference Dimension in Millimeters Symbol e1 D E A A1 A2 bp b3 c L A1 A A2 *2 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. *3 e bp b3 SEATING PLANE e L JEITA Package Code P-SOP16-5.3x10.1-1.27 RENESAS Code PRSP0016DE-A Previous Code 16P2N-A MASS[Typ.] 0.2g E 9 *1 HE 16 Min Nom Max 7.32 7.62 7.92 18.8 19.0 19.2 6.15 6.3 6.45 4.5 0.51 3.3 0.4 0.5 0.6 1.4 1.5 1.8 0.22 0.27 0.34 0° 15° 2.29 2.54 2.79 3.0 F NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. 1 8 Index mark A2 A1 c Reference Dimension in Millimeters Symbol D L A *2 e y *3 bp Detail F D E A2 A1 A bp c HE e y L REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Page 11 of 11 Min Nom Max 10.0 10.1 10.2 5.2 5.3 5.4 1.8 0.1 0.2 0 2.1 0.35 0.4 0.5 0.18 0.2 0.25 0° 8° 7.5 7.8 8.1 1.12 1.27 1.42 0.1 0.4 0.6 0.8 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. 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