VICOR VIB0001TFJ

VIB0001TFJ
BCMTM
Bus Converter
• 352 V to 11 V V•I ChipTM Converter
• Typical efficiency 95%
• 300 Watt (450 Watt for 1 ms)
• 125°C operation
• High density – up to 1017 W/in3
• <1 µs transient response
• Small footprint – 260 W/in2
• >3.5 million hours MTBF
• Low weight – 0.5 oz (14 g)
• No output filtering required
©
• ZVS / ZCS isolated sine
amplitude converter
Product Description
Absolute Maximum Ratings
The V•I Chip Bus Converter Module is a high efficiency
(>95%), narrow input range Sine Amplitude Converter
(SAC) operating from a 330 to 365 Vdc primary bus to
deliver an isolated low voltage secondary. The off-line
BCM provides an isolated 10.3 -11.4 V distribution bus
and is ideal for use in silver boxes and PFC front ends.
Due to the fast response time and low noise of the BCM,
the need for limited life aluminum electrolytic or
tantalum capacitors at the input of POL converters is
reduced—or eliminated—resulting in savings of board
area, materials and total system cost.
The BCM achieves a power density of 1017 W/in3 in
a V•I Chip package compatible with standard pick-andplace and surface mount assembly processes. The
V•I Chip package provides flexible thermal management
through its low junction-to-case and junction-to-board
thermal resistance. Owing to its high conversion
efficiency and safe operating temperature range, the
BCM does not require a discrete heat sink in typical
applications. Low junction-to-case and junction-to-lead
thermal impedances assure low junction temperatures
and long life in the harshest environments.
vicorpower.com
Vin = 330 - 365 V
Vout = 10.3 - 11.4 V
Iout = 28.0 A
K = 1/32
Rout = 12.5 m max
Parameter
Values
Unit
-1.0 to 400
Vdc
+In to -In
500
Vdc
PC to -In
-0.3 to 7.0
Vdc
+Out to -Out
+In to -In
Notes
For 100 ms
-0.5 to 16.0
Vdc
Isolation voltage
4,242
Vdc
Output current
28
A
Continuous
42.0
A
For 1 ms
Peak output current
Input to Output
Output power
300
W
Continuous
Peak output power
450
W
For 1 ms
Case temperature
225
°C
During reflow MSL 5
Operating junction temperature(1)
-40 to 125
°C
T-Grade
Storage temperature
-40 to 125
°C
T-Grade
Note:
(1) The referenced junction is defined as the semiconductor having the highest temperature.
This temperature is monitored by a shutdown comparator.
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V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
Page 1 of 11
Specifications
V•I Chip Bus Converter Module
Input (Conditions are at 352 Vin, full load, and 25°C ambient unless otherwise specified)
Parameter
Min
Typ
Max
Unit
Input voltage range
Input dV/dt
Input undervoltage turn-on
Input undervoltage turn-off
Input overvoltage turn-on
330
352
365
1
329
Vdc
V/µs
Vdc
Vdc
Vdc
399
Vdc
mA
A
Adc
mA p-p
W
µF
nH
µF
275
366
Input overvoltage turn-off
Input quiescent current
Inrush current overshoot
Input current
Input reflected ripple current
No load power dissipation
Internal input capacitance
Internal input inductance
Recommended external input capacitance
0.9
0.225
1.0
640
6.4
0.3
5
2
7.7
Note
PC low
Using test circuit in Figure 18; See Figure 1
Using test circuit in Figure 18; See Figure 4
200 nH maximum source inductance; See Figure 18
Input Waveforms
Figure 1 — Inrush transient current at full load and 352 Vin with PC
enabled
Figure 2 — Output voltage turn-on waveform with PC enabled at full load
and 352 Vin
Figure 3 — Output voltage turn-on waveform with input turn-on at full
load and 352 Vin
Figure 4 — Input reflected ripple current at full load and 352 Vin
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V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
Page 2 of 11
Specifications
(continued)
V•I Chip Bus Converter Module
Output (Conditions are at 352 Vin, full load, and 25°C ambient unless otherwise specified)
Parameter
Min
Typ
10.3
9.97
0
0
Output voltage
Output power
Rated DC current
Peak repetitive power
Current share accuracy
Efficiency
Half load
Full load
Internal output inductance
Internal output capacitance
Load capacitance
Output overvoltage setpoint
Output ripple voltage
No external bypass
5
94.0
94.5
Max
Unit
Note
11.4
11.1
300
28
Vdc
Vdc
W
Adc
450
W
No load
Full load
354 - 365 VIN
POUT≤300 W
Max pulse width 1ms, max duty cycle 10%,
10
%
94.8
95.5
1.1
37
1,200
11.4
270
10 µF bypass capacitor
Short circuit protection set point
Average short circuit current
Effective switching frequency
Line regulation
K
Load regulation
ROUT
Transient response
Voltage overshoot
Response time
Recovery time
Output overshoot
Input turn-on
PC enable
Output turn-on delay
From application of power
From release of PC pin
baseline power 50%
See Parallel Operation on Page 10
%
%
nH
µF
µF
Vdc
See Figure 5
See Figure 5
Effective value
400
mV p-p
See Figures 7 and 9
mV p-p
Adc
mA
MHz
See Figure 8
Module will shut down
10.2
45.0
3.7
13.7
3.9
4.1
0.0309
1/32
0.0316
9.8
12.5
Fixed, 2.0 MHz per phase
VOUT = K•VIN at no load
mΩ
72
200
1
mV
ns
µs
100% load step; See Figures 10 and 11
See Figures 10 and 11
See Figures 10 and 11
0
0
mV
mV
No output filter; See Figure 3
No output filter; See Figure 2
428
37
ms
µs
No output filter; See Figure 3
No output filter
Output Waveforms
Efficiency vs. Output Power
Power Dissipation
96
16
Power Dissipation (W)
Efficiency (%)
94
92
90
88
86
84
82
14
12
10
8
6
4
0
30
60
90
120
150
180
210
240
270
300
30
60
90
120
150
180
210
240
270
300
Output Power (W)
Output Power (W)
Figure 6 — Power dissipation as a function of output power
Figure 5 — Efficiency vs. output power at 352 Vin
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V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
Page 3 of 11
Specifications
(continued)
V•I Chip Bus Converter Module
Figure 7 — Output voltage ripple at full load and 352 Vin without any
external bypass capacitor.
Figure 8 — Output voltage ripple at full load and 352 Vin with 10 µF
ceramic external bypass capacitor and 20 nH of distribution inductance.
Ripple vs. Output Power
Output Ripple (mVpk-pk)
300
275
250
225
200
175
150
0
30
60
90
120 150 180 210
240 270 300
Output Power (W)
Figure 9 — Output voltage ripple vs. output power at 352 Vin without any
external bypass capacitor.
Figure 10 — 0 -28.0 A load step with 2 µF input capacitor and no
output capacitor.
Figure 11 — 28.0- 0 A load step with 2 µF input capacitor and no output
capacitor.
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V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
Page 4 of 11
Specifications
(continued)
V•I Chip Bus Converter Module
General
Parameter
Min
MTBF
MIL-HDBK-217F
Isolation specifications
Voltage
Capacitance
Resistance
Typ
Max
Unit
Note
3.5
Mhrs
25°C, GB
500
Vdc
pF
MΩ
Input to Output
Input to Output
Input to Output
UL /CSA 60950-1, EN 60950-1
Low Voltage Directive
4,242
10
cTÜVus
CE Mark
RoHS
Agency approvals
Mechanical
Weight
Dimensions
Length
Width
Height
Thermal
Over temperature shutdown
Thermal capacity
Junction-to-case thermal impedance (RθJC)
Junction-to-board thermal impedance (RθJB)
See Mechanical Drawings, Figures 15 & 16
0.53/15
oz /g
1.28 / 32,5
0.87 / 22
0.265 / 6,73
in / mm
in / mm
in / mm
125
130
9.3
1.1
2.1
135
°C
Ws /°C
°C/ W
°C/ W
Junction temperature
Auxiliary Pins (Conditions are at 48 Vin, full load, and 25°C ambient unless otherwise specified)
Parameter
Min
Typ
Max
Unit
Primary control (PC)
DC voltage
Module disable voltage
Module enable voltage
4.8
2.4
5.0
2.5
2.5
5.2
Vdc
Vdc
Vdc
2.4
2.5
37
16
Current limit
Enable delay time
Disable delay time
Figure 12 — VOUT at full load vs. PC disable
vicorpower.com
2.6
2.9
mA
µs
µs
Note
Source only
See Figure 12, time from PC low to output low
Figure 13 — PC signal during over current fault
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V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
Page 5 of 11
Pin / Control Functions
V•I Chip Bus Converter Module
+In / -In – DC Voltage Input Ports
The V•I Chip input voltage range should not be exceeded. An internal
under / over voltage lockout-function prevents operation outside of the
normal operating input range. The BCM turns on within an input voltage
window bounded by the “Input under-voltage turn-on” and “Input overvoltage turn-off” levels, as specified. The V•I Chip may be protected
against accidental application of a reverse input voltage by the addition
of a rectifier in series with the positive input, or a reverse rectifier in
shunt with the positive input located on the load side of the input fuse.
The connection of the V•I Chip to its power source should be
implemented with minimal distribution inductance. If the interconnect
inductance exceeds 100 nH, the input should be bypassed with a RC
damper to retain low source impedance and stable operation. With an
interconnect inductance of 200 nH, the RC damper may be 2 µF in series
with 0.3Ω. A single electrolytic or equivalent low-Q capacitor may be
used in place of the series RC bypass.
4
3
2
+Out
B
B
C
C
D
D
+In
E
E
-Out
1
A
A
F
G
H
TM
H
J
RSV
J
K
PC
K
+Out
-Out
L
L
M
M
N
N
P
P
R
R
T
T
PC – Primary Control
-In
Bottom View
The Primary Control port is a multifunction node that provides the
following functions:
Enable / Disable – If the PC port is left floating, the BCM output is
enabled. Once this port is pulled lower than 2.4 Vdc with respect to
–In, the output is disabled. This action can be realized by employing
a relay, opto-coupler, or open collector transistor. Refer to Figures 13, 12 and 13 for the typical enable / disable characteristics. This port
should not be toggled at a rate higher than 1 Hz. The PC port should
also not be driven by or pulled up to an external voltage source.
Primary Auxiliary Supply – The PC port can source up to 2.4 mA at
5.0 Vdc. The PC port should never be used to sink current.
Alarm – The BCM contains circuitry that monitors output overload,
input over voltage or under voltage, and internal junction temperatures.
The PC port will toggle in response to an over current or over
temperature fault and will remain low in response to an input
undervoltage / overvoltage fault.
Signal
Name
+In
–In
TM
RSV
PC
+Out
–Out
Designation
A1-E1, A2-E2
L1-T1, L2-T2
H1, H2
J1, J2
K1, K2
A3-D3, A4-D4,
J3-M3, J4-M4
E3-H3, E4-H4,
N3-T3, N4-T4
Figure 14 — BCM pin configuration
TM and RSV – Reserved for factory use.
+Out / -Out – DC Voltage Output Ports
Two sets of contacts are provided for the +Out port. They must be
connected in parallel with low interconnect resistance. Similarly, two sets
of contacts are provided for the –Out port. They must be connected in
parallel with low interconnect resistance. Within the specified operating
range, the average output voltage is defined by the Level 1 DC behavioral
model of Figure 19. The current source capability of the BCM is rated in
the specifications section of this document.
The low output impedance of the BCM reduces or eliminates the need
for limited life aluminum electrolytic or tantalum capacitors at the input
of POL converters.
Total load capacitance at the output of the BCM should not exceed the
specified maximum. Owing to the wide bandwidth and low output
impedance of the BCM, low frequency bypass capacitance and
significant energy storage may be more densely and efficiently provided
by adding capacitance at the input of the BCM.
vicorpower.com
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V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
Page 6 of 11
Mechanical Drawings
V•I Chip Bus Converter Module
BOTTOM VIEW
TOP VIEW ( COMPONENT SIDE )
NOTES:
mm
1. DIMENSIONS ARE inch .
2. UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
Figure 15 — BCM J-Lead mechanical outline; Onboard mounting
RECOMMENDED LAND PATTERN
( COMPONENT SIDE SH OWN )
NOTES:
mm
1. DIMENSIONS ARE inch .
2. UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
Figure 16 — BCM PCB land layout information
vicorpower.com
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V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
Page 7 of 11
Configuration Options
V•I Chip Bus Converter Module
2.95±0.07
ø
(2) PL
[0.116±0.003]
NON-PLATED
THROUGH HOLE
SEE NOTE 1.
NOTES:
1. MAINTAIN 3.5/[0.138] DIA. KEEP OUT ZONE FREE OF
COPPER. ALL PCB LAYERS.
2. MINIMUM RECOMMENDED PITCH IS 39.50/[1.555].
THIS PROVIDES 7.00/[0.276] COMPONENT EDGE-TO-EDGE SPACING.
AND 0.50/[0.020] CLEARANCE BETWEEN VICOR HEAT SINKS.
(4.37)
0.172
(11.37)
0.448
3. V•I CHIP LAND PATTERN SHOWN FOR REFERENCE ONLY;
ACTUAL LAND PATTERN MAY DIFFER.
DIMENSIONS FROM EDGES OF LAND PATTERN TO PUSH-PIN
HOLES WILL BE THE SAME FOR ALL FULL SIZE V•I CHIPS.
(mm)
4. DIMENSION ARE inch .
(36.50)
1.437
(18.25)
0.719
DOTTED LINE
INDICATES VIC
POSITION
SEE NOTE 3
(7.00)
0.276
(31.48)
1.240
(2.510)
0.099
(39.50)
1.555
SEE NOTE 2.
HEAT SINK PUSH-PIN HOLE PATTERN
( TOP SIDE SHOWN )
SEE NOTE 3
Figure 17 — Hole location for push pin heat sink relative to V•I Chip
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V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
Page 8 of 11
Behavioral & Test Circuits
V•I Chip Bus Converter Module
Input reflected ripple
measurement point
F1
1.5 A
Fuse
+Out
+In
+
Enable/Disable Switch
-Out
C1
2 µF
TM
RSV
PC
R2
2 kΩ
electrolytic
SW1
D1
-In
K
Ro
Source inductance should be no more than 200 nH. If source inductance is
greater than 200 nH, additional bypass capacitance may be required.
R3
5 mΩ
BCM
Notes:
Load
C3
10 µF
+Out
R3 may be ESR of C3 or a separate damping resistor.
–
-Out
C3 should be placed close to the load.
D1 power good indicator will dim when a module fault is detected.
Figure 18 — BCM test circuit
V•I Chip Bus Converter Level 1 DC Behavioral Model for 352 V to 11 V, 300 W
ROUT
IOUT
+
+
9.8 m
1/32 • Iout
VIN
+
+
–
IQ
#DIV/0!
1/32 • Vin
V•I
VOUT
–
K
–
–
©
Figure 19 — This model characterizes the DC operation of the V•I Chip bus converter, including the converter transfer function and its losses. The model enables
estimates or simulations of output voltage as a function of input voltage and output load, as well as total converter power dissipation or heat generation.
V•I Chip Bus Converter Level 2 Transient Behavioral Model for 352 V to 11 V, 300 W
0.22 nH
ROUT
IOUT
L IN = 5 nH
+
9.8 mΩ
RCIN
32 mΩ
CIN
VIN
Lout = 1.1 nH
V• I
1/32 • Iout
+
+
–
0.3µF
IQ
#DIV/0! mA
RCOUT
1.1 mΩ
+
0.2 mΩ
1/32 • Vin
COUT
37 µF
VOUT
–
K
–
–
©
Figure 20 — This model characterizes the AC operation of the V•I Chip bus converter including response to output load or input voltage transients or steady state
modulations. The model enables estimates or simulations of input and output voltages under transient conditions, including response to a stepped load with or
without external filtering elements.
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V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
Page 9 of 11
BCM Applications
V•I Chip Bus Converter Module
Parallel Operation
Application Notes
The BCM will inherently current share when operated in an array. Arrays
may be used for higher power or redundancy in an application.
For BCM and V•I Chip application notes on soldering, thermal
management, board layout, and system design click on the link below:
Current sharing accuracy is maximized when the source and load
impedance presented to each BCM within an array are equal. The
recommended method to achieve matched impedances is to dedicate
common copper planes within the PCB to deliver and return the current
to the array, rather than rely upon traces of varying lengths. In typical
applications the current being delivered to the load is larger than that
sourced from the input, allowing traces to be utilized on the input side if
necessary. The use of dedicated power planes is, however, preferable.
http://www.vicorpower.com/technical_library/application_information/chips/
The BCM power train and control architecture allow bi-directional power
transfer, including reverse power processing from the BCM output to its
input. Reverse power transfer is enabled if the BCM input is within its
operating range and the BCM is otherwise enabled. The BCM’s ability to
process power in reverse improves the BCM transient response to an
output load dump.
Input Impedance Recommendations
To take full advantage of the BCM capabilities, the impedance presented
to its input terminals must be low from DC to approximately 5 MHz. The
source should exhibit low inductance (less than 100 nH) and should have
a critically damped response. If the interconnect inductance exceeds 100
nH, the BCM input pins should be bypassed with an RC damper (e.g., 2
µF in series with 0.3 ohm) to retain low source impedance and stable
operations. Given the wide bandwidth of the BCM, the source response
is generally the limiting factor in the overall system response.
Anomalies in the response of the source will appear at the output of the
BCM multiplied by its K factor. The DC resistance of the source should be
kept as low as possible to minimize voltage deviations. This is especially
important if the BCM is operated near low or high line as the over/under
voltage detection circuitry could be activated.
Input Fuse Recommendations
V•I Chips are not internally fused in order to provide flexibility in
configuring power systems. However, input line fusing of V•I Chips must
always be incorporated within the power system. A fast acting fuse
should be placed in series with the +In port.
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800-735-6200
V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
Page 10 of 11
Warranty
Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in
normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper
application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended
to the original purchaser only.
EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING,
BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
Vicor will repair or replace defective products in accordance with its own best judgement. For service under this
warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping
instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges
incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within
the terms of this warranty.
Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is
assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve
reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or
circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not
recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten
life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes
all risks of such use and indemnifies Vicor against all damages.
Vicor’s comprehensive line of power solutions includes high density AC-DC
and DC-DC modules and accessory components, fully configurable AC-DC
and DC-DC power supplies, and complete custom power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for
its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or
malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are
available upon request.
Specifications are subject to change without notice.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent
applications) relating to the products described in this data sheet. Interested parties should contact Vicor's
Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,166,898;
7,187,263; 7,361,844; D496,906; D505,114; D506,438; D509,472 and for use under 6,975,098 and 6,984,965
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
email
Customer Service: [email protected]
Technical Support: [email protected]
vicorpower.com
800-735-6200
V•I Chip Bus Converter Module
VIB0001TFJ
Rev. 1.2
9/08