PJSMF05LC 5-TVS/ZENER ARRAY FOR ESD AND LATCH-UP PROTECTION PRELIMINARY This 5-TVS/Zener Array has been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5Vdc and below. This TVS array offers an integrated solution to protect up to 5 data lines where the board space is a premium. SPECIFICATION FEATURES 100W Power Dissipation (8/20µs Waveform) Low Leakage Current, Maximum of 0.5µA @ 5Vdc 1 Very Low Clamping Voltage, Max of 10V @ 9Apk 8/20µs IEC61000-4-2 ESD 20kV air, 15kV Contact Compliance Max off state Capacitance of 90pF @ 0Vdc 1 MHz 6 5 4 1 2 3 -Industry Standard Surface Mount Package SOT363 (SC70-6L) APPLICATIONS Personal Digital Assistant (PDA) SIM Card Port Protection (Mobile Phone) SOT363 Portable Instrumentation Mobile Phones and Accessories Memory Card Port Protection MAXIMUM RATINGS (Per Device) Symbol Value Units Peak Pulse Power (8/20µs Waveform) P pp 100 W Peak Pulse Current (8/20µs Waveform) I pp 10 A V ESD >25 kV Operating Temperature Range TJ -55 to +150 °C Storage Temperature Range Tstg -55 to + 150 °C Rating ESD Voltage (HBM) ELECTRICAL CHARACTERISTICS (Per Device) Tj = 25°C Parameter Reverse Stand-Off Voltage Conditions Symbol Min VWRM Typical Max Units 5 V 7.2 V Reverse Breakdown Voltage VBR Reverse Leakage Current IR VR = 5V 0.5 µA Clamping Voltage (8/20µs) Vcl I pp = 5A 9 V Clamping Voltage (8/20µs) Vcl I pp = 9A 10 V Off State Junction Capacitance Cj 0 Vdc Bias f = 1MHz Between I/O pins and pin 2 90 pF Off State Junction Capacitance Cj 5 Vdc Bias f = 1MHz Between I/O pins and pin 2 45 pF 2/13/2004 I BR = 1 mA Page 1 6 www.panjit.com PJSMF05LC TYPICAL CHARACTERISTICS 25°C unless otherwise noted Pulse Waveform Percent of Ipp Peak Pulse Power - Ppp (W) 100 10 1 10 100 1000 110 100 90 80 70 60 50 40 30 20 10 0 50% of Ipp @ 20µs Rise time 10-90% - 8µs 0 5 10 Pulse Duration, µsec 15 20 25 30 time, µsec Capacitance vs. Biasing Voltage @1MHz Clamping Voltage vs Ipp 8x20µsec Surge 100 10 9 8 7 6 5 4 3 2 1 0 90 Capacitance, pF Ipp, Amps 80 70 60 50 40 30 6 7 8 9 10 11 0 1 Clamping Voltage, V 2 3 4 5 Bias Voltage, Vdc Typical Leakage Current vs Temperature 0.1000 0.0100 5V Current, µA PRELIMINARY Non-Repetitive Peak Pulse Power vs Pulse Time 1000 0.0010 3V 0.0001 25 50 75 100 125 150 Temp,°C 2/13/2004 Page 2 www.panjit.com PJSMF05LC TYPICAL APPLICATION EXAMPLE I/O1 I/O2 PRELIMINARY I/O3 I/O4 I/O5 Ground (Pin 2) PACKAGE LAYOUT DIMENSIONS 2/13/2004 Page 3 www.panjit.com