SiP5668 New Product Vishay Siliconix 14-Line SCSI Bus Terminators D Pin Compatible with UCC5628 D Lead (Pb)-Free SQFP-48 Package FEATURES D Auto Selection of S/E or LVD SCSI Termination D 2.7-V to 5.25-V TERMPWR Range D Meets SCSI-1, SCSI-2, SPI-2 (ULTRA-2), SPI-3 (ULTRA-160) and SPI-4 (ULTRA-320) Standards D Integrated SPI-3 Mode Change Delay Filter D Bus Mode Status Pins D Differential Failsafe Bias D Thermal Package D On-Chip Thermal Shutdown Circuit D Active Negation D Hot Swap Compatible APPLICATIONS D D D D D D D Disk Array (RAID) Storage Area Networks (SAN) Network Attached Storage (NAS) SCSI Cable Server and Workstation Industrial Computers High-End Personal Computers DESCRIPTION The SiP5668 provides active bus termination suitable for all SCSI bus operational modes from SCSI-1 through SPI-4 (Ultra 320). The termination includes impedance matching of the SCSI bus to minimize signal reflections from the end of the bus, as well as required SCSI bus biasing for either S/E (single ended) or LVD (low voltage differential) operation. signal, parity signal or control signal. Two SiP5668 ICs provide complete termination for a wide SCSI bus. The SiP5668 senses the operational state of the SCSI bus via the DIFFSENS bus signal, and automatically switches to S/E or LVD operation as required. It cannot be used on an HPD (high power differential) SCSI bus, and goes into high impedance mode when the voltage on the DIFFSENS line indicates HPD operation. The SiP5668 also presents high impedance to the SCSI bus if the DISABLE pin is asserted, or if TERMPWR is removed from the IC. An integrated mode change delay filter in the SIP5668 eliminates the need for a bulky 4.7-mF low pass filter capacitor to be compliant with SPI-3 mode change timing requirements. The SiP5668 has fourteen (14) output channels (T1−T14). Each output channel provides termination for one SCSI data The SiP5668 is available in a lead (Pb)-free SQFP-48 package for operation over the temperature range of 0 to 70 _C. FUNCTIONAL BLOCK DIAGRAM MODE LVD S/E TERMPWR 27 26 3 35 DIFFS 2 T1N 1 T1P 48 T14N 47 T14P Comparators and Delay Filter 34 V t 0.5 = S/E 0.7 t V t1.9 = LVD V u 2.4 = HPD Current Limited Source/Sink Regulator SCSI Terminator Impedance Circuits 10 mA DISABLE Current Limited Source/Sink Regulator 1.3 V Mode Control And Enable/Disable Circuitry 36 25 4 GND Document Number: 73099 S-41843—Rev. A, 11-Oct-04 9 28 Heat Sink GND Pins 33 10 REG See Functional Diagrams (Page 6) for detailed descriptions of SCSI Terminator Impedance Circuits in LVD and S/E modes of operation. www.vishay.com 1 SiP5668 New Product Vishay Siliconix TYPICAL APPLICATION DIAGRAM SCSI BUS TERMPWR SiP5668 SiP5668 T1N TERMPWR T1N T1P T1P DDD DDD DISABLE Group 1 Signals T14N T14P DIFFSENS DIFFS REG 20 kW GND DISABLE T14N T14P 4.7 mF TERMPWR DIFFS REG 20 kW MODE MODE 0.1 mF 0.1 mF 4.7 mF 4.7 mF SiP5668 TERMPWR SiP5668 T1N T1N T1P T1P REG GND Group 2 Signals T13N T13N T13P T13P DIFFS DIFFS MODE TERMPWR DDD DDD DISABLE 4.7 mF 4.7 mF GND MODE DISABLE REG GND 4.7 mF GROUND Group 1 Signals: DB(0), DB(1), DB(2), DB(3), DB(4), DB(5), DB(6), DB(7), DB(P), DB(12), DB(13), DB(14), DB(15), DB(P1) Group 2 Signals: ATN, BSY, ACK, RST, MSG, SEL, C/D, REQ, I/O, DB(8), DB(9), DB(10), DB(11) www.vishay.com 2 Document Number: 73099 S-41843—Rev. A, 11-Oct-04 SiP5668 New Product Vishay Siliconix ABSOLUTE MAXIMUM RATINGS (ALL VOLTAGES REFERENCED TO GND = 0 V) TERMPWR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V TXN, TXP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to 6 V MODE, DISABLE, M/S, STATUS . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to 6 V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 125 _C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 _C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE (ALL VOLTAGES REFERENCED TO GND = 0 V) TERMPWR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7 V to 5.25 V Operating Temperature Range (TA)) . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70 _C SPECIFICATIONS Test Conditions Unless Specified Parameter TERMPWR = 2.7 to 5.25 V, DISABLE = 0 V TA = TJ = 0 to 70 _C Limits Mina Typb ZDIFF 100 105 110 ZCM 120 140 160 Symbol Maxa Unit SCSI Channels (T1 to T14), LVD Operation Differential Impedance Common Mode Impedance Differential Failsafe Bias VDIFF Common Mode Bias VCM MODE = 1.3 13V W 100 112 125 mV 1.15 1.25 1.35 V 100 108 116 W 2.5 2.7 3.0 V Channel Voltage = 0.2 V −25.4 −23 −20.5 Channel Voltage = 0.5 V −22.4 30 60 W 0 500 nA SCSI Channels (T1 to T14), S/E Operation Impedance ZS/E Bias Voltage VS/E Output Current IS/E GND Driver Impedance ZGS MODE = 0 V MODE = 0 V MODE = 0 V, ITEST = 10 mA mA SCSI Channels (T1 to T14), Termination Disabled Channel Leakagec IL Channel Voltage = 0 to 5 V Channel Capacitancec, d CT Referenced to GND Output Voltage VREG(LVD) 0.5 V v VCM v 2.0 Ve 1.15 1.25 1.35 Source Current ISO(LVD) VREG = 0 V −1000 −600 −400 Sink Current ISI(LVD) VREG = 4 V 200 400 700 Output Voltage VDIFFS −5 mA v IDIFFS v 50 mA 1.2 1.3 1.4 V Source Current ISO(DIFFS) VDIFFS = 0 V −15 −8 −5 mA Sink Current ISI(DIFFS) VDIFFS = 2.75 V 50 100 200 mA Output Voltage VREG(S/E) 0.2 V v VCM v 4.0 Vf 2.5 2.7 3.0 V Source Current ISO(S/E) VREG = 0 V −1000 −600 −400 Sink Current ISI(S/E) VREG = 4 V 200 400 700 0.8 1.0 1.2 0 V v VDISABLE v 1.2 V −30 −10 −3 VDISABLE u 1.2 V −30 0 10 −500 3 pF SCSI Regulator, LVD Mode V mA DIFFSENS Regulator SCSI Regulator, S/E Mode mA DISABLE Input Input Threshold Input Current VTH(DIS) IIN(DIS) V mA MODE Input Document Number: 73099 S-41843—Rev. A, 11-Oct-04 www.vishay.com 3 SiP5668 New Product Vishay Siliconix SPECIFICATIONS Test Conditions Unless Specified Parameter Symbol TERMPWR = 2.7 to 5.25 V, DISABLE = 0 V TA = TJ = 0 to 70 _C Limits Mina Typb Maxa Unit MODE Input S/E to LVD Threshold VTH(S/E) 0.5 0.6 0.7 LVD to HPD Threshold VTH(HPD) 1.9 2.1 2.4 Input Current IIN(MODE) Mode Change Delay 0 Vv VMODE v 5.25 V tDEL V −1 0 1 mA 100 200 400 ms −10 −5 STATUS Output Pins (LVD, S/E) Source Current ISO(STAT) TERMPWR = 2.7 V, VPIN = 2.4 V Sink Current ISI(STAT) VPIN = 0.4 V Shutdown Temperatured TOFF Rising Temperature Hysteresis d THYS 3 6 mA THERMAL Shutdown 160 _C 10 TERMPWR Supply LVD Mode IDD(LVD) MODE = 1.3 V, Channels Unloaded 25 35 S/E Mode IDD(S/E) MODE = 0 V, Channels Unloaded 10 20 HPD Mode IDD(HPD) MODE = 3 V 10 20 Disabled Mode IDD(DIS) DISABLE = 3 V 500 1000 mA mA Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum is used in this data sheet. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. MODE = 3 V and/or DISABLE = 3 V and/or TERMPWR = 0 V. d. Guaranteed by design, not subject to production test. e. VCM applied simultaneously to Line PLUS and Line MINUS pins of all SCSI channels T1-T14. f. VCM applied simultaneously to Line MINUS pins of all SCSI channels T1-T14. www.vishay.com 4 Document Number: 73099 S-41843—Rev. A, 11-Oct-04 SiP5668 New Product Vishay Siliconix T1N TERMPWR H/S GND H/S GND H/S GND H/S GND H/S GND H/S GND REG T1P T14N T14P T13N T13P T12N T12P T11N T11P T10N T10P T9N T9P DISABLE GND T8N DIFFS T8P MODE T7N H/S GND T7P H/S GND T6N H/S GND T6P H/S GND T5N H/S GND T5P H/S GND T4N LVD T4P 12 11 10 9 8 7 6 5 4 3 2 1 48 13 47 14 46 15 45 16 44 17 43 18 SiP5668 (SQFP-48) 42 19 Top View 41 20 40 21 39 22 38 23 37 24 25 26 27 28 29 30 31 32 33 34 35 36 S/E T3P T3N T2P T2N PIN CONFIGURATION AND ORDERING INFORMATION ORDERING INFORMATION Part Number Temperature Range Marking SiP5668CS-TR—E3 0 to 70_C SiP5668CS PIN DESCRIPTION Pin Name Function 1, 11, 13, 15, 17, 19, 21, 23, 25, 37, 39, 41, 43, 45, 47 TXP; X = 1...14 Positive terminator channel pins. Provide positive signal line termination in LVD operation, and are connected to GND through low impedance in S/E operation. In HPD, DISABLE, or power off condition these pins present high impedance to the SCSI bus. 2, 12, 14, 16, 18, 20, 22, 24,26, 38, 40, 42, 44, 46, 48 TXN; X = 1...14 Negative terminator channel pins. Provide negative signal line termination in LVD operation, and line termination for S/E operation. In HPD, DISABLE, or power off condition these pins present high impedance to the SCSI bus. 3 TERMPWR Power for the terminator IC. Connect to the TERMPWR lines on the SCSI bus and decouple with a 4.7-mF capacitor to GND at the IC. 4, 5, 6, 7, 8, 9, 28, 29, 30, 31, 32, 33 H/S GND Heat sink ground. Should be connected to as large a grounded heat sink area on the PC board as is practical. 10 REG SCSI regulator output. Connect a 4.7-mF bypass capacitor from this pin to GND. 25 GND Electrical ground connection for the terminator IC. Connect to the ground lines of the SCSI Bus 26, 27 S/E, LVD Status output pins. Respective pins are high when the terminator detects the corresponding mode of operation on the SCSI bus, and low otherwise. 34 MODE SCSI MODE select pin. Connect to the DIFFSENS line of the SCSI bus to sense the present mode of operation on the bus. An internal time delay filter is provided but it is recommended to decouple MODE from the DIFFSENS signal with a 20-kW/0.1-mF anti-aliasing filter for reliable operation in noisy environments. 35 DIFFS DIFFSENS regulator output. Connect to the DIFFSENS line of the SCSI bus to bias the mode selection function. 36 DISABLE Document Number: 73099 S-41843—Rev. A, 11-Oct-04 Chip disable. There is a small (nominal 10 mA) pull up current on this pin. Pull this pin to GND to enable bus termination. When this pin is left floating or pulled high all SCSI channel pins present high impedance to the SCSI bus, and the SCSI regulator and DIFFSENS regulator are both disabled. www.vishay.com 5 SiP5668 New Product Vishay Siliconix FUNCTIONAL BLOCK DIAGRAMLVD OPERATION LVD S/E 27 26 Current Limited Source/Sink Regulator 1.3 V 35 DIFFS 2 T1N 1 T1P 48 T14N 47 T14P 35 DIFFS 2 T1N 1 T1P 48 T14N 47 T14P Comparators MODE 34 V t 0.5 = S/E 0.7 t V t1.9 = LVD V u 2.4 = HPD Current Limited Source/Sink Regulator 52.5 W 115 W 52.5 W 1.25 V 1.07 mA 10 mA DISABLE Mode Control And Enable/Disable Circuitry 36 1.07 mA 52.5 W 1.07 mA 115 W 52.5 W 1.07 mA 10 REG FUNCTIONAL BLOCK DIAGRAMS/E OPERATION LVD S/E 34 33 Current Limited Source/Sink Regulator 1.3 V Comparators MODE 34 V t 0.5 = S/E 0.7 t V t1.9 = LVD V u 2.4 = HPD Current Limited Source/Sink Regulator 108 W 2.7 V 30 W 10 mA DISABLE 36 108 W Mode Control And Enable/Disable Circuitry 30 W 10 REG www.vishay.com 6 Document Number: 73099 S-41843—Rev. A, 11-Oct-04 SiP5668 New Product Vishay Siliconix LVD WAVEFORMS 160 Mbyte/sec data transfer. Top panel DB10 T- and T+ signals. Bottom panel DB9 T− and T+ signals. All bits except DB9 toggling at maximum data rate. TEMPWR = 2.70 V 0.1 V/div 0.1 V/div TEMPWR = 5.25 V 5 ns/div 5 ns/div S/E WAVEFORMS 40 Mbyte/sec data transfer. Top panel DB10 T- signals. Bottom panel DB9 T− signals. 50 ns/div Document Number: 73099 S-41843—Rev. A, 11-Oct-04 TEMPWR = 2.70 V 0.5 V/div 0.5 V/div TEMPWR = 5.25 V 50 ns/div www.vishay.com 7 SiP5668 New Product Vishay Siliconix LVD TYPICAL CHARACTERISTICS Differential Impedance vs. TERMPWR 0_C 25_C 70_C Differential Impedance (W) 108 TERMPWR 5.25 V 3.5 V 2.7 V 108 106 104 102 100 2.5 Differential Impedance vs. Temperature 110 Differential Impedance (W) 110 106 104 102 100 3.0 3.5 4.0 4.5 5.0 5.5 0 10 20 30 40 50 60 70 Temperature (_C) Differential Fail-Safe Bias vs. TERMPWR Differential Fail-Safe Bias vs. Temperature 125 125 0_C 25_C 70_C 115 110 105 100 2.5 TERMPWR 5.25 V 3.5 V 2.7 V 120 Differential Bias (mV) Differential Bias (mV) 120 115 110 105 100 3.0 3.5 4.0 4.5 5.0 5.5 0 10 20 TERMPWR (V) Common Mode Bias vs. TERMPWR 1.29 Common Mode Bias (V) 1.25 1.24 1.23 1.27 1.26 1.25 TERMPWR 5.25 V 3.5 V 2.7 V 1.24 1.23 1.22 1.22 1.21 1.21 1.20 3.0 3.5 4.0 4.5 TERMPWR (V) 8 70 1.28 1.26 www.vishay.com 60 1.29 1.27 1.20 2.5 50 Common Mode Bias vs. Temperature 1.30 0_C 25_C 70_C 1.28 40 Temperature (_C) Common Mode Bias (V) 1.30 30 5.0 5.5 0 10 20 30 40 50 60 70 Temperature (_C) Document Number: 73099 S-41843—Rev. A, 11-Oct-04 SiP5668 New Product Vishay Siliconix SE TYPICAL CHARACTERISTICS Impedance vs. TERMPWR 116 0_C 25_C 70_C 114 112 110 108 106 110 108 106 104 104 102 102 100 2.5 TERMPWR 5.25 V 3.5 V 2.7 V 114 Impedance (W) Impedance (W) 112 Impedance vs. Temperature 116 100 3.0 3.5 4.0 4.5 5.0 5.5 0 10 20 TERMPWR (V) Output Current @ 0.2 V vs. TERMPWR 0_C 25_C 70_C −21.9 −21.9 −22.4 Current (mA) Current (mA) 60 70 TERMPWR 5.25 V 3.5 V 2.7 V −21.4 −22.4 −22.9 −23.4 −23.9 −22.9 −23.4 −23.9 −24.4 −24.4 −24.9 −24.9 −25.4 3.0 3.5 4.0 4.5 5.0 5.5 0 10 20 TERMPWR (V) 40 50 60 70 60 70 Bias vs. Temperature 3.0 0_C 25_C 70_C 2.9 30 Temperature (_C) Bias vs. TERMPWR 3.0 TERMPWR 5.25 V 3.5 V 2.7 V 2.9 2.8 Bias (V) Bias (V) 50 −20.9 −21.4 2.7 2.6 2.5 2.5 40 Output Current @ 0.2 V vs. Temperature −20.9 −25.4 2.5 30 Temperature (_C) 2.8 2.7 2.6 2.5 3.0 3.5 4.0 4.5 TERMPWR (V) Document Number: 73099 S-41843—Rev. A, 11-Oct-04 5.0 5.5 0 10 20 30 40 50 Temperature (_C) www.vishay.com 9 SiP5668 Vishay Siliconix New Product DETAILED OPERATION The SiP5668 is a multimode active terminator IC, which detects the operating mode of the SCSI bus, and switches to the appropriate termination configuration accordingly. Two SiP5668 terminators are required at each end of a wide SCSI bus to terminate 27 lines (18 data, 9 control). In LVD mode the SiP5668 provides 105-Ω differential impedance and 112-mV differential bias between each TN/TP pair of terminator lines. In S/E mode the SiP5668 provides 108-Ω impedance and 2.7-V pull-up on each TxN pin, and low impedance to ground on each TxP pin. In HPD mode the SiP5668 disconnects from the bus and presents high impedance to all TN/TP lines. Each SiP5668 IC has a 1.3-V DIFFSENS regulator output that can be used to drive the DIFFSENS line of a SCSI bus. The DIFFSENS regulator attempts to drive the DIFFSENS control signal to 1.3 V, but is current limited so that S/E or HPD devices on the SCSI bus can override the DIFFSENS regulator and put the bus into S/E or HPD mode of operation. The MODE pin senses the operational state of the SCSI bus by detecting the voltage on the DIFFSENS control line. There is an integrated 200-ms glitch filter on the MODE imput for reliable operation in noisy environments. On power up, the SiP5668 initially defaults to a high impedance state on the termination pins. If the MODE pin detects S/E or LVD level on the DIFFSENS signal of the SCSI bus the SiP5668 will wait a standard delay (200 ms typical) before changing its operating mode. During regular operation if the MODE pin detects another bus mode change the SiP5668 again waits a standard delay before changing its operating mode. This mode change delay is implemented in accordance with SCSI standards SPI-3 and higher. Two status lines (S/E and LVD) are provided by the SiP5668. One and only one status line is asserted HIGH when its corresponding mode has been detected; the other status line is driven low. Both status lines are driven low when HPD mode is detected. The DISABLE pin is used to connect/disconnect the SiP5668. If it is pulled to GROUND the SiP5668 is in connect mode, and operates as a terminator. If it is pulled to TRMPWR or left open the device is in disconnect mode and presents high impedance to the SCSI bus. In disconnect mode the DIFFSENS Regulator is disabled but the mode detection circuitry continues to function and the status lines continue to indicate which mode is detected. The SiP5668 operates within SCSI specifications with the TERMPWR voltage between 2.7 V and 5.25 V, which enables it to operate in both 5-V and 3.3-V systems. The 2.7-V lower limit guarantees correct performance in a 3.3-V system. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?73099. www.vishay.com 10 Document Number: 73099 S-41843—Rev. A, 11-Oct-04 Legal Disclaimer Notice Vishay Notice Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale. Document Number: 91000 Revision: 08-Apr-05 www.vishay.com 1