Revised August 1999 74F540 • 74F541 Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The 74F540 and 74F541 are similar in function to the 74F240 and 74F244 respectively, except that the inputs and outputs are on opposite sides of the package (see Connection Diagrams). This pinout arrangement makes these devices especially useful as output ports for microprocessors, allowing ease of layout and greater PC board density. ■ 3-STATE outputs drive bus lines ■ Inputs and outputs opposite side of package, allowing easier interface to microprocessors Ordering Code: Order Number Package Number Package Description 74F540SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F540SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F540PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 74F541SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F541SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F541PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagrams IEEE/IEC 74F540 74F540 IEEE/IEC 74F541 © 1999 Fairchild Semiconductor Corporation 74F541 DS009553 www.fairchildsemi.com 74F540 • 74F541 Octal Buffer/Line Driver with 3-STATE Outputs April 1988 74F540 • 74F541 Unit Loading/Fan Out Pin Names U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL 1.0/1.0 20 µA/−0.6 mA 1.0/1.0 20 µA/−0.6 mA Description OE1, OE2 3-STATE Output Enable Input (Active LOW) In Inputs On, On Outputs 600/106.6 (80) −12 mA/64 mA (48 mA) Truth Table Inputs OE1 Outputs OE2 I 74F540 74F541 L L H L H H X X Z Z X H X Z Z L L L H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance www.fairchildsemi.com 2 Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Current Applied to Output twice the rated IOL (mA) in LOW State (Max) DC Electrical Characteristics Symbol Parameter Min Typ Max VCC Input HIGH Voltage VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V Min VOH Output HIGH 10% VCC 2.4 Voltage 10% VCC 2.0 V Min 5% VCC 2.7 VOL Output LOW Voltage IIH Input HIGH IBVI Input HIGH Current ICEX Output HIGH 2.0 Units VIH V Breakdown Test Leakage Current Test IOD Circuit Current Input LOW Current IOZH Output Leakage Current IOZL Output Leakage Current IOS Output Short-Circuit Current IZZ Bus Drainage Test ICCH Power Supply Current (’74F540) ICCL IOH = −15 mA 0.55 V Min IOL = 64 mA 5.0 µA Max VIN = 2.7V 7.0 µA Max VIN = 7.0V 50 µA Max VOUT = VCC V 0.0 3.75 µA 0.0 −0.6 mA Max VIN = 0.5V 50 µA Max VOUT = 2.7V 4.75 Output Leakage IIL IIN = −18 mA IOH = −3 mA 10% VCC Input Leakage Recognized as a LOW Signal IOH = −3 mA Current VID Conditions Recognized as a HIGH Signal IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded −50 µA Max VOUT = 0.5V −225 mA Max VOUT = 0V 500 µA 0.0V VOUT = 5.25V 11 20 mA Max VO = HIGH Power Supply Current (74F540) 53 75 mA Max VO = LOW ICCZ Power Supply Current (74F540) 31 45 mA Max VO = HIGH Z ICCH Power Supply Current (74F541) 26 35 mA Max VO = HIGH ICCL Power Supply Current (74F541) 55 75 mA Max VO = LOW ICCZ Power Supply Current (74F541) 31 55 mA Max VO = HIGH Z −100 3 www.fairchildsemi.com 74F540 • 74F541 Absolute Maximum Ratings(Note 1) 74F540 • 74F541 AC Electrical Characteristics Symbol Parameter TA = +25°C TA = −55°C to +125°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF CL = 50 pF Min Typ Max Min Max Min tPLH Propagation Delay 1.5 3.0 5.0 1.0 6.0 1.0 5.5 tPHL Data to Output (74F540) 1.0 2.0 4.0 1.0 4.5 1.0 4.0 tPZH Output Enable Time (74F540) 2.5 4.9 8.0 2.5 9.0 2.5 8.5 3.5 5.8 10.0 3.5 11.0 3.5 10.5 1.5 3.4 6.0 1.5 7.0 1.5 6.5 1.0 2.5 5.5 1.0 7.5 1.0 6.0 tPZL tPHZ Output Disable Time (74F540) tPLZ Max tPLH Propagation Delay 1.5 3.3 5.5 1.5 6.0 tPHL Data to Output (74F541) 1.5 2.7 5.5 1.5 6.0 tPZH Output Enable Time (74F541) 3.0 5.8 8.0 2.5 9.5 3.5 6.1 8.5 3.0 9.5 1.5 3.4 6.0 1.5 6.5 1.5 2.9 5.5 1.5 6.0 tPZL tPHZ Output Disable Time (74F541) tPLZ www.fairchildsemi.com 4 Units ns ns ns ns 74F540 • 74F541 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com 74F540 • 74F541 Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6