FDS3812 80V N-Channel Dual PowerTrench MOSFET General Description Features This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. 3.4 A, 80 V. RDS(ON) = 74 mΩ @ VGS = 10 V RDS(ON) = 84 mΩ @ VGS = 6 V • Fast switching speed These MOSFETs feature faster switching and lower gate charge than other MOSFETs with comparable RDS(ON) specifications. The result is a MOSFET that is easy and safer to drive (even at very high frequencies), and DC/DC power supply designs with higher overall efficiency. • Low gate charge (13nC typ) • High performance trench technology for extremely low RDS(ON) • High power and current handling capability D1 D1 5 D2 6 D2 4 3 Q1 7 SO-8 S2 G2 S1 G1 Absolute Maximum Ratings Symbol 8 2 Q2 1 TA=25oC unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter 80 V VGSS Gate-Source Voltage ± 20 V ID Drain Current 3.4 A PD Power Dissipation for Dual Operation – Continuous (Note 1a) – Pulsed 20 2 Power Dissipation for Single Operation TJ, TSTG (Note 1a) 1.6 (Note 1b) 1.0 (Note 1c) 0.9 W –55 to +175 °C (Note 1a) 78 °C/W (Note 1) 40 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDS3812 FDS3812 13’’ 12mm 2500 units 2001 Fairchild Semiconductor Corporation FDS3812 Rev B1(W) FDS3812 May 2001 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings (Note 2) W DSS IAR Single Pulse Drain-Source Avalanche Energy Maximum Drain-Source Avalanche Current VDD = 40 V, ID = 3.4 A 90 mJ 3.4 A Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID = 250 µA, Referenced to 25°C VDS = 64 V, VGS = 0 V 1 µA IGSSF Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –20 V VDS = 0 V –100 nA 4 V On Characteristics 80 V 80 mV/°C (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID = 250 µA, Referenced to 25°C –6 VGS = 10 V, ID = 3.4 A ID = 3.2 A VGS = 6.0 V, VGS = 10 V, ID = 3.4 A, TJ = 125°C 53 58 94 ID(on) On–State Drain Current VGS = 10 V, VDS = 5 V gFS Forward Transconductance VDS = 10 V, ID = 3.4 A 14 VDS = 40 V, f = 1.0 MHz V GS = 0 V, 634 pF 58 pF 28 pF 2 2.4 mV/°C 74 84 140 20 mΩ A S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) (Note 2) 7 14 ns 3 6 ns Turn–Off Delay Time 24 28 ns tf Turn–Off Fall Time 4 8 ns Qg Total Gate Charge 13 18 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDD =40 V, VGS = 10 V, VDS = 40 V, VGS = 10 V ID = 1 A, RGEN = 6 Ω ID = 3.4 A, 2.4 nC 2.8 nC Drain–Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = 1.3 A Voltage (Note 2) 0.8 1.3 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 78°C/W when mounted on a 1in2 pad of 2 oz copper b) 125°C/W when mounted on a .04 in2 pad of 2 oz copper c) 135°C/W when mounted on a minimum pad. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDS3812 Rev B1(W) FDS3812 Electrical Characteristics FDS3812 Typical Characteristics 1.8 20 VGS = 10V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 5.0V 4.5V ID, DRAIN CURRENT (A) 6.0V 15 4.0V 10 5 1.6 VGS = 4.0V 1.4 4.5V 5.0V 1.2 6.0V 10V 1 0.8 0 0 1 2 3 4 0 5 5 Figure 1. On-Region Characteristics. 15 20 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.18 2.5 ID = 3.4A VGS =10V 2.2 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 10 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) 1.9 1.6 1.3 1 0.7 0.4 -50 -25 0 25 50 75 100 125 150 ID = 1.7 A 0.14 TA = 125oC 0.1 TA = 25oC 0.06 0.02 175 2 4 6 8 10 o TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 20 IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VDS = 5V 15 10 o TA = 125 C 5 25oC -55oC VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 0 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS3812 Rev B1(W) FDS3812 Typical Characteristics 1000 VDS = 20V ID = 3.4A f = 1MHz VGS = 0 V 40V 8 800 CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 10 60V 6 4 2 CISS 600 400 200 COSS CRSS 0 0 0 3 6 9 12 15 0 20 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 60 80 Figure 8. Capacitance Characteristics. 100 50 P(pk), PEAK TRANSIENT POWER (W) ID, DRAIN CURRENT (A) 40 -VDS, DRAIN TO SOURCE VOLTAGE (V) 100µs RDS(ON) LIMIT 10 1ms 10ms 100ms 1s 10s 1 DC VGS = 10V SINGLE PULSE RθJA = 135oC/W 0.1 TA = 25oC 0.01 0.1 1 10 100 SINGLE PULSE RθJA = 135°C/W TA = 25°C 40 30 20 10 0 0.001 1000 0.01 VDS, DRAIN-SOURCE VOLTAGE (V) 1 10 100 1000 t1, TIME (sec) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 0.1 Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) + RθJA RθJA = 135°C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 t1 0.01 0.01 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS3812 Rev B1(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. 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Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H2