Si9979 Vishay Siliconix 3-Phase Brushless DC Motor Controller FEATURES D Hall-Effect Commutation D 60_ or 120_ Sensor Spacing D Integral High-Side Drive for all N-Channel MOSFET Bridges D PWM Input D D D D D Quadrature Selection Tachometer Output Reversible Braking Output Enable Control Cross Conduction Protection Current Limiting Undervoltage Lockout Internal Pull-Up Resistors D D D D DESCRIPTION The Si9979 is a monolithic brushless dc motor controller with integral high-side drive circuitry. The Si9979 is configured to allow either 60_or 120_ commutation sensor spacing. The internal low-voltage regulator allows operation over a wide input voltage range, 20- to 40-V dc. quadrature select, and braking inputs are included for control along with a tachometer output. Protection features include cross conduction protection, current limiting, and undervoltage lockout. The FAULT output indicates when undervoltage, over current, disable, or invalid sensor shutdown has occurred. The Si9979 provides commutation from Hall-effect sensors. The integral high-side drive, which utilizes combination bootstrap/charge pump supplies, allows implementation of an all n-channel MOSFET 3-phase bridge. PWM, direction, The Si9979 is available in both standard and lead (Pb)-free 48-pin SQFP packages and is specified to operate over the commercial temperature range of 0 to 70_C (C suffix), and the industrial temperature range of −40 to 85_C (D suffix). FUNCTIONAL BLOCK DIAGRAM V+ Bootstrap Reg. 42 Low-Voltage Regulator VDD 43 VDD VREF Charge Pump CAPA CAPB CAPC INB INC 60/120 EN F/R QS PWM BRK TACH FAULT 34 35 High-Side U.V. Lockout Bootstrap Reg. Charge Pump Low-Side U.V. Lockout INA 36 32 30 31 1 VDD 2 VDD Bootstrap Reg. 3 VDD Charge Pump 4 VDD 5 VREF 6 VREF 7 VREF 8 VREF 9 VREF Input Logic VDD 28 26 27 33 29 10 25 11 13-16, 21-24 37-41, 44-48 RT RT/CT 18 17 Document Number: 70012 S-41209—Rev. E, 21-Jun-04 One Shot − + 20 19 CAPA GTA SA CAPB GTB SB CAPC GTC SC GBA GBB GBC GND IS− IS+ www.vishay.com 1 Si9979 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Voltage on Pin 42 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V Voltage on Pins 1−4, 10, 11 . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD + 0.3 V Voltage on Pins 5−9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 5.5 V Voltage on Pins 26, 28, 30, 32, 34, 36 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V Voltage on Pins 27, 31, 35 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −2 to 50 V Operating Temperature C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70_C D Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 to 85_C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150_C Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C Power Dissipation (PD) C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.70 W D Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.55 W RECOMMENDED OPERATING RANGE V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20 to 40 VDC RT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 kW Min SPECIFICATIONS Test Conditions Unless Otherwise Specified Parameter Symbol Limits V+ = 20 to 40 V, IDD = 0 mA Mina −20 mA v IDD v 0 mA 14.5 Typb Maxa 16 17.5 Unit Power Supply Voltage Range V+ Logic Voltage VDD Supply Current Logic Current Internal Referenced 20 I+ 40 4.5 IDD mA −20 VREF V 4.2 V Commutation Inputs (INA, INB, INC, 60/120) High-State VIH Low-State VIL 4.0 High-State Input Current IIH VIH = VDD Low-State Input Current IIL VIL = 0 V 1.0 10 −50 V mA Logic Inputs (F/R, EN, QS, PWM, BRK) High-State VIH Low-State VIL 2.0 High-State Input Current IIH VIH = 5.5 V Low-State Input Current IIL VIL = 0 V 0.8 10 −125 V mA Outputs Low-Side Gate Drive, High State VGBH Low-Side Gate Drive, Low State VGBL High Side Gate Drive, High-Side Drive High State VGTH High-Side Gate Drive, Low State VGTL Capacitor Voltaged VCAP 14 16 0.1 TA = 0 to 70_C C Suffix 16 18 TA = −40 to 85_C D Suffix 16 20 55 trL Low-Side Switching, Fall Time tfL High-Side Switching, Rise Time trH High-Side Switching, Fall Time tfH 40 tBLH 100 TACH Output/FAULT Output TACH Output Pulsewidth www.vishay.com 2 70 Risetime = 1 to 10 V Falltime = 10 to 1 V CL = 600 pF 25 100 tBHL VOL tT V 0.1 V+ = 40 V Low-Side Switching, Rise Time Break Before Make Time Break-Before-Make 17.5 ns 300 IOL = 1.0 mA 0.15 300 600 0.4 V ns Document Number: 70012 S-41209—Rev. E, 21-Jun-04 Si9979 Vishay Siliconix SPECIFICATIONS Test Conditions Unless Otherwise Specified Parameter Symbol Limits Mina V+ = 20 to 40 V, IDD = 0 mA Typb Maxa Unit Protection Low-Side Undervoltage Lockout UVLL Low-Side Hysteresis 12.2 VH High-Side Undervoltage Lockout 0.8 UVLH SA, B, C = 0 V V VDD − 3.3 Current Limit Comparator Input Bias Current IIB Comparator Threshold Voltage VTH Common Mode Voltage VCM One Shot Pulse Width −5 mA TA = 0 to 70_C C Suffix 90 100 110 TA = −40 to 85_C D Suffix 85 100 125 0 tp 1 RT = 10 k, CT = 0.001 mF 8 10 12 RT = 10 k, CT = 0.01 mF 80 100 120 mV V ms Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. The reference voltage is not available for external use. d. VCAP = (V+) + (VDD). COMMUTATION TRUTH TABLE Inputs Sensors (60_Spacing) Outputs Sensors (120_Spacing) Top Drive INA INB INC INA INB INC EN F/R BR K IS+ 0 0 0 1 0 1 1 1 0 1 0 0 1 0 0 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 0 1 0 1 1 0 1 1 0 0 1 0 0 0 0 0 1 1 0 0 1 1 1 0 Conditions Bottom Drive GB GB GB A B C A B C 0 1 0 0 0 1 0 1 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 1 0 0 1 1 1 0 0 0 0 1 1 0 0 1 1 1 1 0 0 0 0 1 0 1 0 1 0 1 1 0 0 0 0 1 0 1 0 0 1 1 0 0 1 0 0 0 0 0 1 1 0 0 1 0 1 1 0 1 0 0 0 0 0 1 0 1 0 1 1 1 0 1 0 1 0 0 0 1 0 0 0 1 0 1 1 1 0 1 1 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 1 1 0 0 0 0 1 0 0 0 1 1 X X X X X X 0 X 0 X 0 0 0 0 0 0 0 Disable X X X X X X 0 X 1 X 0 0 0 1 1 1 0 Power Down L L L L L L 1 X 1 0 0 0 0 1 1 1 1 Brake L L L L L L 1 X 1 1 0 0 0 1 1 1 0 Over I in BRK L L L L L L 1 X 0 1 0 0 0 0 0 0 0 Over I 1 0 1 1 1 1 1 X 0 X 0 0 0 0 0 0 0 1 0 1 1 1 1 1 X 1 X 0 0 0 1 1 1 0 0 1 0 0 0 0 1 X 0 X 0 0 0 0 0 0 0 0 1 0 0 0 0 1 X 1 X 0 0 0 1 1 1 0 Notes: GT- GT- GT- FAULT L. Any valid sensor combination X. Don’t care Document Number: 70012 S-41209—Rev. E, 21-Jun-04 www.vishay.com 3 Si9979 Vishay Siliconix PIN CONFIGURATION AND ORDERING INFORMATION GND GND GND GND GND V DD V+ GND GND GND GND GND SQFP-48 48 47 46 45 44 43 42 41 40 39 38 37 ORDERING INFORMATION 36 CAPA Standard Part Number Lead (Pb)-Free Part Number 35 SA Si9979CS Si9979CS—E3 0 to 70_C 34 GTA Si9979DS—E3 −40 to 85_C 4 33 GBA Si9979DS 5 32 CAPB F/R 6 31 SB QS 7 30 GTB PWM 8 29 GBB BRK 9 28 CAPC SC INA INB 1 2 INC 3 60/120 EN TACH 10 27 FAULT 11 26 GTC GND 12 25 GBC Temperature Range Package SQFP-48 NOTE: Si9979CS and Si9979DS are supplied in trays. GND GND GND IS − GND IS + RT R T/C T GND GND GND GND 13 14 15 16 17 18 19 20 21 22 23 24 Top View PIN DESCRIPTION Pins 1−3: INA, INB, INC INA, INB, and INC are the commutation sensor inputs, and are intended to be driven by open collector Hall effect switches. These inputs have internal pull up resistors tied to VDD, which eliminates the need for external pull up resistors. Pin 4: 60/120 The 60/120 input allows the use of the Si9979 with either a 60_ or 120_ commutation sensor spacing. An internal pull up resistor, which is tied to VDD, sets the default condition to 60_ spacing. 120_ spacing is selected by pulling this input to ground. pin is pulled up internally. When this pin is pulled to ground, the commutation sensor logic levels are inverted internally, causing reverse rotation. Pin 7: QS (Quadrature Select) This input determines whether the bottom MOSFETs or both bottom and top MOSFETs switch in response to the PWM signal. A logic “1” on this input enables only the bottom MOSFETs. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, both the bottom and top MOSFETs are enabled. Pin 5: EN (Enable) A logic “1” on this input allows commutation of the motor. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, all gate drive outputs are turned off. Pin 6: F/R (Forward/Reverse) A logic “1” on this input selects commutation for motor rotation in the “forward” direction. This is the default condition as this www.vishay.com 4 Pin 8: PWM An open collector (drain) or TTL compatible signal is applied to this input to control the motor speed. The QS input determines which MOSFETs are switched in response to the PWM signal. If no PWM signal is being used, this input is left open. It is pulled up internally, which allows the MOSFETs to follow the commutation sequence. Document Number: 70012 S-41209—Rev. E, 21-Jun-04 Si9979 Vishay Siliconix PIN DESCRIPTION (CONT’D) Pin 9: BRK Pins 12−16: 21−24, 37−41, 44−48, GND With this input at logic “1”, the top MOSFETs are turned off and the bottom MOSFETs are turned on, shorting the motor windings together. This provides a braking torque which is dependent on the motor speed. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, the MOSFETs are allowed to follow the commutation sequence. These pins are the return path for both the logic and gate drive circuits. Also, they serve to conduct heat out of the package, into the circuit board. Pin 10: TACH This output provides a minimum 300-nanosecond output pulse for every commutation sensor transition, yielding a 6 pulse per electrical revolution tachometer signal. This output is open drain. Pin 11: FAULT The FAULT output switches low to indicate that at least one of the following conditions exists, controller disable (EN), undervoltage lockout, invalid commutation sensor code shutdown, or overcurrent shutdown. This output is open drain. Pin 17: RT/CT The junction of the current limit one shot timing resistor and capacitor is connected to this pin. This one-shot is triggered by the current limit comparator when an overcurrent condition exists. This action turns off all the gate drives for the period defined by RT and CT , thus stopping the flow of current. Pin 25: GBC This is the gate drive output for the bottom MOSFET in Phase C. Pin 26: GTC This is the gate drive output for the top MOSFET in Phase C. Pin 27: SC This pin is negative supply of the high-side drive circuitry. As such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOSFET Drain, and the Phase C output. Pin 28: CAPC This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase C is connected between this pin and SC. Pin 29: GBB This is the gate drive output for the bottom MOSFET in Phase B. Pin 18: RT Pin 30: GTB One side of the current limit one shot timing resistor is connected to this pin. This is the gate drive output for the top MOSFET in Phase B. Pin 19: IS+ This is the sensing input of the current limit comparator and should be connected to the positive side of the current sense resistor. When the voltage across the current sense resistor exceeds 100 mV, the comparator switches and triggers the current limit one-shot. The one-shot turns off all the gate drives for the period defined by RT and CT, thus stopping the flow of current. If the overcurrent condition remains after the shutdown period, the gate drives will be held off until the overcurrent condition no longer exists. Pin 20: IS− This pin is the ground reference for the current limit comparator. It should be connected directly to the ground side of the current sense resistor to enhance noise immunity. Document Number: 70012 S-41209—Rev. E, 21-Jun-04 Pin 31: SB This pin is negative supply of the high-side drive circuitry. As such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOSFET Drain, and the Phase B output. Pin 32: CAPB This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase B is connected between this pin and SB. Pin 33: GBA This is the gate drive output for the bottom MOSFET in Phase A. www.vishay.com 5 Si9979 Vishay Siliconix PIN DESCRIPTION (CONT’D) Pin 34: GTA Pin 42: V+ This is the gate drive output for the top MOSFET in Phase A. The supply voltage for the Si9979 is connected between this pin and ground. The internal logic and high-side supply voltages are derived from V+. Pin 35: SA This pin is negative supply of the high-side drive circuitry. As such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOSFET Drain, and the Phase A output. Pin 43: VDD VDD is the internal logic and gate drive voltage. It is necessary to connect a capacitor between this pin and ground to insure that the current surges seen at the turn on of the bottom MOSFETs does not trip the undervoltage lockout circuitry. Pin 36: CAPA This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase A is connected between this pin and SA. APPLICATION CIRCUITS LITTLE FOOT V+ Q1 Si9979 1 mF To Commutation Sensors 42 V+ 43 VDD SA 35 1 INA CAPA 36 2 INB GTB 3 INC SB 31 CAPB 32 5 EN 6 F/R 9 10 7 8 11 18 17 PWM IN FAULT RT GTC 30 26 27 CAPC 28 TACH GBA 35 QS GBB 29 PWM FAULT RT RT/CT GBC 25 IS+ 19 IS− 20 GND GND 60/120 CT 12−16, 21−24 37−41, 44−48 Q3 34 SC BRK 4 TACH GTA Q2 CBA A CBB B C CBC Q4 Q5 To Motor Windings Q6 R C RS GND FIGURE 1. Three-Phase Brushless DC Motor Controller www.vishay.com 6 Document Number: 70012 S-41209—Rev. E, 21-Jun-04 Si9979 Vishay Siliconix APPLICATION CIRCUITS LITTLE FOOT V+ Q1 Si9979 1 mF 42 V+ 43 V GTA DD To Commutation Sensor 36 CAPA INB 3 GTB INC SB 31 CAPB 32 4 RT 35 INA 9 PWM IN FAULT SA 2 6 TACH 34 1 5 EN GTC F/R BRK 60/120 10 TACH 7 QS 8 PWM 11 FAULT 18 RT 17 RT/CT GND Q2 CBA 30 A B CBB 26 SC 27 CAPC 28 GBA 35 GBB 29 GBC 25 IS+ 19 IS− GND 20 To Motor Windings Notes: Q4 Q5 1) If driving single phase BLDC, tie INA, INB, and INC together and drive with single hall. 2) If it is being used as an Hbridge controller, tie INA, INB, and INC to GND. Use F/R input to change active diagonal pair of MOSFETs. R 3) There is no TACH output when connected in this configuration. C CT RS 12−16, 21−24 37−41, 44−48 GND FIGURE 2. Single H-Bridge Controller LITTLE FOOT V+ MC14022 0 1 mF 42 1 43 2 CLK CP0 Q1 Si9979 1 3 2 4 3 5 6 5 7 CP1 MR 6 9 4 10 7 8 11 18 17 TACH PWM IN FAULT RT CT V+ GTA VDD SA INA CAPA INB GTB INC EN F/R BRK 60/120 TACH Q S PWM FAULT RT RT/CT GND SB CAPB GTC C GBB 35 36 30 32 26 35 A CBB B To Motor C Windings CBC Q4 Q5 Q6 29 IS− 20 GND 12−16, 21−24 37−41, 44−48 CBA 31 GBC 25 I + 19 S Q3 34 SC 27 28 CAP GBA Q2 R C RS GND FIGURE 3. Three-Phase AC Motor Controller Document Number: 70012 S-41209—Rev. E, 21-Jun-04 www.vishay.com 7 Si9979 Vishay Siliconix APPLICATION CIRCUITS V+ VDD’ V+ VDD C1 Si9979 1 mF VDD’ = VDD − VBE FIGURE 4. External VDD Regulator www.vishay.com 8 Document Number: 70012 S-41209—Rev. E, 21-Jun-04 Legal Disclaimer Notice Vishay Notice Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale. Document Number: 91000 Revision: 08-Apr-05 www.vishay.com 1