ATMEL AT79C1030

Features
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8-port 10/100/1000Mb/s Ethernet MII/GMII Switch
Provides Packet Switching Functions Between 8 Ethernet Ports
Advanced CoS (Class of Service) Supports 4-level Priority Switching
Duplex Mode Auto-negotiation Supported
Full-duplex Flow Control (802.3x) and Half-duplex Back Pressure
VLAN 802.1Q or Port-based Supported (Port-based, MAC-based
and Protocol Based)
ARP/Broadcast Filter (Optional)
8 GbE Ports with Non-blocking Switching Performance
Supports Automatic Address Learning and Aging
Integrated MAC and VLAN Address Tables
On-chip Packet Buffer Supports Store-and-Forward Switching Architecture
SPI (RS-232 Interface) for Setup and Unmanaged Operation
Multicast and Broadcast Storm Control
Up to 36-Kbyte Media Access Control (MAC) Address Cache
1.8V and 3.3V Supply
8-Port Gigabit
Ethernet CoS
Switch
AT79C1030
Description
The AT79C1030 device combines all the functions of a high-speed switch, including
packet buffer, Media Access Controllers (MAC), address management, and a nonblocking switch fabric. It complies with IEEE 802 specification, providing compatibility
with all industry standard Ethernet, Fast Ethernet, and Gigabit Ethernet devices.
Summary
The AT79C1030 utilizes the Store and Forward switching architecture to manage
packet switching between the eight independent Ethernet ports. The switch records
(learning), the relation between MAC addresses (including VLAN information) and the
actual ports. Next, the switch will resolve (forwarding) the destination MAC address of
the ingress packet, then it selects the related ports to transmit the packet. The device
is utilizing and maintaining a MAC address table and a VLAN table to accomplish this
task.
Using Store and Forward, the device reads the whole incoming frame into an internal
on-chip buffer and calculates its own frame check sequence. The switch then compares its CRC figure to the frame's CRC. If the two CRCs are the same, the switch will
consult its address look-up table, create the virtual link and then forward the frame.
The Switch Core uses the packet head information to perform packet filter, packet
drop, address table look up, priority category, etc. After the device completes the task
of forwarding decision, then all the forwarding information will be sent to the forwarding
module.
Each port has an independent forwarding module. The module puts the forwarding
information of the packets forwarded to each respected port. This information
includes:
1. The packet buffer location
2. The size of the packet
3. VLAN information
Four level priority queues are employed at each port. The transmission module
fetches the forwarding information from these different priority queues according to the
round robin rule and transmits the related packet. The higher priority level queues are
more likely to send the packets recorded in it and are less likely to discard these packets. After resolving each ingress packet, the switch engine can use the obtained
information to perform protocol processing. The device supports VLAN mode switch,
which means only ports belonging to the same VLAN can switch packets. This device
3435BS–NETST–6/04
Note: This is a summary document. A complete document
is available under NDA. For more information, please contact your local Atmel sales office.
also supports filtering special packets to prevent unnecessary flow, such as broadcast storms,
so broadcast/ARP packets can be discarded according to user settings.
Overview
Ethernet Packet
Reception and
Transmission
The AT79C1030 complies with the IEEE 802.3 MII/GMII specification. The switch supports
full/half duplex mode.
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In full-duplex mode, from the same port, the switch receives and transmits packets at the
same time; line flow control is performed by sending or resolving pause frames.
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In half-duplex mode, reception and transmission can't take place from the same port at the
same time. When a collision occurs, the packet should be retransmitted according to the
back-off algorithm. Line flow control is implemented by the back-pressure algorithm.
The switch works in 10/100/1000Mb/s in both full/half duplex modes. The full or half duplex
mode and data rate are selected via auto-negotiation or manually. In order to support autonegotiation the MDIO interface is implemented.
Receiving Operation
The device calculates the size of an ingress packet and decides whether the size of the packet
is legal. At the same time, a CRC check is performed to verify whether the input packet data is
right.
Transmitting Operation
The switch adds, removes, or changes the tag of the egress packet according to the related
settings. The device re-calculates the CRC of this packet again to ensure sending the right
packet in case the packet data is modified.
Figure 1. AT79C1030 Block Diagram
CPU
RS-232
VLAN
TABLE
SWITCH
CORE
MEMORY
MANAGER
MEMORY
REGISTER
MAC
TABLE
DMA
DMA
DMA
DMA
FIFO
FIFO
FIFO
FIFO
SMI
MAC
MAC
MAC
MAC
POR
T7
POR
T6
POR
T1
POR
T0
TX
2
RX TX
RX
8 GMII/MII TX
RX
TX
RX
MDC
MDIO
AT79C1030
3435BS–NETST–6/04
AT79C1030
Figure 2. Application Diagram
Transformer
Transformer
Transformer
Transformer
PHY
10/100/1000Mbps
PHY
10/100/1000Mbps
PHY
10/100/1000Mbps
PHY
10/100/1000Mbps
GMII/MII
Interface
COM Interface
AT79C1030
CPU
GMII/MII
Interface
10/100/1000Mbps
PHY
10/100/1000Mbps
PHY
10/100/1000Mbps
PHY
10/100/1000Mbps
PHY
Transformer
Transformer
Transformer
Transformer
3
3435BS–NETST–6/04
Electrical Characteristics
Absolute Maximum Ratings*
Parameter
Range
Unit
Power Supply VCC (Digital Logic)
1.8 ±5%
V
Power Supply VIO (Input/Output)
3.3 ±10%
V
Storage Temperature
-65 to 140
°C
IOL per I/O pin
Power Dissipation
Commercial
*NOTICE:
4
TBD
1.9
W
0 to -70
°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
AT79C1030
3435BS–NETST–6/04
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3435BS–NETST–6/04