ROHM BD3537F

TECHNICAL NOTE
High-performance Regulator IC Series for PCs
Termination Regulators
for DDR-SDRAMs
BD3537F
Description
BD3537F is a termination regulator compatible with JEDEC DDR-SDRAM, which functions as a linear power supply
incorporating an N-channel MOSFET and provides a sink/source current capability up to 1.8A respectively. A built-in
high-speed OP-AMP specially designed offers an excellent transient response. Requires 5.0 volts as a bias power supply
to drive the N-channel MOSFET. For BD3537F, ceramic capacitor can be used as output capacitor. Thus, the BD3537F
is designed to enable significant package profile downsizing as the total regulator part.
Features
1) Incorporates a push-pull power supply for termination (VTT)
2) Incorporates an enabler
3) Incorporates an undervoltage lockout (UVLO)
4) Employs SOP8 package
5) Incorporates a thermal shutdown protector (TSD)
6) Compatible with Dual Channel (DDR-II)
7) Operates with input voltage from 4.75 to 5.25 volts
8) Incorporates soft start function
Use
Power supply for DDR I/II - SDRAM
Oct. 2008
●ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Limits
Unit
VCC
7 *1
V
REF
*1
V
7 *1
V
Input Voltage
REF Input Voltage
Termination Input Voltage
7
VTT_IN
Output Current
ITT
3
A
Power Dissipation1
Pd1
560 *2
mW
Power Dissipation2
Pd2
690 *3
mW
Operating Temperature Range
Topr
-30~+100
℃
Storage Temperature Range
Tstg
-55~+150
℃
Tjmax
+150
℃
Maximum Junction Temperature
*1 Should not exceed Pd.
*2 Reduced by 4.48mW for each increase in Ta of 1℃ over 25℃ (no heat sink).
*3 Reduced by 5.52mW for each increase in Ta of 1℃ over 25℃ (when mounted on 70mm x 70mm x 1.6mm Glass-epoxy PCB).
●OPERATING CONDITIONS (Ta=25℃)
Parameter
Input Voltage
Termination Input Voltage
Reference Voltage
Symbol
MIN
MAX
Unit
VCC
4.75
5.25
V
VTT_IN
1.746
1.854
V
VEN
0.6
1.6
V
★ No radiation-resistant design is adopted for the present product.
●ELECTRICAL CHARACTERISTICS (unless otherwise noted, Ta=25℃, VCC=5V, REF=0.9V, VTT_IN=1.8V)
Standard Value
Parameter
Symbol
Unit
Condition
MIN
TYP
MAX
Standby Current
IST
-
50
90
uA
REF<0.15V(Shutdown)
Bias Current
ICC
-
1
2.5
mA
REF=0.9V
Termination Output Voltage 1
VTT1
REF-20m
REF
REF+20m
V
ITT=0A
Termination Output Voltage 2
VTT2
REF-20m
REF
REF+20m
V
ITT=-1.8A to 1.8A
Source Current
ITT+
1.8
-
-
A
Sink Current
ITT-
-
-
-1.8
A
Upper Side ON Resistance 1
HRON1
-
0.3
0.5
Ω
Lower Side ON Resistance 1
LRON1
-
0.3
0.5
Ω
UVLO Threshold Voltage
VUVLO
3.5
3.8
4.1
V
UVLO Hysteresis Voltage
⊿VUVLO
100
160
220
mV
EN-ON Voltage
VENH
0.6
-
-
V
EN-OFF Voltage
VENL
-
-
0.15
V
[Termination]
[UVLO block]
[Enable block]
2/10
VCC : sweep up
VCC : sweep down
●Soft start function
(a) when input REF voltage
VCC
REF
EN shutdown (0.6V/TYP)
VTTIN
VTT
TSOFT
Include soft start
(b) when input VCC voltage
VCC
UVLO released (3.8V/TYP)
REF
VTTIN
VTT
TSOFT
Include soft start
(c) when input VTTIN voltage
VCC
REF
VTTIN
VTT
No soft start
3/10
※TSOFT≦1msec
●Reference Data
VTT (50mV/Div.)
VTT (50mV/Div.)
VTT (50mV/Div.)
ITT (1A/Div.)
ITT (1A/Div.)
ITT (1A/Div.)
Fig.2 DDRI (1A→-1A)
Fig.1 DDRI (-1A→1A)
VTT (50mV/Div.)
VTT (10mV/Div.)
ITT
ITT (1A/Div.)
(1A/Div.)
VTT
VTT
REF
REF
VTT IN
VTT IN
VCC
VCC
Fig.6 Input Sequence 2
Fig.5 Input Sequence 1
Fig.4 DDRⅡ (-1A→1A)
1.258
0.912
1.256
0.910
1.254
0.908
0.906
1.252
VTT(V)
VTT(V)
VTT
REF
Fig.3 DDRⅡ (-1A→1A)
1.250
1.248
VTT IN
0.898
1.244
-2
Fig.7 Input Sequence 3
0.902
0.900
1.246
VCC
0.904
-1
0
ITT(A)
1
Fig.8 ITT-VTT (DDR-Ⅰ)
REF(500mV/div)
VTT(500mV/div)
IVTTIN(50mA/div)
(100usec/div)
Fig.10 Soft start
4/10
2
0.896
-2
-1
0
ITT(A)
1
Fig.9 ITT-VTT (DDR-Ⅱ)
2
●BLOCK DIAGRAM
VTT_IN
VDDQ
C1
C2
R1
C4
R2
VCC
REF
VTT_IN
VCC
VCC
+
Reference
Block
Protection
UVLO
Enable
Block
Thermal
TSD
+
-
EN
TSD
EN
UVLO
- VCC
+
VTT
C3
VTT
TSD
EN
UVLO
GND
●PIN CONFIGRATION
●PIN FUNCTION
VTT_IN 1
8 N.C.
GND 2
7 N.C
REF 3
6 VCC
VTT 4
5 N.C.
PIN No.
1
2
3
4
5
6
7
8
PIN name
VTT_IN
GND
REF
VTT
N.C.
VCC
N.C.
N.C.
PIN Function
Termination power supply pin
Ground pin
Reference voltage output pin
Termination output pin
Non connection
VCC Pin
Non connection
Non connection
●Description of operations
・VCC
In BD3537F, an independent power input pin is provided for an internal circuit operation of the IC. This is used to drive the
amplifier circuit of the IC, and its maximum current rating is 2.5mA. The power supply voltage is 5.0 volts. It is
recommended to connect a bypass capacitor of 1μF or so to VCC.
・VTT_IN
VTT_IN is a power supply input pin for VTT output. Voltage in the range up to 1.8 volts may be supplied to this VTT_IN
terminal, but care must be taken to the current limitation due to on-resistance of the IC and the change in allowable loss due to
input/output voltage difference.
Higher impedance of the voltage input at VTT_IN may result in oscillation or degradation in ripple rejection, which must be
noted. To VTT_IN terminal, it is recommended to use a 10μF capacitor characterized with less change in capacitance. But
it may depend on the characteristics of the power supply input and the impedance of the pc board wiring, which must be
carefully checked before use.
・VTT
A DDR memory termination output pin. BD3537F has a sink/source current capability of ±1.8A respectively. The output
voltage is same as REF voltage. VTT output is turned to OFF when VCC UVLO or thermal shutdown protector is activated
with EN pin level becomes EN-OFF voltage or below. Do not fail to connect a capacitor to VTT output pin for a loop gain
phase compensation and a reduction in output voltage variation in the event of sudden change in load. Insufficient
capacitance may cause an oscillation. High ESR (Equivalent Series Resistance) of the capacitor may result in increase in
output voltage variation in the event of sudden change in load. It is recommended to use a 10 μF ceramic capacitor (X5R or
X7R), though it depends on ambient temperature and other conditions. A low ESR ceramic capacitor may reduce a loop gain
phase margin and may cause an oscillation, which may be improved by connecting a resistor in series with the OS-capacitor
(several-hundred μF).
・REF
With an input of 0.6 volts or higher, the level at REF pin turns to “High” to provide VTT output. If the input is lowered to 0.15
volts or less, the level at REF pin turns to “Low” and VTT status turns to Hi-Z.
5/10
●Evaluation Board
■Evaluation Board circuit
C10
VTTIN
U1
4
C7
VTT
GND
GND
3
C9
C2
C1
R1
VREF
VTT
VTTIN
C8
1
VDDQ
C12
M1
R3
EN
BD3537F
R2
VCC
C13
REF
SW
VCC
C4
R4
VCC
C11
GND
C3
C6
C5
6
M0
GND
2
GND
GND
■Evaluation Board Application Components
Part No
U1
M0
M1
C1
C2
C3
C4
C5
C6
C7
Value
Company
ROHM
Parts Name
Part No
BD3537F
0.1uF
0.1uF
KYOCERA
KYOCERA
CM05B104K10A
CM05B104K10A
1uF
KYOCERA
CM05B105K10A
C8
C9
C10
R1
R2
R3
R4
R5
R6
Value
Company
Parts Name
10uF
KYOCERA
CM316B106M10A
100kΩ
100kΩ
ROHM
ROHM
MCR03
MCR03
■BD3537F (SOP8) Evaluation Board Layout
Silk Screen
TOP Layer
6/10
Bottom Layer
●Heat loss
Thermal design must be conducted with the operation under the conditions listed below (which are the guaranteed
temperature range requiring consideration on appropriate margins etc.):
1. Ambient temperature Ta: 100°C or lower
2. Chip junction temperature Tj: 150°C or lower
The chip junction temperature Tj can be considered as follows. See Page 9/9 for θja.
Most of heat loss in BD3537F occurs at the output N-channel FET. The power lost is determined by multiplying the voltage
between VIN and Vo by the output current. As this IC employs the power PKG, the thermal derating characteristics
significantly depends on the pc board conditions. When designing, care must be taken to the size of a pc board to be used.
Power dissipation (W) = {Input voltage (VTT_IN) – Output voltage (VTT≒REF)}×Io (Ave)
If VTT_IN = 1.8volts, REF=0.9volts, and Io (Ave)=0.5 A, for instance, the power dissipation is determined as follows:
Power dissipation (W) = {1.8 (V) – 0.9 (V)} × 0.5 (A) = 0.4 (W)
●NOTE FOR USE
1.Absolute maximum ratings
For the present product, thoroughgoing quality control is carried out, but in the event that applied voltage, working
temperature range, and other absolute maximum rating are exceeded, the present product may be destroyed. Because it is
unable to identify the short mode, open mode, etc., if any special mode is assumed, which exceeds the absolute maximum
rating, physical safety measures are requested to be taken, such as fuses, etc.
2.GND potential
Bring the GND terminal potential to the minimum potential in any operating condition.
3.Thermal design
Consider allowable loss (Pd) under actual working condition and carry out thermal design with sufficient margin provided.
4.Terminal-to-terminal short-circuit and erroneous mounting
When the present IC is mounted to a printed circuit board, take utmost care to direction of IC and displacement. In the event
that the IC is mounted erroneously, IC may be destroyed. In the event of short-circuit caused by foreign matter that enters in
a clearance between outputs or output and power-GND, the IC may be destroyed.
5.Operation in strong electromagnetic field
The use of the present IC in the strong electromagnetic field may result in maloperation, to which care must be taken.
6.Built-in thermal shutdown protection circuit
The present IC incorporates a thermal shutdown protection circuit (TSD circuit). The working temperature is 175°C
(standard value) and has a -15°C (standard value) hysteresis width. When the IC chip temperature rises and the TSD circuit
operates, the output terminal is brought to the OFF state. The built-in thermal shutdown protection circuit (TSD circuit) is first
and foremost intended for interrupt IC from thermal runaway, and is not intended to protect and warrant the IC.
Consequently, never attempt to continuously use the IC after this circuit is activated or to use the circuit with the activation of
the circuit premised.
7.Capacitor across output and GND
In the event a large capacitor is connected across output and GND, when Vcc and VIN are short-circuited with 0V or GND for
some kind of reasons, current charged in the capacitor flows into the output and may destroy the IC. Use a capacitor smaller
than 1000 μF between output and GND.
8.Inspection by set substrate
In the event a capacitor is connected to a pin with low impedance at the time of inspection with a set substrate, there is a fear
of applying stress to the IC. Therefore, be sure to discharge electricity for every process. As electrostatic measures,
provide grounding in the assembly process, and take utmost care in transportation and storage. Furthermore, when the set
substrate is connected to a jig in the inspection process, be sure to turn OFF power supply to connect the jig and be sure to
turn OFF power supply to remove the jig.
9. Inputs to IC terminals
+
This device is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and
the N-layer of each element form a PN junction which works as:
・a diode if the electric potentials at the terminals satisfy the following relationship; GND>Terminal A>Terminal B, or
・a parasitic transistor if the electric potentials at the terminals satisfy the following relationship; Terminal B>GND Terminal A.
The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits,
and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such manner
that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in activation of
parasitic elements.
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin B
B
E
Pin A
N
P+
N
P+
P
N
N
Parasitic
element
P+
P substrate
Parasitic element
GND
B
N
P+
P
N
C
E
Parasitic
element
P substrate
Parasitic element
7/10
GND
GND
GND
Other adjacent elements
10. GND wiring pattern
When both a small-signal GND and high current GND are present, single-point grounding (at the set standard point) is
recommended, in order to separate the small-signal and high current patterns, and to be sure the voltage change stemming
from the wiring resistance and high current does not cause any voltage change in the small-signal GND. In the same way,
care must be taken to avoid wiring pattern fluctuations in any connected external component GND.
11. Output capacitor (C3)
Do not fail to connect a output capacitor to VTT output terminal for stabilization of output voltage. The capacitor connected to
VTT output terminal works as a loop gain phase compensator. Insufficient capacitance may cause an oscillation. It is
recommended to connect a 10 μF ceramic capacitor (X5R or X7R) near to VTT and GND, though it depends on ambient
temperature and other conditions. A low ESR ceramic capacitor may reduce a loop gain phase margin and may cause an
oscillation, which may be improved by connecting a resistor in series with the OS-capacitor (several-hundred μF). It is
therefore requested to carefully check under the actual temperature and load conditions to be applied.
12. Input capacitors (C1 and C2)
These input capacitors are used to reduce the output impedance of power supply to be connected to the input terminals (VCC
and VTT_IN). Increase in the power supply output impedance may result in oscillation or degradation in ripple rejecting
characteristics. It is recommended to use a low temperature coefficient 1μF (for VCC) and 10μF (for VTT_IN) capacitor, but it
depends on the characteristics of the power supply input, and the capacitance and impedance of the pc board wiring pattern.
It is therefore requested to carefully check under the actual temperature and load conditions to be applied.
13. Input terminals (VCC, VTT_IN and REF)
VCC, VTT_IN and REF terminals of this IC are made up independent one another. To VCC terminal, the UVLO function is
provided for malfunction protection. REF pin includes the Enable circuit. Irrespective of the input order of the inputs
terminals, VTT output is activated to provide the output voltage when UVLO voltages reach the threshold voltage while REF
voltage reaches the threshold of EN pin.
14.REF pin (R1 , R2 , C4)
REF pin controls this IC’s status ON or OFF. When REF voltage reaches EN-ON voltage, the output voltage operates. Then
BD3537F does not include “soft start function” so set the start up time by the value of extra components R1, R2 and C4.
15. Operating range
Within the operating range, the operation and function of the circuits are generally guaranteed at an ambient temperature
within the range specified. The values specified for electrical characteristics may not be guaranteed, but drastic change may
not occur to such characteristics within the operating range.
16. Allowable loss Pd
For the allowable loss, the thermal derating characteristics are shown in the Exhibit, which should be used as a guide. Any
uses that exceed the allowable loss may result in degradation in the functions inherent to IC including a decrease in current
capability due to chip temperature increase. Use within the allowable loss.
17. Built-in thermal shutdown protection circuit
Thermal shutdown protection circuit is built-in to prevent thermal breakdown. Turns VTT output to OFF when the thermal
shutdown protection circuit activates. This thermal shutdown protection circuit is originally intended to protect the IC itself.
It is therefore requested to conduct a thermal design not to exceed the temperature under which the thermal shutdown
protection circuit can work.
18. The use in the strong electromagnetic field may sometimes cause malfunction, to which care must be taken.
In the event that load containing a large inductance component is connected to the output terminal, and generation of
back-EMF at the start-up and when output is turned OFF is assumed, it is requested to insert a protection diode.
19. In the event that load containing a large inductance component is
(Example)
connected to the output terminal, and generation of back-EMF at the
OUTPUT PIN
start-up and when output is turned OFF is assumed, it is requested
to insert a protection diode.
20. We are certain that examples of applied circuit diagrams are recommendable,
but you are requested to thoroughly confirm the characteristics before using the IC.
In addition, when the IC is used with the external circuit changed, decide the IC with sufficient margin provided
while consideration is being given not only to static characteristics but also variations of external parts and our IC including
transient characteristics.
8/10
●POWER DISSIPATION
◎SOP8(BD3537F)
[mW]
700
Power Dissipation [Pd]
600
(1) 690mW
(1) 70mm×70mm×1.6mm Glass-epoxy PCB
θj-c=181℃/W
(2) With no heat sink
θj-a=222℃/W
500
(2) 560mW
400
100℃
300
200
100
0
0
25
50
75
100
125
150
[℃]
Ambient Temperature [Ta]
●Ordering part number
B
D
3
5
3
7
F
Package Type
Part Number
E
―
2
E2 Emboss tape reel Pin 1 opposite draw-out side
・F : SOP8
・BD3537
SOP8
<Dimension>
<Tape and Reel information>
1
4
1234
1234
1234
1Pin
1234
(Unit:mm)
1234
Reel
1234
1234
1.27
0.4±0.1
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
0.15±0.1
0.1
1234
1.5±0.1
0.11
6.2±0.3
4.4±0.2
0.3Min.
5
Embossed carrier tape
2500pcs
Direction
of feed
5.0±0.2
8
Tape
Quantity
Direction of feed
※When you order , please order in times the amount of package quantity.
9/10
10/10
Catalog No.08T425A '08.10 ROHM ©
Appendix
Notes
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CO.,LTD.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account when
designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples of
application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or
exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility
whatsoever for any dispute arising from the use of such technical information.
The Products specified in this document are intended to be used with general-use electronic equipment or
devices (such as audio visual equipment, office-automation equipment, communication devices, electronic
appliances and amusement devices).
The Products are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or
malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as
derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your
use of any Product outside of the prescribed scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or system
which requires an extremely high level of reliability the failure or malfunction of which may result in a direct
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responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended
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Appendix1-Rev3.0