BLF645 Broadband power LDMOS transistor Rev. 01 — 27 January 2010 Product data sheet 1. Product profile 1.1 General description A 100 W LDMOS RF power push-pull transistor for broadcast transmitter and industrial applications. The transistor is suitable for the frequency range HF to 1400 MHz. The excellent ruggedness and broadband performance of this device makes it ideal for digital applications. Table 1. Typical performance RF performance at Th = 25 °C in a common source test circuit. Mode of operation f VDS PL PL(PEP) Gp ηD IMD (MHz) (V) (W) (W) (dB) (%) (dBc) CW, class-AB 1300 32 100 - 18 56 - 2-tone, class-AB 1300 32 - 100 18 45 −32 1.2 Features CW performance at 1300 MHz, a drain-source voltage VDS of 32 V and a quiescent drain current IDq = 0.9 A for total device: Average output power = 100 W Power gain = 18 dB Drain efficiency = 56 % 2-tone performance at 1300 MHz, a drain-source voltage VDS of 32 V and a quiescent drain current IDq = 0.9 A for total device: Peak envelope load power = 100 W Power gain = 18 dB Drain efficiency = 45 % Intermodulation distortion = −32 dBc Integrated ESD protection Excellent ruggedness High power gain High efficiency Excellent reliability Easy power control Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS) BLF645 NXP Semiconductors Broadband power LDMOS transistor 1.3 Applications Communication transmitter applications in the HF to 1400 MHz frequency range Industrial applications in the HF to 1400 MHz frequency range 2. Pinning information Table 2. Pinning Pin Description 1 drain 1 2 drain 2 3 gate 1 4 gate2 5 source Simplified outline 1 Graphic symbol 1 2 5 3 3 5 4 4 [1] 2 sym117 [1] Connected to flange. 3. Ordering information Table 3. Ordering information Type number BLF645 Package Name Description Version - flanged balanced LDMOST ceramic package; 2 mounting holes; 4 leads SOT540A 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS Conditions Min Max Unit drain-source voltage - 65 V VGS gate-source voltage −0.5 +11 V ID drain current - 32 A Tstg storage temperature −65 +150 °C Tj junction temperature - 200 °C 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Rth(j-c) [1] Conditions thermal resistance from junction to case Tcase = 80 °C; PL = 100 W Unit 0.67 K/W Rth(j-c) is measured under RF conditions. BLF645_1 Product data sheet Typ [1] © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 2 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor 6. Characteristics Table 6. Characteristics per section Tj = 25 °C per section; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 0.9 mA 65 - - V VGS(th) gate-source threshold voltage VDS = 32 V; ID = 90 mA 1.4 1.9 2.4 V VGSq gate-source quiescent voltage VDS = 32 V; IDq = 450 mA 1.5 2.0 2.5 V IDSS drain leakage current VGS = 0 V; VDS = 32 V - - 1.4 μA IDSX drain cut-off current VGS = VGS(th) + 3.75 V; VDS = 10 V - 14 - A IGSS gate leakage current VGS = ±10 V; VDS = 0 V - - 120 nA gfs forward transconductance VDS = 10 V; ID = 4.5 A - 6.4 - S RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V; ID = 3.15 A - 220 - mΩ Ciss input capacitance VGS = 0 V; VDS = 32 V; f = 1 MHz - 69 - pF Coss output capacitance VGS = 0 V; VDS = 32 V; f = 1 MHz - 25 - pF Crs feedback capacitance VGS = 0 V; VDS = 32 V; f = 1 MHz - 1.2 - pF 7. Application information Table 7. RF performance in a common-source class-AB circuit Th = 25 °C; IDq = 0.9 A for total device. Mode of operation CW, class-AB f VDS PL Gp ηD (MHz) (V) (W) (dB) (%) 1300 32 100 > 16.5 > 53 7.1 Ruggedness in class-AB operation The BLF645 is capable of withstanding a load mismatch corresponding to VSWR = 10 : 1 through all phases under the following conditions: VDS = 32 V; f = 1300 MHz at rated load power. BLF645_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 3 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor 8. Test information 8.1 RF performance The following figures are measured in a class-AB production test circuit. 8.1.1 1-Tone CW 001aal361 20 Gp (dB) Gp 19 70 ηD (%) Gp (dB) 60 001aal362 20 19 18 18 (7) (6) (5) (4) (3) (2) (1) 50 ηD 17 17 40 16 30 15 20 14 10 16 15 13 0 40 80 14 13 12 0 160 120 0 40 80 120 160 PL (W) PL (W) VDS = 32 V; IDq = 900 mA (for total device); f = 1300 MHz. VDS = 32 V; f = 1300 MHz. (1) IDq = 200 mA (for total device). (2) IDq = 400 mA (for total device). (3) IDq = 600 mA (for total device). (4) IDq = 900 mA (for total device). (5) IDq = 1200 mA (for total device). (6) IDq = 1400 mA (for total device). (7) IDq = 1800 mA (for total device). Fig 1. Power gain and drain efficiency as function of load power; typical values Fig 2. Power gain as a function of load power; typical values BLF645_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 4 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor 001aal363 55 PL (dBm) ideal PL 53 (2) (1) 51 PL 49 47 45 27 29 31 33 35 37 Pi (dBm) VDS = 32 V; IDq = 900 mA (for total device); f = 1300 MHz. (1) PL(1dB) = 50.5 dBm (112 W). (2) PL(3dB) = 51.5 dBm (141 W). Fig 3. Load power as function of input power; typical values BLF645_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 5 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor 8.1.2 2-Tone CW 001aal364 20 ηD (%) Gp (dB) 19 001aal365 0 60 IMD3 (dBc) 50 −10 40 −20 30 −30 Gp 18 ηD 17 16 20 −40 15 10 −50 14 0 40 80 0 120 160 PL(PEP) (W) VDS = 32 V; IDq = 900 mA (for total device); f = 1300 MHz; carrier spacing = 100 kHz. −60 (1) (2) (3) (4) (5) (6) (7) 0 40 80 120 160 200 PL(PEP) (W) VDS = 32 V; f = 1300 MHz; carrier spacing = 100 kHz. (1) IDq = 200 mA (for total device). (2) IDq = 400 mA (for total device). (3) IDq = 600 mA (for total device). (4) IDq = 900 mA (for total device). (5) IDq = 1200 mA (for total device). (6) IDq = 1400 mA (for total device). (7) IDq = 1800 mA (for total device). Fig 4. Power gain and drain efficiency as function of peak envelope load power; typical values Fig 5. Third order intermodulation distortion as a function of peak envelope load power; typical values BLF645_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 6 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor 8.2 Reliability 001aal366 105 Years (1) (2) (3) (4) (5) (6) 104 103 102 (7) (8) (9) (10) (11) 10 1 0 4 8 12 16 20 IDS(DC) (A) TTF (0.1 % failure fraction). (1) Tj = 100 °C. (2) Tj = 110 °C. (3) Tj = 120 °C. (4) Tj = 130 °C. (5) Tj = 140 °C. (6) Tj = 150 °C. (7) Tj = 160 °C. (8) Tj = 170 °C. (9) Tj = 180 °C. (10) Tj = 190 °C. (11) Tj = 200 °C. Fig 6. BLF645 electromigration (IDS(DC), total device) BLF645_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 7 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor 8.3 Test circuit VDD C15 VGG C13 C4 R3 T2 C2 IN 50 Ω C1 R1 L6 C6 C8 L3 L4 L8 C9 L1 L10 L12 C10 L14 C17 OUT 50 Ω L13 L5 C7 R2 R5 C11 L7 L9 L11 C12 C3 R4 L2 R6 T1 C5 C14 VGG C16 VDD 001aal367 See Table 8 for a list of components. Fig 7. Class-AB common-source production test circuit + C4 C15 C13 R3 T2 R5 C2 C1 C6 R1 C9 C8 C3 L1 C11 C17 C10 R2 C7 C12 L2 R6 T1 C14 R4 C5 BLF645 INPUT REVZ NXP BLF645 OUTPUT REVZ NXP + C16 001aal368 See Table 8 for a list of components. Fig 8. Component layout for class-AB production test circuit BLF645_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 8 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor Table 8. List of components For test circuit, see Figure 7 and Figure 8. Component Description Value Remarks multilayer ceramic chip capacitor 47 pF [1] C6, C7, C11, C12, multilayer ceramic chip capacitor C17 27 pF [2] C2, C3 multilayer ceramic chip capacitor 100 nF Murata X7R or equivalent C4, C5, C13, C14 multilayer ceramic chip capacitor 4.7 μF TDK C4532X7R1E475MT020U or capacitor of same quality. C8 multilayer ceramic chip capacitor 1.5 pF [2] C9 multilayer ceramic chip capacitor 3.3 pF [2] C10 multilayer ceramic chip capacitor 6.2 pF [3] C15, C16 electrolytic capacitor 220 μF L1, L2 4 turns, 0.8 mm enameled copper wire D = 3.5 mm; length = 4 mm L3 microstrip - [4] (W × L) 1.67 mm × 19.17 mm - [4] (W × L) 1.9 mm × 23.7 mm - [4] (W × L) 9.6 mm × 17.3 mm (W × L) 9 mm 12 mm C1 L4, L5 L6, L7 microstrip microstrip TDK C4532X7R1E475MT020U or capacitor of same quality. L8, L9 microstrip - [4] L10, L11 microstrip - [4] (W × L) 8.5 mm × 31.0 mm - [4] (W × L) 4.52 mm × 5.0 mm [4] (W × L) 1.67 mm × 21.67 mm L12, L13 microstrip L14 microstrip - R1, R2 SMD resistor 11 Ω 1206 R3, R4 SMD resistor 1 kΩ 1206 R5, R6 SMD resistor 12 Ω 1206 T1, T2 semi rigid coax Z = 50 Ω; length = 34 mm [1] American technical ceramics type 100A or capacitor of same quality. [2] American technical ceramics type 100B or capacitor of same quality. [3] American technical ceramics type 180R or capacitor of same quality. [4] Printed-Circuit Board (PCB): Taconic RF35; εr = 3.5 F/m; height = 0.79 mm; Cu (top/bottom metallization); thickness copper plating = 35 μm. BLF645_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 9 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor 9. Package outline Flanged balanced LDMOST ceramic package; 2 mounting holes; 4 leads SOT540A D A F D1 U1 B q C w2 M C M H1 1 H c 2 E1 p U2 5 3 A E w1 M A M B M 4 w3 M b Q e 0 5 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c mm 5.77 5.00 8.51 8.26 0.15 0.10 inches D D1 e E E1 10.26 10.31 22.05 22.05 10.21 10.06 10.01 21.64 21.64 H F 1.78 1.52 H1 15.75 18.72 14.73 18.47 p Q q U1 U2 w1 w2 w3 3.38 3.12 2.72 2.46 27.94 34.16 33.91 9.91 9.65 0.25 0.51 0.25 0.227 0.335 0.006 0.868 0.868 0.404 0.406 0.070 0.620 0.737 0.133 0.107 1.345 0.390 1.100 0.010 0.020 0.010 0.402 0.197 0.325 0.004 0.852 0.852 0.396 0.394 0.060 0.580 0.727 0.123 0.097 1.335 0.380 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 99-08-27 99-12-28 SOT540A Fig 9. Package outline SOT540A BLF645_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 10 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor 10. Abbreviations Table 9. Abbreviations Acronym Description CW Continuous Waveform DC Direct Current D-MOS Diffusion Metal-Oxide Semiconductor ESD ElectroStatic Discharge HF High Frequency LDMOS Laterally Diffused Metal Oxide Semiconductor LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor RF Radio Frequency SMD Surface-Mount Device VSWR Voltage Standing-Wave Ratio 11. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes BLF645_1 20100127 Product data sheet - - BLF645_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 11 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 12.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BLF645_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 12 of 13 BLF645 NXP Semiconductors Broadband power LDMOS transistor 14. Contents 1 1.1 1.2 1.3 2 3 4 5 6 7 7.1 8 8.1 8.1.1 8.1.2 8.2 8.3 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Application information. . . . . . . . . . . . . . . . . . . 3 Ruggedness in class-AB operation . . . . . . . . . 3 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 4 RF performance . . . . . . . . . . . . . . . . . . . . . . . . 4 1-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 27 January 2010 Document identifier: BLF645_1