BLF6G10S-45 Power LDMOS transistor Rev. 03 — 20 January 2010 Product data sheet 1. Product profile 1.1 General description 45 W LDMOS power transistor for base station applications at frequencies from 700 MHz to 1000 MHz. Table 1. Typical performance RF performance at Tcase = 25 °C in a common source class-AB production test circuit. Mode of operation f VDS PL(AV) Gp ηD ACPR (MHz) (V) (W) (dB) (%) (dBc) 2-carrier W-CDMA 920 to 960 28 1.0 23 8 −48.5[1] [1] Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier; carrier spacing 5 MHz. CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. 1.2 Features Typical 2-carrier W-CDMA performance at frequencies of 920 MHz and 960 MHz, a supply voltage of 28 V and an IDq of 350 mA: Average output power = 1.0 W Gain = 23 dB Efficiency = 8 % ACPR = −48.5 dBc Easy power control Integrated ESD protection Excellent ruggedness High efficiency Excellent thermal stability Designed for broadband operation (700 MHz to 1000 MHz) Internally matched for ease of use Compliant to Directive 2002/95/EC, regarding restriction of hazardous substances (RoHS) BLF6G10S-45 NXP Semiconductors Power LDMOS transistor 1.3 Applications RF power amplifiers for W-CDMA base stations and multi carrier applications in the 700 MHz to 1000 MHz frequency range. 2. Pinning information Table 2. Pinning Pin Description 1 drain 2 gate 3 source Simplified outline Symbol 1 [1] 1 3 2 3 2 sym112 [1] Connected to flange. 3. Ordering information Table 3. Ordering information Type number Package Name Description Version BLF6G10S-45 - ceramic earless flanged package; 2 leads SOT608B 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage - 65 V VGS gate-source voltage −0.5 +13 V ID drain current - 13 A Tstg storage temperature −65 +150 °C Tj junction temperature - 225 °C 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Typ Unit Rth(j-case) thermal resistance from junction to case Tcase = 80 °C; PL = 12.5 W 1.7 K/W BLF6G10S-45_3 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 03 — 20 January 2010 2 of 10 BLF6G10S-45 NXP Semiconductors Power LDMOS transistor 6. Characteristics Table 6. Characteristics Tj = 25 °C per section; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 0.5 mA 65 - - V VGS(th) gate-source threshold voltage VDS = 10 V; ID = 72 mA 1.35 1.9 2.35 V VGSq gate-source quiescent voltage VDS = 28 V; ID = 430 mA 1.7 2.15 2.7 V IDSS drain leakage current VGS = 0 V; VDS = 28 V - - 1.4 μA IDSX drain cut-off current VGS = VGS(th) + 3.75 V; VDS = 10 V - 12.5 - A IGSS gate leakage current VGS = 11 V; VDS = 0 V - - 140 nA gfs forward transconductance VDS = 10 V; ID = 3.6 A - 5 - S RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V; ID = 2.52 A - 0.2 - Ω 7. Application information Table 7. Application information Mode of operation: 2-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test model 1; 1-64 PDPCH; f1 = 922.5 MHz; f2 = 927.5 MHz; f3 = 952.5 MHz; f4 = 957.5 MHz; RF performance at VDS = 28 V; IDq = 350 mA; Tcase = 25 °C; unless otherwise specified; in a class-AB production test circuit. Symbol Parameter Conditions Min Typ Max Unit Gp power gain PL(AV) = 1.0 W 21.8 23 24.5 dB RLin input return loss PL(AV) = 1.0 W 5.5 9 - dB ηD drain efficiency PL(AV) = 1.0 W 7 8 - % ACPR adjacent channel power ratio PL(AV) = 1.0 W - −48.5 −45.5 dBc 7.1 Ruggedness in class-AB operation The BLF6G10S-45 is capable of withstanding a load mismatch corresponding to VSWR = 10 : 1 through all phases under the following conditions: VDS = 28 V; IDq = 350 mA; PL = 35 W (CW); f = 960 MHz. BLF6G10S-45_3 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 03 — 20 January 2010 3 of 10 BLF6G10S-45 NXP Semiconductors Power LDMOS transistor 001aaf991 25 Gp (dB) ηD 23 75 ηD (%) 60 21 Gp 45 19 30 17 15 0 50 15 0 10 20 30 40 PL (W) VDS = 28 V; IDq = 350 mA; f = 960 MHz. Fig 1. One-tone CW power gain and drain efficiency as functions of load power; typical values 001aaf992 25 Gp (dB) ηD ηD (%) 55 23 001aaf993 0 70 IMD (dBc) IMD3 IMD5 −30 40 21 Gp IMD7 25 19 −60 10 17 15 0 20 40 −5 60 80 PL(PEP) (W) −90 VDS = 28 V; IDq = 350 mA; f1 = 960 MHz; f2 = 960.1 MHz. Fig 2. 0 40 60 80 PL(PEP) (W) VDS = 28 V; IDq = 350 mA; f1 = 960 MHz; f2 = 960.1 MHz. Two-tone CW power gain and drain efficiency as functions of peak envelope load power; typical values Fig 3. Intermodulation distortion as a function of peak envelope load power; typical values BLF6G10S-45_3 Product data sheet 20 © NXP B.V. 2010. All rights reserved. Rev. 03 — 20 January 2010 4 of 10 BLF6G10S-45 NXP Semiconductors Power LDMOS transistor 001aaf994 25 Gp (dB) ηD (%) Gp (1) (2) ACPR (dBc) 12 −45 8 −50 4 −55 0 32 36 PL(AV) (dBm) −60 23 001aaf997 −40 16 (1) (2) (1) 21 (2) ηD 19 17 20 24 28 VDS = 28 V; IDq = 350 mA; f1 = 952.5 MHz; f2 = 957.5 MHz; carrier spacing 5 MHz. 20 24 28 32 36 PL(AV) (dBm) VDS = 28 V; IDq = 350 mA; carrier spacing 5 MHz. (1) f = 955 MHz. (1) f = 955 MHz. (2) f = 925 MHz. (2) f = 925 MHz. Fig 4. 2-carrier W-CDMA power gain and drain efficiency as functions of average load power; typical values Fig 5. 2-carrier W-CDMA adjacent channel power ratio as function of average load power; typical values 8. Test information C11 VGS C10 VDS C12 C9 C15 C13 C14 R1 R3 C16 R2 F1 input 50 Ω C8 C1 C7 C2 output 50 Ω C3 C4 C6 Fig 6. 001aaf995 Test circuit for operation at 900 MHz BLF6G10S-45_3 Product data sheet C5 © NXP B.V. 2010. All rights reserved. Rev. 03 — 20 January 2010 5 of 10 BLF6G10S-45 NXP Semiconductors Power LDMOS transistor − + F1 R2 C16 C10 C12 C13 C9 C11 C15 R1 C1 C8 C14 C2 C3 C6 C7 C4 C5 BLF6G10S-45 BLF6G10S-45 INPUTBOARD TP OUTPUTBOARD TP 001aaf996 The striplines are on a double copper-clad Taconic RF35 Printed-Circuit Board (PCB) with εr = 3.5 and thickness = 0.76 mm. See Table 8 for list of components. Fig 7. Component layout for 920 MHz and 960 MHz test circuit for 2-carrier W-CDMA Table 8. List of components (see Figure 6 and Figure 7). All capacitors should be soldered vertically. Component Description Value C1 multilayer ceramic chip capacitor 3.0 pF [1] C2 multilayer ceramic chip capacitor 1 pF [1] C3 multilayer ceramic chip capacitor 6.2 pF [1] C4 multilayer ceramic chip capacitor 1.8 pF [1] C5 multilayer ceramic chip capacitor 1.0 pF [1] C6 multilayer ceramic chip capacitor 6.8 pF [1] C7 multilayer ceramic chip capacitor 6.8 pF [1] C8, C11, C14 multilayer ceramic chip capacitor 68 pF [1] C9, C10, C12, C13 multilayer ceramic chip capacitor 330 nF; 50 V C15 multilayer ceramic chip capacitor 4.5 μF; 50 V C16 Electrolytic capacitor 220 μF F1 Ferrite SMD bead - Q3 BLF6G10S-45 - R1 SMD resistor 4.7 Ω; 0.1 W R2 SMD resistor 6.8 Ω; 0.1 W [2] [2] [1] American Technical Ceramics type 100B or capacitor of same quality. [2] TDK or capacitor of same quality. BLF6G10S-45_3 Product data sheet Remarks Ferroxcube BDS 3/3/8.9-4S2 or equivalent © NXP B.V. 2010. All rights reserved. Rev. 03 — 20 January 2010 6 of 10 BLF6G10S-45 NXP Semiconductors Power LDMOS transistor 9. Package outline Ceramic earless flanged package; 2 leads SOT608B D A F 3 D1 A U1 c 1 U2 H E E1 2 w1 b A Q 0 5 mm scale DIMENSIONS (mm dimensions are derived from the original inch dimensions) UNIT A b c mm 4.62 3.76 7.24 6.99 0.15 0.10 inch 0.182 0.285 0.006 0.402 0.405 0.402 0.405 0.045 0.620 0.067 0.403 0.403 0.020 0.148 0.275 0.004 0.394 0.395 0.394 0.395 0.035 0.580 0.057 0.393 0.393 OUTLINE VERSION D D1 E E1 10.21 10.29 10.21 10.29 10.01 10.03 10.01 10.03 F H Q 1.14 0.89 15.75 14.73 1.70 1.45 U1 10.24 10.24 9.98 9.98 REFERENCES IEC JEDEC JEITA w1 0.51 EUROPEAN PROJECTION ISSUE DATE 06-12-06 09-08-26 SOT608B Fig 8. U2 Package outline SOT608B BLF6G10S-45_3 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 03 — 20 January 2010 7 of 10 BLF6G10S-45 NXP Semiconductors Power LDMOS transistor 10. Abbreviations Table 9. Abbreviations Acronym Description 3GPP 3rd Generation Partnership Project CCDF Complementary Cumulative Distribution Function CW Continuous Waveform DPCH Dedicated Physical CHannel LDMOS Laterally Diffused Metal Oxide Semiconductor PAR Peak-to-Average power Ratio PDPCH transmission Power of the Dedicated Physical CHannel RF Radio Frequency SMD Surface-Mount Device VSWR Voltage Standing-Wave Ratio W-CDMA Wideband Code Division Multiple Access 11. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes BLF6G10S-45_3 20100120 Product data sheet - BLF6G10S-45_2 Modifications: • • • • Section 1.1 “General description” lower frequency range extended to 700 MHz from 800 MHz. Section 1.2 “Features” lower frequency range extended to 700 MHz from 800 MHz. Section 1.3 “Applications” lower frequency range extended to 700 MHz from 800 MHz. Section 12 “Legal information” export control disclaimer added. BLF6G10S-45_2 20090210 Product data sheet - BLF6G10S-45_1 BLF6G10S-45_1 20070223 Preliminary data sheet - - BLF6G10S-45_3 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 03 — 20 January 2010 8 of 10 BLF6G10S-45 NXP Semiconductors Power LDMOS transistor 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 12.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BLF6G10S-45_3 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 03 — 20 January 2010 9 of 10 BLF6G10S-45 NXP Semiconductors Power LDMOS transistor 14. Contents 1 1.1 1.2 1.3 2 3 4 5 6 7 7.1 8 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Application information. . . . . . . . . . . . . . . . . . . 3 Ruggedness in class-AB operation . . . . . . . . . 3 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 8 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 9 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 9 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Contact information. . . . . . . . . . . . . . . . . . . . . . 9 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 20 January 2010 Document identifier: BLF6G10S-45_3