LTC2921/LTC2922 Series Power Supply Tracker with Input Monitors U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Tracks Multiple Supplies with MOSFET Switches Monitors 5 Input Voltages Including VCC Guaranteed Threshold Accuracy: ±1% at 0.5V Automatic Remote Sense Switching Adjustable Supply Ramp Rate Overvoltage Monitor Adjustable Electronic Circuit Breaker Adjustable Power-Good Delay Available for VCC Supply Voltages of 5V, 3.3V and 2.5V Available in 16-Pin Narrow SSOP (LTC2921 Series) and 20-Pin TSSOP (LTC2922 Series) U APPLICATIO S ■ ■ ■ ■ ■ Desktop Computers Plug-In Cards Telecom Infrastructure Supply Sequencing Instruments The LTC®2921 and LTC2922 monitor up to five supplies and force them to track on power-up in multiple supply systems. Using external N-channel pass transistors, the supplies can be ramped up at an adjustable rate. Automatic remote sense switching allows the DC/DC converters to compensate for series voltage drops in the wiring. An incorrect level on one or more of the supplies triggers disconnect of all supplies. Tight 1% accuracy and glitch immunity on the low 0.5V monitoring level ensure no false error disconnects. The LTC2921 and LTC2922 each feature an adjustable electronic circuit breaker to protect the VCC supply against short circuits. Capacitance at the TIMER pin programs the delays in the monitoring sequence. The LTC2921 includes three remote sense switches in a 16-pin narrow SSOP package, while the LTC2922 includes five remote sense switches in a 20-pin TSSOP package. Both parts are available for VCC supply voltages of 5V, 3.3V, and 2.5V. , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO Three-Supply Tracker and Monitor (5V, 3.3V, 2.5V) 5V SUPPLY VOUT VFB WSL1206 0.05Ω 100Ω Si2316DS DC/DC CONVERTER VFB Si2316DS 100Ω DC/DC CONVERTER 3.3V LOAD 2.5V SUPPLY 2V/DIV 10Ω 2.5V SUPPLY VOUT Load Voltage Ramp-Up and Power-Good Activation 10Ω 3.3V SUPPLY VOUT 5V LOAD VFB Si2316DS 100Ω DC/DC CONVERTER 5V LOAD 2.5V LOAD 3.3V LOAD OUTPUTS 2V/DIV 2.5V LOAD 10Ω 243k 169k VCC 49.9k Si1012R CBRST 100k 49.9k V1 V2 V3 V4 0.47µF LTC2921 PG S1 S2 S3 PG 2V/DIV 100ms/DIV 5V SUPPLY AT 5V 3.3V SUPPLY AT 3.3V 2921/22 TA01b RESET D1 D2 D3 GND CIRCUIT BREAKER RESET CONTROL 4.7k SENSE GATE TIMER 0.22µF tGATE ~ 500ms tTIMER ~ 130ms 2921/22 TA01 29212fa 1 LTC2921/LTC2922 Series W W U W ABSOLUTE AXI U RATI GS (Note 1) VCC Supply Voltage ...................................... –0.3V to 7V V1, V2, V3, V4 Voltages ............................... –0.3V to 7V SENSE Voltage ............................................ –0.3V to 7V TIMER Voltage ............................. –0.3V to (VCC + 0.3V) Charge Pumped Output Voltages GATE, PG ............................................ –0.3V to 12.2V Switch Voltages S0, D0, S4, D4 (LTC2922 Series) ............ –0.3V to 7V S1, D1, S2, D2, S3, D3 ............................ –0.3V to 7V Switch Currents (DC, RMS) S0, D0, S4, D4 (LTC2922 Series) ..................... 30mA S1, D1, S2, D2, S3, D3 ..................................... 30mA Operating Ambient Temperature Range LTC2921C/LTC2922C .............................. 0°C to 70°C LTC2921I/LTC2922I ............................–40°C to 85°C Junction Temperature (Note 2) ............................. 125°C Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C U W U PACKAGE/ORDER I FOR ATIO TOP VIEW V1 1 16 TIMER V2 2 15 VCC V3 3 14 SENSE V4 4 13 GATE S3 5 12 PG D3 6 11 GND S2 7 10 D1 D2 8 9 S1 GN PACKAGE 16-LEAD NARROW PLASTIC SSOP TJMAX = 125°C, θJA = 110°C/W ORDER PART NUMBER LTC2921CGN LTC2921CGN-3.3 LTC2921CGN-2.5 LTC2921IGN LTC2921IGN-3.3 LTC2921IGN-2.5 GN PART MARKING 2921 292133 292125 2921I 921I33 921I25 ORDER PART NUMBER TOP VIEW SO 1 TIMER 2 20 D0 19 VCC V1 3 18 SENSE V2 4 17 GATE V3 5 16 PG V4 6 15 GND S4 7 14 D1 D4 8 13 S1 S3 9 12 D2 D3 10 11 S2 LTC2922CF LTC2922CF-3.3 LTC2922CF-2.5 LTC2922IF LTC2922IF-3.3 LTC2922IF-2.5 F PACKAGE 20-LEAD PLASTIC TSSOP TJMAX = 125°C, θJA = 90°C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V for LTC2921/LTC2922, VCC = 3.3V for LTC2921-3.3/LTC2922-3.3, and VCC = 2.5V for LTC2921-2.5/LTC2922-2.5, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Supply Voltage Typical Operating Range LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 4.50 2.97 2.37 5.00 3.30 2.50 5.50 3.63 2.63 V V V Supply Pin VCC ICC Supply Current VCC(MON) Supply Monitor Threshold Voltage LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 ● ● ● 4.285 2.828 2.265 4.350 2.871 2.300 2 4.415 2.914 2.335 mA V V V VCC(OV) Supply Overvoltage Threshold LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 ● ● ● 5.82 3.84 3.08 6.13 4.04 3.24 6.43 4.24 3.40 V V V 29212fa 2 LTC2921/LTC2922 Series ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V for LTC2921/LTC2922, VCC = 3.3V for LTC2921-3.3/LTC2922-3.3, and VCC = 2.5V for LTC2921-2.5/LTC2922-2.5, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VCC(UVLO) Supply Undervoltage Lockout VCC Rising VCC(UVH) Supply Undervoltage Hysteresis VCC Falling ● MIN TYP MAX 2.08 2.20 2.30 UNITS V 120 mV Electronic Circuit Breaker ∆VSENSE Circuit Breaker Trip Voltage ISENSE SENSE Pin Input Current tV1(DLY) Circuit Breaker Trip Delay Time tV1(RST) VV1(RST) Circuit Breaker Reset Pulse Width ∆VSENSE = VCC - VSENSE ● VCC - VSENSE = 150mV LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 Guaranteed Not to Reset Guaranteed to Reset Circuit Breaker Reset Threshold Voltage 45 0.5 0.5 0.5 50 55 mV 150 500 nA 1.5 1.5 1.5 3.0 3.0 6.0 µs µs µs 50 µs µs ● ● 150 ● 0.490 0.500 0.510 V ● 0.495 0.492 0.500 0.500 0.505 0.508 V V ● 0.665 0.700 0.735 V ±0.1 µA Monitor Inputs VMON V1-V4 Monitor Threshold Voltages VOV V1-V4 Overvoltage Thresholds IMON V1-V4 Input Currents TIMER Pin VTIMER(TH) TIMER Ramp Threshold Voltage ● 1.15 1.20 1.25 V ITIMER(PU) TIMER Pull-Up Current VTIMER = 1V ITIMER(PD) TIMER Pull-Down Current VCC = 2.35V, VTIMER = 0.4V ● –1.3 –2.0 –2.5 µA VTIMER(CLR) TIMER Cleared Threshold Voltage VTIMER Falling VGATE GATE Drive Output Voltage LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 ● ● ● IGATE(PU) GATE Pull-Up Current VGATE = VCC ● IGATE(PD) GATE Pull-Down Current VCC = 2.35V, VGATE = 2.35V µA 100 150 250 mV 10.0 8.4 6.1 11.1 9.1 6.8 12.2 9.8 7.5 V V V –6.5 –10.0 –12.5 µA GATE Pin 10 mA Remote Sense Switches RDS(FB) Feedback Switch Resistances (Note 3) VD = VCC ● ● 2 10 –4.0 –5.0 Ω PG Pin IPG(PU) PG Pull-Up Current VPG = VCC IPG(PD) PG Pull-Down Current VCC = 2.35V, VPG = 2.35V VPG(OL) PG Output Low Voltage VCC = 2.35V, IPG = 5mA ● VPG PG Output Voltage (Note 4) LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 ● ● ● Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD as follows: LTC2921 Series: TJ = TA + (PD • 110°C/W) LTC2922 Series: TJ = TA + (PD • 90°C/W) –2.6 µA 10 10.0 8.4 6.1 mA 11.1 9.1 6.8 0.4 V 12.2 9.8 7.5 V V V Note 3: This specification applies to all switches, and is measured with VS < VD. Note 4: The PG pin will rise to approximately the same voltage as the GATE pin when not pulled up or pulled down by external resistance. 29212fa 3 LTC2921/LTC2922 Series U W TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted. Supply Current vs Supply Voltage 3.00 Monitor Trip Delay vs Monitor Input Overdrive Supply Current vs Temperature 2.6 PG SIGNAL ASSERTED 100 PG SIGNAL ASSERTED 2.4 LTC2921 LTC2922 LTC2921-3.3 LTC2922-3.3 2.00 LTC2921 LTC2922 ICC (mA) ICC (mA) 2.50 2.25 LTC2921-2.5 LTC2922-2.5 MONITOR TRIP DELAY (µs) 2.75 LTC2921-3.3 LTC2922-3.3 2.2 LTC2921-2.5 LTC2922-2.5 2.0 1.75 1.50 1.8 –50 –30 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) 80 60 LTC2921-2.5 LTC2922-2.5 40 LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 20 0 30 50 –10 10 TEMPERATURE (°C) 70 90 80 40 100 120 60 20 MONITOR INPUT OVERDRIVE (mV) 0 2921/2 G03 2921/2 G02 2921/2 G01 Monitor Input Threshold vs Temperature SENSE Input Current vs Temperature Circuit Breaker Trip Voltage vs Temperature 0.505 140 250 55 0.500 ISENSE (nA) 200 BREAKER TRIP (mV) MONITOR INPUT THRESHOLD (V) VSENSE = VCC 50 150 100 50 0.495 –50 –30 30 –10 10 50 TEMPERATURE (°C) 70 45 –50 90 –30 30 10 –10 50 TEMPERATURE (°C) 2921/2 G04 0 –50 90 30 –10 10 50 TEMPERATURE (°C) 2.5 1.21 2.4 90 TIMER Pull-Down Current vs Supply Voltage 170 VTIMER = 1V PULL-DOWN CURRENT (µA) 2.3 2.2 CURRENT (µA) 70 2921/2 G06 TIMER Pull-Up Current vs Temperature 1.20 –30 2921/2 G05 TIMER Trip Voltage vs Temperature TIMER TRIP VOLTAGE (V) 70 2.1 2.0 1.9 1.8 1.7 VTIMER = 0.4V 165 160 155 150 145 1.6 1.19 –50 –30 30 –10 10 50 TEMPERATURE (°C) 70 90 1.5 –50 –30 –10 10 30 50 70 90 TEMPERATURE (°C) 2921/2 G07 2921/2 G08 140 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) 2921/2 G09 29212fa 4 LTC2921/LTC2922 Series U W TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted. Gate Voltage vs Supply Voltage LTC2921-3.3 LTC2922-3.3 LTC2921-2.5 LTC2922-2.5 10 LTC2921-3.3 LTC2922-3.3 9 8 GATE LOAD = 1000pF || 10MΩ PG LOAD = 2kΩ TO VCC VCC BYPASS CAP = 1µF LTC2921-2.5 LTC2922-2.5 7 6 6 –50 –30 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) 30 50 –10 10 TEMPERATURE (°C) 2921/2 G10 9 7 70 90 2921/2 G13 0 1 2 3 4 5 6 7 8 LOAD CURRENT (µA) 9 10 PG Pull-Up Current vs Temperature 5.5 VPG = VCC 5.0 LTC2921-3.3 LTC2922-3.3 8 9.0 GATE LOAD = 1000pF || 10MΩ PG LOAD = 2kΩ TO VCC VCC BYPASS CAP = 1µF 2921/2 G12 CURRENT (µA) PG (V) CURRENT (µA) 10.5 30 50 –10 10 TEMPERATURE (°C) 0 90 GATE LOAD = 1000pF || 10MΩ PG LOAD = 1000pF || 10MΩ 11 VCC BYPASS CAP = 1µF LTC2921 LTC2922 10 11.0 8.5 –50 –30 4 2 12 VGATE = VCC 9.5 LTC2921-2.5 LTC2922-2.5 6 PG Voltage vs Supply Voltage 10.0 LTC2921-3.3 LTC2922-3.3 8 2921/2 G11 GATE Pull-Up Current vs Temperature 11.5 70 LTC2921 LTC2922 10 LTC2921 LTC2922 GATE VOLTAGE (V) 9 7 12 11 GATE VOLTAGE (V) GATE VOLTAGE (V) 12 GATE LOAD = 1000pF || 10MΩ PG LOAD = 2kΩ TO VCC 11 VCC BYPASS CAP = 1µF LTC2921 LTC2922 10 8 Gate Voltage vs Load Current Gate Voltage vs Temperature 12 LTC2921-2.5 LTC2922-2.5 4.5 4.0 3.5 3.0 6 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) 2921/2 G14 2.5 –50 –30 30 50 –10 10 TEMPERATURE (°C) 70 90 2921/2 G15 29212fa 5 LTC2921/LTC2922 Series U U U PI FU CTIO S (LTC2921/LTC2922 or [LTC2922 Only]) S0, D0 (Pins 1, 20 [LTC2922]): Remote Switch 0. These pins are the terminals of an internal N-channel FET switch that is enabled after the GATE pin is fully ramped up. This switch can be used to connect a remote sense line to compensate for IR drop across the external FETs. The gate of the internal switch ramps up at a nominal rate of 8V/ms. The pins are interchangeable, either switch pin can be tied to the load side. Tie both pins to ground if unused. S4, D4 (Pins 7, 8 [LTC2922]): Remote Sense Switch 4. Tie to GND if unused. S3, D3 (Pins 5, 6/Pins 9, 10): Remote Sense Switch 3. Tie to GND if unused. S2, D2 (Pins 7, 8/Pins 11, 12): Remote Sense Switch 2. Tie to GND if unused. S1, D1 (Pins 9, 10/Pins 13, 14): Remote Sense Switch 1. Tie to GND if unused. TIMER (Pin 16/Pin 2): Timing Delay Input. Connect a capacitor between this pin and ground to set a 600ms/µF delay at two points in the monitoring sequence. This sets the delay after all monitors are good, before the start of GATE ramping, and the delay after the remote sense switches are on, before PG is activated. TIMER must fall below 150mV before a timing delay can start. The TIMER pin is pulled to ground at other points in the sequence. V1-V4 (Pins 1-4/Pins 3-6): Supply Monitor Inputs. All four inputs must lie above the monitor threshold level (0.5V) and below the monitor overvoltage level (0.7V) for a turnon sequence to commence or continue. When any monitor input falls outside those levels, the GATE and PG pins are pulled low, disconnecting all the loads. Glitch filtering on the 0.5V monitor threshold prevents low-energy voltage spikes from affecting the comparators’ results. V1 also serves as an active-low reset pin for the circuit breaker. Tie unused monitor inputs to used monitor inputs. GND (Pin 11/Pin 15): Circuit Ground. PG (Pin 12/Pin 16): Power Good Output. A 4µA current source from the internal charge pump rail (VPUMP) pulls PG up after the turn-on sequence is complete. The output is pulled to ground before turn-on is complete, when any monitor is out of compliance, when the circuit breaker trips, and when VCC is undervoltage. An external resistor can be added to pull up to a lower voltage and to improve pull up speed. This pin can also be configured as a gate drive for external N-channel FETs in sequencing applications. In applications not requiring the PG output, leave the pin unconnected. GATE (Pin 13/Pin 17): Gate Drive for External N-Channel FETs. A 10µA current source from the internal charge pump rail (VPUMP) ramps the gates of the external Nchannel MOSFETs forcing all supplies to track on. The resistor and capacitor network from this pin to ground sets the supplies’ ramp rate and enhances control loop stability. SENSE (Pin 14/Pin 18): Circuit Breaker Sense Input. An external resistor between VCC and SENSE sets the electronic circuit breaker trip current. The breaker trips when the voltage across the resistor exceeds 50mV for 1µs. To disable the circuit breaker tie SENSE to VCC. To reset the circuit breaker after the current falls below the trip point, pull the V1 pin below 0.5V for >150µs or go into undervoltage lockout for >10µs. VCC (Pin 15/Pin 19): Supply Voltage. The voltage at VCC is monitored through an internal resistive divider in a manner similar to the V1-V4 inputs. An undervoltage lockout circuit disables the part until the voltage at VCC is greater than 2.2V. The VCC pin must be connected to the highest supply voltage. Bypass the VCC pin to ground with a 10µF capacitor. 29212fa 6 LTC2921/LTC2922 Series W FUNCTIONAL DIAGRA U VPUMP OVERCURRENT – LATCH + SENSE 50mV +– V VCC 4µA PG ENABLE UNDERVOLTAGE – VPUMP OVERVOLTAGE REMOTE SENSE SWITCH GATE + + REMOTE SENSE SWITCH ENABLE MONITOR – – OVERVOLTAGE + + V1 VPUMP MONITOR CONTROL LOGIC – – OVERVOLTAGE + 10µA GATE GATE ENABLE + V2 PG GATE ON + MONITOR VCC – – OVERVOLTAGE 2µA VSWON + + V3 TIMER ENABLE MONITOR + – – V4 TIMER DONE VCC OVERVOLTAGE + + TIMER CIRCUIT BREAKER RESET PULSE TIMER ENABLE MONITOR – + PULSE TIMER DONE 0.7V 0.5V 1.2V + – VPUMP ≈ 11.1V AT VCC =5V APPROXIMATELY 1V VSWON 1.2V 0.7V 0.5V SWITCHES ON + VSWON REFERENCE GENERATOR AND CHARGE PUMP (LTC2922 ONLY) D0 GND S0 (LTC2922 ONLY) D1 D2 D3 (LTC2922 ONLY) D4 2921/22 F01 S1 S2 S3 S4 (LTC2922 ONLY) Figure 1. LTC2921 and LTC2922 Functional Diagram 29212fa 7 U LTC2921/LTC2922 Series U OPERATIO General Operation The LTC2921 and LTC2922 track multiple supplies, monitor multiple inputs, and provide integrated switches for remote sensing. Once all input voltages lie between monitoring and overvoltage threshold levels, in-line FETs are turned on to simultaneously ramp power to the loads. The automatic remote sense switches are then activated, and the power good signal is asserted. After initial power-on the LTC2921 and LTC2922 continue monitoring the inputs. Several types of events will trigger interruption, any of which will disconnect all supplies, deactivate the power good signal, and open the remote sense switches. Monitoring Sequence A normal power-on sequence comprises the following steps: Step 0) Wait for VCC to exceed the undervoltage lockout threshold. Continue checking VCC. Step 1) Confirm that the circuit breaker has not tripped and wait for all monitored supplies, including VCC, to be between their programmed monitor and overvoltage thresholds. Continue checking these conditions. Step 2) Check that the TIMER pin voltage starts below 150mV. Create a delay by ramping up the TIMER pin until it trips an internal comparator. Step 3) Ramp the GATE pin to turn on the external N-channel FETs, simultaneously ramping the supplies into their loads. Await confirmation of full GATE enhancement, i.e., GATE voltage within ~1V of VPUMP. Continue checking this condition. Step 4) Activate the remote sense switches. Await confirmation of full Feedback Switch Gate enhancement. Step 5) Wait again for another TIMER cycle delay. Step 6) Release the pull-down on the PG output. Continue checking VCC, the circuit breaker, the input voltages, and the GATE voltage. Interrupting Events Three events can interrupt the sequence and trigger immediate disconnect of all supplies, pull-down of the PG signal, and deactivation of the remote sense switches. The three interrupting events are a lockout, a fault, and an error. A lockout occurs when VCC falls below the undervoltage threshold (including hysteresis). Escape from lockout requires sufficient VCC voltage. Leaving lockout, the sequence begins at Step 1. A lockout condition supersedes faults and errors. A fault occurs when the circuit breaker trips. Escape from a fault requires pulsing the V1 pin below the reset threshold of 0.5V(nom) for more than 150µs after the current falls below the trip point. When V1 returns high, the sequence begins from Step 1. An undervoltage lockout of >10µs also clears the circuit breaker fault latch. A fault condition supersedes errors. An error occurs when one or more of the monitor inputs (V1-V4 pins) or VCC falls below its monitor threshold, or rises above its overvoltage threshold. A loss of voltage on the GATE pin, once it has fully ramped up, also causes an error. An error sends the sequence to Step 1. Feedback Switches for Remote Sensing The integrated N-channel switches of the LTC2921/ LTC2922 automatically compensate for the voltage drops caused by the RDS(ON) of the external load-control MOSFET switches. This is accomplished by modifying the normal feedback path of each power supply that is controlled by the LTC2921/LTC2922. When the load-control switches are off, the remote sense switches are also off, and the power supply uses its normal feedback path to sense its output voltage. After the load-control switches are turned on, the remote sense switches are turned on to create dominating feedback paths. The feedback loops include the load-control switches, thus compensating for their voltage drops. In order to eliminate glitching on the output of the power supply, the remote sense switches are turned on at a controlled rate of about 8V/ms. The gates of these integrated N-channel devices are pulled up above VCC to VPUMP so as to provide a low-resistance path for a wide range of voltages. 29212fa 8 LTC2921/LTC2922 Series U OPERATIO Electronic Circuit Breaker Placing a resistor between the VCC and SENSE pins allows the part to detect shorts and excessive currents on the VCC supply. The electronic circuit breaker trips when the voltage across the resistor is >50mV for more than 1µs. A trip causes a fault condition which interrupts the monitor sequence, and which requires reset of the circuit breaker latch (see Interrupting Events section). Breaker reset is achieved by pulling V1 below the reset threshold for >150µs after the current falls below the trip point, or by returning from undervoltage lockout on VCC. W UW TI I G DIAGRA S The timing of a typical start-up sequence for the LTC2921/ LTC2922 is shown in Figure 2. VCC exceeds the undervoltage lockout level at time 0. All monitor inputs settle between the 0.5V monitor threshold and the 0.7V overvoltage threshold by time 1, then a TIMER cycle starts. The TIMER pin reaches 1.2V at time 2, and GATE ramping begins. When the GATE ramp completes at time 3, the automatic remote sense switches close. Another TIMER delay begins at time 4 and finishes at time 5, at which time PG is activated. 0 VCC 1 2 3 4 UNDERVOLTAGE LOCKOUT LEVEL 5 The timing of a monitor failure and subsequent regular turn-on is shown in Figure 3. Prior to time 1, a successful turn-on sequence had completed. At time 1, monitor V2 falls below the 0.5V reference, triggering an error. The GATE pin, PG pin, and the remote sense switches fall at rates determined by the pull-down currents and loading conditions of each (times 2, 3, 4). At time 5, monitor V2 recovers, and a normal turn-on sequence begins. VCC SENSE 1 23 4 5 UNDERVOLTAGE LOCKOUT LEVEL VCC VCC SENSE VCC-50mV VCC-50mV V1 V1 0.7V 0.5V V2 V2 V3 V4 0.7V 0.5V 0.7V 0.5V 0.7V 0.5V 0.7V 0.5V V3 0.7V 0.5V V4 0.7V 0.5V 0.7V 0.5V 0.7V 0.5V 1.2V 1.2V TIMER 1.2V 1.2V TIMER GATE GATE VCC REMOTE SENSE SWITCH GATE VCC REMOTE SENSE SWITCH GATE PG PG Figure 2. Typical Start-Up Sequence Figure 3. Monitor Failure and Start-Up Sequence Timing 29212fa 9 LTC2921/LTC2922 Series W UW TI I G DIAGRA S The timing of a circuit breaker trip and reset, and a subsequent regular turn-on are shown in Figure 4. Prior to time 1, a successful turn-on sequence had completed. At time 1, excessive current pulls SENSE more than 50mV below VCC. The GATE pin, PG pin, and the remote sense switches fall at rates determined by the pull-down currents VCC SENSE 1 2 3 4 5 and loading conditions of each (times 2, 3, 4). Note that the excessive current condition ceases at time 4. A circuit breaker reset pulse is initiated at time 5. The latch resets at time 6 since the V1 pulse is wide enough. A normal turnon begins when V1 rises above the monitor threshold (time 7 onward). 6 7 UNDERVOLTAGE LOCKOUT LEVEL VCC VCC VCC-50mV VCC-50mV INTERNAL CIRCUIT BREAKER LATCH V1 0.7V 0.5V V2 0.7V 0.5V V3 0.7V 0.5V V4 0.7V 0.5V 1.2V 1.2V TIMER VCC GATE REMOTE SENSE SWITCH GATE PG Figure 4. Circuit Breaker Trip, Reset and Start-Up Sequence Timing U W U U APPLICATIO S I FOR ATIO Multiple supply systems have become common to accommodate circuits on the same board with different voltage requirements. Desktop PC motherboards, instrumentation circuits and plug-in boards of all kinds often require tracking and control of several supply voltages. The LTC2921 and LTC2922 ramp and monitor up to five supply voltages in such systems. External resistive voltage dividers independently program four monitor levels, while an internal divider sets the VCC pin supply monitor level. Time delays in the monitoring sequence are set by an external capacitor at the TIMER pin. The GATE pin provides a high side drive voltage appropriate to logic-level and sublogic-level N-channel power MOSFETs. The external RC network on GATE programs the supply ramp rate and eliminates possible high frequency oscillations in the power path. Featured in the LTC2921/LTC2922 series are sub-10Ω internal remote sense switches to compensate for voltage drops between the supplies and the loads. At the end of a successful power-on sequence, the LTC2921/ LTC2922 asserts the PG output. A typical application uses an external pull-up resistor between PG and the load side of a supply. In applications where supply power-on sequencing is required, the PG pin can function as a second, separate high side driver. 29212fa 10 LTC2921/LTC2922 Series U U W U APPLICATIO S I FOR ATIO Setting the Supply Monitor Levels RB1(MAX) = The LTC2921 and LTC2922 series both feature low 0.5V monitoring thresholds with tight 1% accuracy. To set a supply monitoring level tightly, design a precision ratio resistive divider to relate the lowest valid supply voltage to the maximum specified monitor threshold voltage. Use resistors with 1% tolerance or better to limit the error due to mismatch. The basic resistive divider connection for supply monitoring is shown in Figure 5. 1 – RTOL VSRC1(MIN) – 0.505V R A1 • • 1 + RTOL 0.505V + 0.1µA • RA1 + VSRC1 VOUT VQ1 – VL1 RB1 RG1 10Ω IMON VFB VV1 RZ1 GND IA1 ±0.1µA RA1 V1 LTC2922 DC/DC CONVERTER CGATE 2921/22 F05 Figure 5. Basic Monitor Connection First, divide the nominal monitor threshold voltage by an acceptable bias current (IA1), and choose a nearby standard value for resistor RA1 (see Equation 1). Next, calculate the bounds on the value of RB1 that guarantee that the divided minimum supply voltage exceeds the maximum specified monitor threshold voltage, and that the minimum specified overvoltage threshold exceeds the divided maximum supply voltage. Use Equations 2 and 3 to calculate RB1(MAX) and RB1(MIN) from RA1, the resistor tolerance (RTOL), the supply voltage, the monitor threshold and overvoltage specifications, and the monitor pin leakage current specification. When the integrated remote sensing switch is closed, the DC/DC converter will compensate for the IR drop from drain to source of the external N-channel FET (VQ1(ON)) by increasing the supply voltage by the same amount. Calculate with VQ1(ON)(MAX) = 0V if the remote sense switch is not used. R A1 = 0.500V IA1 VSRC1(MAX) + VQ1(ON)(MAX) – 0.665V 0.665V – 0.1µA • RA1 RB1(MIN) ≤ RB1 ≤ RB1(MAX) LOAD GATE GND 1 + RTOL RB1(MIN) = RA1 • • 1 – RTOL (3) Choose a standard resistor value for RB1 that satisfies the inequality of Equation 4. Q1 RY1 (2) (1) (4) When several standard values meet the requirement, choose the value closest to RB1(MAX) to set the tightest monitor threshold. This also allows more headroom for larger VQ1(ON)(MAX). Alternatively, choose the standard value closest to RB1(MIN) to set the tightest overvoltage threshold. All four monitor input voltages must be between the monitor threshold and the overvoltage threshold for the turn-on sequence to begin. Connect unneeded monitor input pins to any of the utilized monitor input pins. Selecting the External N-Channel MOSFETs The GATE pin drives the gate of external N-channel MOSFETs above VCC to connect the supplies to the loads. The GATE drive voltage provided by the LTC2921/LTC2922 series is best suited to logic-level and sublogic-level power MOSFETs. To achieve the lowest switch resistance, the VCC pin must be connected to the highest supply voltage. Consider the application requirements for current, turnoff speed, on-resistance, gate-source voltage specification, etc. Refer to the Electrical Specifications and Typical Performance Curves to determine the GATE voltages for given VCC voltages over the required range of conditions. Calculate the minimum gate drive voltage for each monitored supply for use in selecting the FETs. Check the maximum GATE voltage against the FETs’ gate-source 29212fa 11 LTC2921/LTC2922 Series U W U U APPLICATIO S I FOR ATIO voltage specifications. On-resistance is a critical parameter when choosing power MOSFETs. The integrated remote sense switches compensate for IR drops, but minimizing VQ(MAX) leaves more margin for designing the resistive voltage divider for the monitors. VSRC2 CD2 0.1µF (OPT) VSRC1 CD1 0.1µF (OPT) Setting the GATE Ramp Rate Application of power to the loads is controlled by setting the voltage ramping rate with an external capacitor on the GATE pin. During Step 3 of the monitoring sequence, a 10µA pull-up ramps the GATE pin capacitance up to VPUMP, the internal charge pump voltage. Use Equation 5 to calculate the nominal GATE pin capacitance necessary to achieve a given ramp rate, ∆V/∆t: C GATE = 10µA ∆V / ∆t 10µA • tRAMP VGATE CD0 0.1µF (OPT) VL2 RG2 10Ω Q1 VL1 RG1 10Ω Q0 VL0 RG0 10Ω GATE LTC2922 CGATE GND 2921/22 F06 Figure 6. Ramping and Damping Components on GATE Pin (5) Alternatively, to calculate the GATE capacitor to achieve a desired nominal ramp time, use Equation 6. The GATE drive voltage (VGATE) varies with VCC voltage. Consult the Electrical Characteristics table and Typical Performance curves to choose an appropriate value to insert for VGATE. C GATE = VSRC0 Q2 (6) When the GATE pin drives several FETs in parallel, the load voltages ramp together at the same rate until the lowest supply reaches its full value. The other supplies continue to track until the next lowest supply reaches its full value, and so on. The GATE pin must not be forced above the level it reaches when fully ramped. An internal clamp limits the GATE voltage to ≤12.2V relative to ground. Damp possible ramp-on oscillations by including a 10Ω resistor in series with each external N-channel gate, and as necessary, a 0.1µF capacitor on each external N-channel drain, as shown in Figure 6. Setting the Sequence Delay Timer The turn-on sequence includes two programmable delays set by the capacitance on the TIMER pin. More precisely, a single delay value is used at two points in the sequence. In both cases, the delay provides a measure of confidence that conditions are stable enough for the sequence to advance. The first TIMER delay begins once all monitor voltages comply with their thresholds, the electronic circuit breaker has not tripped, and VCC is not undervoltage. The TIMER pin sources 2µA into an external capacitor, which ramps its voltage. A comparator trips when the TIMER pin voltage reaches the internal 1.2V reference, then the GATE ramp begins, and TIMER is pulled to ground. The second TIMER delay begins after the gate of the remote sense switches is fully ramped up. After the TIMER ramp completes, the PG pin is activated. An internal circuit pulls-down the TIMER pin with >100µA of current at all times, except during the ramping periods, and when VCC is undervoltage. Calculate the nominal value for the timing capacitor by inserting the desired delay into Equation 7: C TIMER = 2µA • tDLY 1.2V (7) For delay times below 60µs, be sure to limit stray capacitances on the TIMER pin by using good PCB design practices. To program essentially no delay (<1µs), float the TIMER pin. Internal circuitry guarantees that the TIMER pin is pulled below 150mV (typical) before a delay cycle can begin. 29212fa 12 LTC2921/LTC2922 Series U W U U APPLICATIO S I FOR ATIO Electronic Circuit Breaker The LTC2921/LTC2922’s electronic circuit breaker protects against excessive current on VCC. The circuit breaker trips when the SENSE pin falls more than 50mV below the VCC pin for more than 1µs. When the breaker trips, the remote sense switches are opened and the PG and GATE pins are pulled to ground, disconnecting the supplies. An internal latch guarantees that the monitoring sequence cannot start until the breaker is reset. To reset the circuit breaker, cycle the V1 input below 0.5V(nom) for more than 150µs. VCC falling below the undervoltage threshold also resets the breaker. After reset, the sequence returns to Step 1, awaiting valid monitor levels. Figure 7 shows an equivalent schematic for the electronic circuit breaker function. Using Equation 8, set the circuit breaker by selecting RSENSE to drop less than the minimum ∆VSENSE at the desired trip current: RSENSE ≤ ∆VSENSE(MIN) (8) ILO(TRIP) After selecting a resistor, use Equations 9a and 9b to calculate the actual minimum and maximum trip current threshold limits: ITRIP(MIN) = ITRIP(MAX) = ∆VSENSE(MIN) (9a) RSENSE(MAX) ∆VSENSE(MAX) (9b) RSENSE(MIN) RSENSE VSRC0 VCC + – Q0 VPUMP SENSE 50mV RG0 10Ω 4µA GATE GATE ENABLE + REMOTE VPUMP SENSE SWITCH GATE OVERCURRENT COMPARATOR SWITCH ENABLE LATCH VLO ILO CONTROL LOGIC LOAD CGATE VPUMP V V1 PULSE WIDTH MEAS. PG GND LTC2922 Figure 7. Circuit Breaker Functional Schematic Configuring the PG Pin Output The LTC2921 and LTC2922 each include a power good indicator, the PG pin. During the turn-on sequence, and upon detection of errors, a strong FET pulls PG to ground with >10mA of current. When all supplies have satisfied their monitor and overvoltage thresholds, the circuit breaker has not tripped, the GATE pin has reached its peak, and the remote sense switches have turned on, a 4µA current source from VPUMP pulls up PG. Configure PG as a logic signal by adding an external pullup resistor to a voltage source. For example, create a negative-logic system reset signal by adding an external pull-up resistor to the load side of a supply voltage, as in Figure 8. Calculate the minimum pull-up resistor value that meets the output low voltage specification for VPG(OL): RPG(MIN) = VLO(MAX) − 0.4V 5mA (10) Do not pull PG above the GATE pin’s fully ramped voltage. An internal clamp limits the PG voltage to ≤12.2V relative to ground. In applications that do not require the PG output, leave the pin unconnected. The PG output can also be used as the gate drive for external N-channel MOSFETs, as in Figure 9. The delay between the GATE ramp and the PG activation makes a supply sequencer, useful when two supplies (or two groups of supplies) need to be ramped one after another. Choose the FETs and design the ramp rate in the same way as for the GATE pin. Refer to Equations 5 and 6, substituting 4µA for 10µA, to choose capacitor CPG. Integrated Switches for Remote Sensing 4µA PG ENABLE Be mindful of thermal effects and power ratings when choosing a resistor. Place RSENSE as close as possible to the LTC2921/LTC2922 pins to reduce noise pickup, and use Kelvin sensing to ensure accurate measurement of the voltage drop. In applications not requiring the current sensing circuit breaker, tie the SENSE pin to the VCC pin. 2921/22 F07 A significant feature of the LTC2921/LTC2922 series is a set of remote sense switches that allow for compensation of voltage drops in the load path. Switch activation occurs in the turn-on sequence after the GATE 29212fa 13 LTC2921/LTC2922 Series U W U U APPLICATIO S I FOR ATIO VSRC0 RSENSE VCC Q0 VL0 RX1 RG0 10Ω SENSE 4µA RB1 V1 CGATE GND µC RESET VS1 CGATE D1 S1 DC/DC CONVERTER PG ENABLE GATE LTC2922 RA1 RZ1 RPG PG RG1 10Ω RY1 VFB GATE VPUMP LOAD GND 2921/22 F10 GND LTC2922 VL1 Q1 VSRC1 VOUT Figure 10. Automatic Remote Sense Switching Connection 2921/22 F08 Figure 8. PG Pin as Logic Output Q5 VSRC5 VSRC0 RSENSE VCC VL5 RG5 10Ω Q0 VL0 RG0 10Ω SENSE GATE VPUMP CGATE To choose a value for resistor RX1, consider the remote sense switch connection equivalent network in Figure 11. Resistor RQ1(ON) represents the on-resistance of Q1, and resistor RFB1(ON) represents the on-resistance of the internal switch. 4µA RX1 RY1 PG PG ENABLE VFB RQ1(ON) IQ1 VSRC1 VOUT LTC2922 IDS1 S1 VS1 CPG VL1 RFB1(ON) D1 RZ1 GND LTC2922 LOAD GND 2921/22 F09 DC/DC CONVERTER IL1 2921/22 F11 Figure 9. PG Pin as Sequenced N-Channel Gate Driver Figure 11. Remote Sense Switch Connection Equivalent Network pin has fully ramped up. The switches are N-channel MOSFETs whose gates are ramped from ground to VPUMP at a nominal rate of 8V/ms. The PG pin is activated upon completion of the TIMER delay cycle that follows GATE ramp-up and remote sense switch activation. When conditions indicate a supply disconnect, the switches shut off in less than 10µs. To allow the load voltage to dominate the feedback to the converter when the internal switch is closed, make RX1 >> RFB1(ON). To set the converter feedback ratio accurately with RY1 and RZ1, make both RX1 and RFB1(ON) much less than (RY1 + RZ1). To ensure that most of the load current flows through the external N-channel FET, choose (RX1 + RFB1(ON)) >> RQ1(ON). Summarized, these requirements amount to: Figure 10 shows an example of how to connect a switch to remote sense the load voltage. Although only one remote sense switch is referred to in this section, the calculations and comments apply to all. Before the activation of Q1 and the internal switch, resistor RX1 provides a direct path between the DC/DC converter’s output voltage and its feedback network (RY1 and RZ1). Once Q1 activates, the supply energizes the load. When the internal switch turns on, it provides a remote sense path between the load voltage and the converter’s feedback network. RQ1(ON), RFB(ON) << RX1 << (RY1 + RZ1) (11) Approach the selection of RX1 in the following way: design the DC/DC converter feedback based on the resistive divider formed by RY1 and RZ1 with VS1 at the desired supply voltage value. When the resistor values satisfy Equation 11, Equations 12 through 15 are valid. 29212fa 14 LTC2921/LTC2922 Series U W U U APPLICATIO S I FOR ATIO Before Q1 closes to connect the load, the actual supply voltage relative to VS1 is given by Equation 12. R X1 ∆VSRC1 = VSRC1 – VS1 = VS1 • (12) RX1 + RY1 + RZ1 After both Q1 and the internal remote sense switch have closed, the load voltage relative to VS1 is given by Equation 13. RFB1(ON) ∆VL1 = VL1 – VS1 = –IL1 • RQ1(ON) • R X1 (13) Table 1. Design Example Electrical Specifications Supply Specifications 5V ± 7.5% VSRC0(MAX) = 5.375V VSRC0(MIN) = 4.625V IL0 = 0.8A (max) 3.3V ± 7.5% VSRC1(MAX) = 3.5475V VSRC1(MIN) = 3.0525V IL1 = 1.6A (max) 2.5V ± 7.5% VSRC2(MAX) = 2.6875V VSRC2(MIN) = 2.3125V IL2 = 0.4A (max) External N-channel FET Drain-Source Voltage Specification 5V Supply VQ0(ON)(MAX) < 250mV 3.3V Supply VQ1(ON)(MAX) < 250mV 2.5V Supply VQ2(ON)(MAX) < 150mV Timing Specification A small part of the load current will flow through the remote sense switch. Use Equation 14 to calculate the current, and do not exceed the switch current Absolute Maximum Rating when choosing the value of RX1. RQ1(ON) IDS1 = IL1 • R X1 (14) In addition, once the remote sensing is active, the supply voltage VSRC1 will rise by approximately the drop across the external FET. The effect on the monitor resistive divider design has already been accounted for in the previous section, Setting the Supply Monitor Levels. RFB1(ON) VSRC1 = VS1 + IL1 • RQ1(ON) • 1 – R X1 ≈ VS1 + VQ1(ON) (15) The terminals of each switch are interchangeable; choose the connections to optimize the board layout. Ground all unused switch pins. Design Example Consider the design of a three-supply monitoring system, as shown in Figure 12, with specifications as listed in Table␣ 1. TIMER Delay tDLY = 150ms (nom) GATE Ramp Time tRAMP = 500ms (nom) Bias Current Specification Monitor Resistive Divider Current IA1= 10µA (nom) IA2 = 10µA (nom) Other Requirements • Remote Sense all 3 Load Voltages • Tight Monitoring Levels • Use Circuit Breaker Function • DC/DC Converter Feedback Resistive Divider >100kΩ The LTC2921 suits this application because the largest supply in the system is 5V, and only three remote sense switches are required. Start with the design of the resistive dividers that set the monitor levels. As the largest supply voltage, the 5V supply must be connected to the VCC pin; an internal resistive divider sets that monitor level. Consult the Electrical Characteristics table to confirm that VSRC0(MIN) >VCC(MON)(MAX) and VSRC0(MAX) <VCC(OV)(MIN). The bias current in the lower resistor for the 3.3V supply’s dividers yields a standard 1% value of RA1 = 49.9k: RA1 = 0.500V = 50k ≈ 49.9k 10µA 29212fa 15 LTC2921/LTC2922 Series U W U U APPLICATIO S I FOR ATIO RSENSE WSL1206 0.05Ω, 1% 5V = 7.5% VOUT VFB RX0 100Ω DC/DC CONVERTER Q0 Si2316DS CD0 0.1µF 25V RG0 10Ω 3.3V = 7.5% VOUT RX1 100Ω VFB Q1 Si2316DS CD1 0.1µF 25V DC/DC CONVERTER RX2 100Ω VFB DC/DC CONVERTER QRST Si1012R RB1 243k 1% RB2 169k 1% RA1 49.9k 1% RA2 49.9k 1% CBRST R1 100k 1 V1 2 V2 3 V3 4 V4 15 VCC 2.5V LOAD 0.4A MAX RG2 10Ω 14 SENSE 13 GATE LTC2921 PG CGATE 0.47µF 25V R2 4.7k 12 RESET 10 D1 8 D2 6 D3 9 S1 7 S2 5 S3 CIRCUIT BREAKER RESET CONTROL Q2 Si2316DS CD2 0.1µF 25V CBYP 10µF 25V 3.3V LOAD 1.6A MAX RG1 10Ω 2.5V = 7.5% VOUT 5V LOAD 0.8A MAX GND 11 TIMER 16 C TIMER 0.22µF 10V 2921/22 F12 Figure 12. Design Example of a Three-Supply Tracker and Monitor (5V, 3.3V, 2.5V) Selecting RB1 = 243k satisfies the range restrictions below: 1 – 0.01 RB1(MAX) = 49.9k • • 1 + 0.01 3.0525V – 0.505V = 244.3k 0.505V + 0.1µA • 49.9k 1 + 0.01 RB1(MIN) = 49.9k • • 1 – 0.01 3.5475V + 0.250V – 0.665V = 241.6k 0.665V – 0.1µA • 49.9k Similar calculations for the 2.5V supply yield suitable standard 1% values of RA2 = 49.9k and RB2 = 169k. R A2 = 0.500V = 50k ≈ 49.9k 10µA 1 – 0.01 RB2(MAX) = 49.9k • • 1 + 0.01 2.3125V – 0.505V = 173.3k 0.505V + 0.1µA • 49.9k 1 + 0.01 RB2(MIN) = 49.9k • • 1 – 0.01 2.6875V + 0.150V – 0.665V = 167.6k 0.665V – 0.1µA • 49.9k Tie the unused V3 and V4 monitor pins to V2 for proper operation. 29212fa 16 LTC2921/LTC2922 Series U W U U APPLICATIO S I FOR ATIO Next, consider the supply ramping N-channel MOSFETs Q0, Q1 and Q2. Transistor Q0 will have >4.5V of gatesource voltage, even at maximum supply voltage (5.375V) and minimum GATE pin voltage (10V). Considering the voltages, temperatures, and currents involved, the maximum on-resistance (RQ(ON)(MAX)) of the Vishay Siliconix Si2316DS is about 150mΩ. Switches Q1 and Q2 will see even higher gate-source voltages, implying even smaller RQ(ON)(MAX) values. Table 2 summarizes the calculated VQ(ON)(MAX) voltages. Include the additional 50mV drop across RSENSE when budgeting for the VCC supply path. Table 2. External MOSFET Drain-Source Voltage Drops Supply Voltage External MOSFET RQ(ON) Max IL Max VQ(ON) Max 5V Q0 ~150mΩ 0.8A 120mV (+50mV = 170mV) 3.3V Q1 <150mΩ 1.6A <240mV 2.5V Q2 <150mΩ 0.4A <60mV The ±20V absolute maximum gate-source voltage rating of the Si2316DS easily accommodates this design. Next, calculate the necessary capacitance on the GATE pin to realize the desired ramp rate. Use the nominal value of VGATE from the Electrical Specification, and choose a standard value. 10µA • 500ms C GATE = = 0.463µF ≈ 0.47µF 10.8V Include drain bypass capacitors of 0.1µF and series gate resistors of 10Ω on each external power FET to damp turnon oscillations. Find the capacitance at the TIMER pin required to set the delays in the power-on sequence: C TIMER = 2µA • 150ms = 0.25µF ≈ 0.22µF 1.2V The application requires the use of the circuit breaker function on the VCC supply. First, find the upper limit on the sense resistor value: RSENSE ≤ Select a precision power sense resistor, such as the Vishay Dale WSL1206 series. They can be specified to 1%, and exhibit <1% variation over the LTC2921/LTC2922 operating range; choose RSENSE = 50mΩ. Including tolerances, the circuit breaker trip current threshold variation will be: 45mV = 0.88A 51mΩ 55mV = = 1.12A 49mΩ ITRIP(MIN) = ITRIP(MAX) The PG pin is configured as a 2.5V negative-logic reset signal for the microcontroller. The minimum pull-up resistance for proper operation is: RPG(MIN) = 2.6875V – 0.4V ≈ 460Ω 5mA Figure 13 shows RPG = 4.7k. The value is somewhat arbitrarily chosen, but it does limit the pull-down current to <500µA. Trade off lower pull-down currents against faster pull-up edge rates in other applications. Recall that proper operation of the remote load sensing function requires: RQ(ON), RFB(ON) << RX << (RY +RZ) In this example, the operating conditions and the Si2316DS give RQ(ON)(MAX) = 150mΩ, the Electrical Characteristics table guarantees RFB(ON) < 10Ω, and the example design specification requires that (RY + RZ) <100k. Selecting RX0 = RX1 = RX2 = 100Ω satisfies the inequality. Before the loads are connected to the supplies, the voltage error due to the RX resistors will be <0.1% for all three supplies: 100Ω VSRC ∆VSRC = VSRC • = 0.1% of VSRC = 100k 1000 After the remote sense switches close, the load voltage errors due to RX at maximum loads will be: 45mV = 53.25mΩ 0.8A 29212fa 17 LTC2921/LTC2922 Series U W U U APPLICATIO S I FOR ATIO 10Ω ∆VL0 = – 0.8A • 150mΩ • = –12mV 100Ω = – 0.24% of 5V 150mΩ IDS1 = 0.8A • = 1.2mA 100Ω 150mΩ IDS2 = 1.6A • = 2.4mA 100Ω 10Ω ∆VL1 = –1.6A • 150mΩ • = –24mV 100Ω = – 0.73% of 3.3V 150mΩ IDS3 = 0.4A • = 0.6mA 100Ω The pull-down transistor Q5 on the V1 pin is a circuit breaker reset mechanism. Choose the transistor to pull down VV1 below the reset threshold under worst-case conditions, and choose a gate-grounding resistor based on speed and current considerations. The Vishay Siliconix Si1012R and a 100k resistor proved sufficient for this design. Finally, bypass the VCC pin with a 10µF capacitor. 10Ω ∆VL2 = – 0.4A • 150mΩ • = –6mV 100Ω 5V = – 0.24% of 2.5 Confirm that the currents through the remote sense switches are less than the Absolute Maximum Ratings: U TYPICAL APPLICATIO S Five-Supply Tracker and Monitor (3.3V, 2.5V, 1.8V, 1.5V, 1.2V) VOUT VFB VFB RG1 10Ω 1.8V LOAD 1.6A MAX 1.8V ± 5% VFB Q2 Si2316DS CD2 0.1µF 25V RX2 100Ω RG2 10Ω 1.5V LOAD 1.4A MAX 1.5V ± 5% VFB Q3 Si2316DS CD3 0.1µF 25V RX3 100Ω DC/DC CONVERTER VOUT 2.5V LOAD 2.3A MAX Q1 Si2316DS CD1 0.1µF 25V RX1 100Ω DC/DC CONVERTER VOUT Q0 Si2316DS RG0 10Ω CD0 0.1µF 25V 2.5V ± 5% DC/DC CONVERTER VOUT RSENSE WSL1206 0.05Ω, 1% RX0 100Ω DC/DC CONVERTER VOUT 3.3V LOAD 0.8A MAX 3.3V± 10% RG3 10Ω 1.2V LOAD 1.2A MAX 1.2V ± 5% VFB RX4 100Ω DC/DC CONVERTER RB1 178k 1% QRST Si1012R CBRST R1 100k CIRCUIT BREAKER RESET CONTROL RB2 113k 1% RB3 86.6k 1% RB4 60.4k 1% CD4 0.1µF 25V CBYP 10µF 25V 3 V1 4 V2 5 V3 6 V4 RA1 49.9k 1% RA2 49.9k 1% RA3 49.9k 1% Q4 Si2316DS 19 VCC 18 SENSE 17 GATE PG RA4 49.9k 1% RG4 10Ω CGATE 0.47µF 25V R2 4.7k 16 RESET PG PIN AS RESET WITH PULL-UP TO 2.5V LTC2922-3.3 1 13 11 9 7 S0 S1 S2 S3 S4 D0 D1 D2 D3 D4 GND 15 20 14 12 10 8 TIMER 2 CTIMER 0.22µF 10V 2921/22 TA02 29212fa 18 LTC2921/LTC2922 Series U PACKAGE DESCRIPTIO F Package 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1650) 6.40 – 6.60* (.252 – .260) 1.05 ±0.10 6.60 ±0.10 20 19 18 17 16 15 14 13 12 11 4.50 ±0.10 0.45 ±0.05 6.40 BSC 0.65 TYP 1 2 3 4 5 6 7 8 9 10 RECOMMENDED SOLDER PAD LAYOUT 1.10 (.0433) MAX 4.30 – 4.50** (.169 – .177) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 0° – 8° 3. DRAWING NOT TO SCALE *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE 0.09 – 0.20 (.0036 – .0079) 0.65 (.0256) BSC 0.45 – 0.75 (.018 – .030) 0.05 – 0.15 (.002 – .006) 0.195 – 0.30 (.0077 – .0118) F20 TSSOP 0502 GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .009 (0.229) REF .150 – .157** (3.810 – 3.988) .0250 TYP RECOMMENDED SOLDER PAD LAYOUT 1 NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 3. DRAWING NOT TO SCALE (0.178 – 0.249) *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE .053 – .068 (1.351 – 1.727) 2 3 4 5 6 7 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.406 – 1.270) .008 – .012 (0.203 – 0.305) .0250 (0.635) BSC GN16 (SSOP) 0502 29212fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC2921/LTC2922 Series U TYPICAL APPLICATIO Early-Late Supply Sequencer with Early Supplies LED Indicator VOUT 5V ± 10% VFB RX0 100Ω DC/DC CONVERTER VOUT RSENSE WSL1206 0.05Ω, 1% CD0 0.1µF 25V RX1 100Ω RG1 10Ω 1.8V EARLY 1.5A MAX 1.8V ± 5% VFB Q2 Si2316DS CD2 0.1µF 25V RX2 100Ω DC/DC CONVERTER RG2 10Ω 3.3V ± 10% 3.3V LATE Q3 Si2316DS CD3 0.1µF 25V VFB DC/DC CONVERTER VOUT 2.5V EARLY 1.5A MAX Q1 Si2316DS CD1 0.1µF 25V DC/DC CONVERTER VOUT RG0 10Ω 2.5V ± 5% VFB VOUT 5V EARLY 0.8A MAX Q0 Si2316DS RG3 10Ω 2.5V ± 10% VFB DC/DC CONVERTER RB1 169k 1% RB3 232k 1% RB2 113k 1% RB4 162k 1% CD4 0.1µF 25V CBYP 10µF 25V 3 V1 4 V2 5 V3 6 V4 QRST Si1012R RA1 49.9k 1% CBRST R1 100k RA2 49.9k 1% RA3 49.9k 1% S0 S1 S2 S3 S4 D0 D1 D2 D3 D4 GND 15 TIMER 2 EARLY VOLTAGES ON CGATE 0.47µF 25V PG PIN AS SEQUENCED GATE DRIVER 16 CPG 0.22µF 25V LTC2922 1 13 11 9 7 R6 330Ω RG4 10Ω 18 SENSE 17 GATE PG RA4 49.9k 1% CIRCUIT BREAKER RESET CONTROL 19 VCC 2.5V LATE Q4 Si2316DS 20 14 12 10 8 2921/22 TA03 tGATE ~ 500ms tPG ~ 600ms CTIMER 0.22µF 10V RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC2900 Programmable Quad Supply Monitor Adjustable RESET Timer, 10-Lead MSOP Package LTC2901 Programmable Quad Supply Monitor with Watchdog Adjustable RESET Timer and Watchdog Timer, Individual Comparator Outputs LTC2902 Programmable Quad Supply Monitor Adjustable RESET Timer, Selectable Tolerance, RESET Disable for Margining. LTC4211 Hot Swap Controller with Multifunction Current Control Operates from 2.5V to 16.5V, 10-Lead MSOP Package LTC4230 Triple Hot Swap Controller with Multifunction Current Control Operates from 1.7V to 16.5V, Supply Tracking 29212fa 20 Linear Technology Corporation LT/TP 0404 1K REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2003