T OP I C S 新 版 产 品 话 题 开发用于EDID*1的“双端口EEPROM*2” 2009年5月28日版 组件个数减少一半 用一个存储器，支持两个HDMI*3端子！ 在一个EEPROM存储两组显示屏的信息！ LE24CBK22M 2009年5月样品开始上市! 生产计划：100万个/月 样品价格50日元 存储器组件个数减少一半 用一个LE24CBK22M， 可支持分别来自2端口之读取/ 写入访问， 因此可减少组件个数， 减少封装面积以及降低 其所涉及的制造成本。 组件 少一 减 个数 半 HDMI /DVI 输入 EDID HDMI 输入 数 数 字 字 信 信 号 号 输 输 入 入 的 的 切 切 换 换 HDMI /DVI 输入 HDMI 输入 EDID 传统方式，需要与HDMI端子数目相同的存储器 Dual Port EEPROM 数 数 字 字 信 信 号 号 输 输 入 入 的 的 切 切 换 换 使用双端口EEPROM时， 每两个HDMI端子用一个存储器支持 容易进行由传统产品的替换 因为在8引脚的通用EEPROM上将第二个端口的接口端子(SDA/SCL端子)搭载于以前为空引脚的部分，所以成为 与一般的通用EEPROM一样的引脚排列、小型封装。 为此，可以用一般的 ROM写入器的写入，可以抑制设备投资，更改设计的工作量也少，所以由传统产品的替 换可以轻松地进行。 *1···EDID(Extended Display Identification Data):显示屏分辨率和时钟的种类等，各显示屏拥有的信息。 *2···EEPROM(Electrically Erasable and Programmable Read Only Memory):可以用电气方法重写内容的存储器。 *3···HDMI(High-Definition Multimedia Interface):用于数字视频设备所搭载的视频输入端子的接口规格。 特色为可以原样输出数字信号，且视频数据的无损。 * 闪存产品是经美国SST公司(Silicon Storage Technology,Inc.)授权许可,由三洋半导体株式会社制造和销售的产品。 * 所记载的内容，包括价格和规格等全部是新闻发布时的内容。因内容可能与最新的信息不同，故请予原谅。 http://semicon.cn.sanyo.com/ 三洋半导体公司 20090528－1/2 发布版产品话题 用于EDID的双端口EEPROM 搭载兼容模式 搭载了“兼容模式”，即在写入数据时，可以连接独立的2端口的存取器领域，作 为串联后的一个存储器领域进行写入。由此，即使不分别进行写入设定，也可以通 过一次的写入设定写入4k bit的数据，从而提高工作效率。 SCL1 SDA1 BK1-cont 端口 1 Bank1(2k-bit) BK2-cont 提 SCL2 SDA2 Bank2(2k-bit) 率 通常工作时，读取写入由SCL1/SDA1所进 行的Bank1(2k-bit)领域与读取写入由 SCL2/SDA2所进行的Bank2(2k-bit)领 域，分别独立处理。用一个EEPROM可以 完成用于EDID的两个存储器份的工作。 兼容模式 设定端子 端口 2 效 作 工 高 端口 1 SCL1 SDA1 兼容模式 设定端子 端口 2 Bank(4k-bit) BK2-cont 在可适用于写入时的“兼容模式”，合 并Bank1的2kbit和Bank2的2kbit，作为 4kbit的一个存储器对待，可由 SCL1/SDA1进行写入。 通过从SCL1/SDA1开始的写入设定，可以 写入Bank1和Bank2的4kbit份的数据。 也可以使用现有的ROM写入器写入。 BK1-cont 通常工作时 SCL2 SDA2 兼容模式时的写入状态 主要规格 · 容量：2kbit(256x8bit)+2kbit(256x8bit) 4kbit 总数 · 存储库结构：2存储库(2kbit+2kbit) · 单电源：2.5V～5.5V · 接口：2线式串行(I2C DDC2) · 最大频率：400kHz · 低功耗：待机时 2μA(Max)、读取时 0.5mA(Max) · 写入页功能：16字节 · 读取機能：序列读取、随机读取 · 重写次数：106次 · 高可靠性：采用三洋独自的对称存储器阵列结构(USP6947325) http://semicon.cn.sanyo.com/ 三洋半导体公司 20090528－2/2 T OP I C S N e w s R e l e a s e P r o d u c t Topics Released on May. 28,2009 Dual Port EEPROM*2 for EDID*1 Developed The number of parts reduced Capable of managing two HDMI*3 terminals with one memory! by half! Stores Two Sets of EDID Data in One EEPROM. LE24CBK22M Sample shipment will begin in May 2009. Production plan : 1,000,000pcs/month Sample price : 50 yen The number of memory parts reduced by half Features EDID HDMI input EDID Conventional method requires one memory chip for each HDMI port. HDMI /DVI input HDMI input selector HDMI input selector rts f pa f o r be y hal m b u n ed The educ r HDMI /DVI input HDMI input selector HDMI input selector One LE24CBK22M can read and write from two separate ports, thereby reducing the number of parts, mounting space, and production cost. HDMI input Dual Port EEPROM Using the Dual Port EEPROM makes it possible to deal with two HDMI terminals with one memory. Existing products can easily be replaced with the Dual Port EEPROM. As the pin that is normally open on 8-pin general purpose EEPROM is used for the second port interface terminal (SDA/SCL), this product has the same pin configuration as the 8-pin standard EEPROM and is housed in the same compact package. Existing product can easily be replaced with the new Dual Port EEPROM and writing with general ROM writers is possible. Design changes are easier and investment in equipment can be reduced. *1 EDID (Extended Display Identification Data): Information for each display such as display resolution and clock type. *2 EEPROM (Electrically Erasable and Programmable Read Only Memory): Electrically erasable programmable read-only memory *3 HDMI (High-Definition Multimedia Interface): Interface standard for image-output terminal installed in digital image device. Since it outputs digital signal without any change, video data will not be degraded. *The information presented in this product topics, including device specifications, is current as of the date of the press release. Note, however, that this information is subject to change without notice and thus at later dates the current state may differ in certain details from the content presented here. www.semiconductor-sanyo.com/network 20090528-1/2 Release Product Topics Dual Port EEPROM for EDID Developed Includes combined mode SCL1 SDA1 BK1-cont PORT 1 Bank1(2k-bit) BK2-cont In combined mode operation, the memory area of the two separate ports operates as combined one sequential memory area for writing. This enables to write 4 Kbit display information for two terminals at the same time, without configuring each memory area for writing, which contributes to a significant increase in work efficiency. Bank2(2k-bit) During normal mode operation, Bank1 (2 Kbit) memory region in which reading and writing are performed through SCL1/SDA1 and Bank2 (2 Kbit) memory region in which reading and writing are performed through SCL2/SDA2 are handled separately. Equivalent operation of two memories for EDID is possible with one Dual Port EEPROM. Combined mode selector PORT 2 SCL2 SDA2 cy ien led c i eff ub ite st do r W o alm PORT 1 SCL1 SDA1 Combined mode selector PORT 2 SCL2 SDA2 Bank(4k-bit) BK2-cont Combined mode operation is available during the writing operation. Bank1 (2 Kbit) memory region and Bank2 (2 Kbit) memory region are integrated and treated as one memory of 4 Kbit thus reducing the writing time. Writing is performed through the SCL1/SDA1 ports. Writing with general ROM writers is possible. BK1-cont At operation usually Write operation in combined mode Specifications • Capacity : 2kbit(256 x 8bit) + 2kbit(256 x 8bit) total 4kbit • Bank composition : 2bank (2kbit + 2kbit) • Supply voltage : 2.5V to 5.5V • interface : Two wire serial interface (I2C DDC2) • Maximum operating clock frequency : 400kHz • Low power consumption : During standby 2uA(max),During reading 0.5mA(max) • page write mode : 16 Byte • read mode : Sequential read and random read • Erase/Write cycles : 106 cycles • Adopts SANYO’s proprietary symmetric memory array configuration (USP6947325). www.semiconductor-sanyo.com/network 20090528-2/2