WILLAS DTC114EKA

WILLAS
Low VF Chip S
SL12-N THRU SL14-N
Digital Transistors (Built-in Resistors)
1.0A Surface Mount Schottky Barrier
Rectifiers - 20V-40V
DTC114EM/DTC114EE/DTC114EUA
Package outline
DTC114EKA /DTC114ECA/DTC114ESA
Features
DIGITAL TRANSISTOR (NPN)
• Batch process design, excellent power dissipation offers
·Equivalent Circuit
SOD
better reverse leakage current and thermal resistance.
FEATURES
• Low profile surface mounted application in order to
optimize
space.
 Built-in
biasboard
resistors
enable the configuration of an inverter circuit
Low power loss, high efficiency.
• without
connecting external input resistors(see equivalent circuit)
• High current capability, very low forward voltage drop.
 • The
resistors
consist of thin-film resistors with complete isolation
Highbias
surge
capability.
allow positive
of the input.They
also have the advantage of
Guardring
for biasing
overvoltage
protection.
• to
Very tiny
plasticeliminating
SMD package.
• almost
completely
parasitic effects
• Ultra high-speed switching.
 • Only
the on/off
conditions
need
to bemetal
set forsilicon
operation,
making device design easy
Silicon
epitaxial
planar
chip,
junction.

0.106
0.091
RoHS product for packing code suffix "G"
Halogen free product for packing code suffix "H"
PIN CONNENCTIONS and MARKING
Mechanical
data
DTC114EM
SOT-723
DTC114EE
SOT-523
• Epoxy : UL94-V0 rated flame retardant
• Case : Molded plastic, SOD-323-L 1. IN
2. GND
• Terminals :Plated terminals, solderable
per MIL-STD-750,
3. OUT
MARKING:24 Method 2026
• Polarity : Indicated by cathode band
MARKING:24
SOT-323
•DTC114EUA
Mounting Position : Any
• Weight : Approximated 0.008 gram1. IN
MARKING:24
Maximum ratings (AT
DTC114ECAPARAMETER
Forward rectified current
Forward surge current
DTC114EKA
0.016(0.4) Typ.
1. IN
2. GND
3. OUT
Dimensions in inche
SOT-23-3L
1. IN
2. GND
2. GND
3. OUT
3. OUT
MARKING:24
T A=25 oC unless otherwise noted)
SOT-23
CONDITIONS
DTC114ESA
TO-92S
IO
See Fig.2
1. IN
8.3ms
1. GND
single half sine-wave superimposed on
2. GND
2. OUT
rate load (JEDEC methode)
3. OUT
Reverse current
MARKING:24
I FSM
3. IN
V R = V RRM T J = 25 OC
IR
Thermal resistance
Junction to ambient
Diode junction capacitance
f=1MHz and applied 4V DC reverse voltage
Storage temperature
2012-05
Symbol
R θJA
C,Mar,2012
WILLAS ELECTRONIC CORP.
CJ
T STG
MAXIMUM RATINGS(Ta=25℃ unless otherwise noted)
Symbol
Limits(DTC114E□)
Parameter
M
VCC
Supply Voltage
VIN
Input Voltage
IO
E
UA
Unit
KA
CA
SA
50
V
-10~+40
V
Output Current
50
mA
ICM
Peak Collector Current
100
mA
PD
Power Dissipation
Tj
Junction Temperature
150
℃
Tstg
Storage Temperature
-55~+150
℃
100
150
200
300
mW
ELECTRICAL CHARACTERISTICS (Ta=25℃ unless otherwise specified)
Parameter
Input voltage
Output voltage
Input current
Symbol
Conditions
Min
Typ
Max
VI(off)
VCC=5V,IO=100µA
VI(on)
VO=0.3V,IO=10mA
3
V
VO(on)
IO/II=10mA/0.5mA
0.3
V
VI=5V
0.88
mA
0.5
μA
kΩ
II
0.5
V
Output current
IO(off)
VCC=50V,VI=0
DC current gain
GI
VO=5V,IO=5mA
Input resistance
R1
7
10
13
Resistance ratio
R2/R1
0.8
1
1.2
Transition frequency
2012-05
Unit
fT
VO=10V,IO=5mA,f=100MHz
30
250
MHz
WILLAS ELECTRONIC CORP.
Typical Characteristics
DTC114EXX
OFF Characteristics
ON Characteristics
10
100
VCC=5V
VO=0.3V
Ta=100℃
(mA)
(V)
10
1
OUTPUT CURRENT
IO
VI(ON)
INPUT VOLTAGE
25℃
3
30
Ta=25℃
3
100℃
1
0.1
0.03
0.3
0.1
0.1
0.3
1
0.3
10
3
OUTPUT CURRENT
VO(ON)
IO
——
0.01
0.0
100
30
0.4
(mA)
0.8
1.2
INPUT VOLTAGE
VI(OFF)
IO
1
GI
1000
——
1.6
IO
IO/II=20
VO=5V
Ta=100℃
25℃
GI
0.3
Ta=100℃
VO(ON)
25℃
DC CURRENT GAIN
(V)
300
OUTPUT VOLTAGE
2.0
(V)
0.1
100
30
10
0.03
3
0.01
3
1
10
OUTPUT CURRENT
CO
10
——
30
IO
1
0.1
100
3
1
OUTPUT CURRENT
VR
PD
400
f=1MHz
Ta=25℃
——
10
IO
30
100
125
150
(mA)
Ta
350
(mW)
250
POWER DISSIPATION
6
300
PD
CO
(pF)
8
OUTPUT CAPACITANCE
0.3
(mA)
4
2
DTC114ESA
DTC114EUA/KA/CA
200
DTC114EE
150
DTC114EM
100
50
0
0
0
4
8
12
REVERSE BIAS VOLTAGE
2012-05
16
VR
(V)
20
0
25
50
75
AMBIENT TEMPERATURE
100
Ta
(℃ )
WILLAS ELECTRONIC CORP.