FAIRCHILD 74ABT241CSJ

Revised March 2005
74ABT241
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
Features
The ABT241 is an octal buffer and line driver with 3-STATE
outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver.
■ Non-inverting buffers
■ Output sink capability of 64 mA, source capability of
32 mA
■ Guaranteed latchup protection
■ High impedance glitch free bus loading during entire
power up and power down cycle
■ Nondestructive hot insertion capability
Ordering Code:
Order Number
74ABT241CSC
74ABT241CSJ
Package Number
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ABT241CMSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74ABT241CMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Descriptions
Pin Names
Description
OE1
Output Enable Input (Active LOW)
OE2
Output Enable Input (Active HIGH)
I0–I7
Inputs
O0–O7
Outputs
Truth Table
OE1
I0–3
O0–3
OE2
I4–7
O4–7
H
X
Z
L
X
Z
L
H
H
H
H
H
L
L
L
H
L
L
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
Z High Impedance
© 2005 Fairchild Semiconductor Corporation
DS011691
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74ABT241 Octal Buffer/Line Driver with 3-STATE Outputs
January 1995
74ABT241
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
65qC to 150qC
55qC to 125qC
55qC to 150qC
0.5V to 7.0V
0.5V to 7.0V
30 mA to 5.0 mA
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
40qC to 85qC
4.5V to 5.5V
Free Air Ambient Temperature
Supply Voltage
Minimum Input Edge Rate ('V/'t)
Data Input
50 mV/ns
Enable Input
20 mV/ns
Voltage Applied to Any Output
in the Disabled or
0.5V to 5.5V
0.5V to VCC
Power-Off State
in the HIGH State
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
DC Latchup Source Current
(Over Comm Operating Range)
500 mA
Over Voltage Latchup (I/O)
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
10V
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
VCC
VIL
Input LOW Voltage
0.8
V
VCD
Input Clamp Diode Voltage
1.2
V
Min
IIN
18 mA
VOH
Output HIGH Voltage
2.5
V
Min
IOH
3 mA
2.0
V
Min
IOH
32 mA
V
Min
IOL
64 mA
PA
Max
VIN
2.7V (Note 4)
VIN
VCC
PA
Max
VIN
7.0V
PA
Max
VIN
0.5V (Note 4)
V
0.0
Output LOW Voltage
IIH
Input HIGH Current
V
Conditions
Input HIGH Voltage
VOL
2.0
Units
VIH
0.55
1
1
IBVI
Input HIGH Current Breakdown Test
7
IIL
Input LOW Current
1
1
4.75
Recognized HIGH Signal
Recognized LOW Signal
VIN
0.0V
IID
1.9 PA
VID
Input Leakage Test
IOZH
Output Leakage Current
10
PA
0 5.5V
VOUT
2.7V; OEn
2.0V
IOZL
Output Leakage Current
10
PA
0 5.5V
VOUT
0.5V; OEn
2.0V
IOS
Output Short-Circuit Current
275
mA
Max
VOUT
0.0V
All Other Pins Grounded
100
ICEX
Output High Leakage Current
50
PA
Max
VOUT
VCC
IZZ
Bus Drainage Test
100
PA
0.0
VOUT
5.5V; All Others GND
ICCH
Power Supply Current
50
PA
Max
All Outputs HIGH
ICCL
Power Supply Current
30
mA
Max
All Outputs LOW
ICCZ
Power Supply Current
50
PA
Max
OEn
VCC;
All Others at VCC or Ground
ICCT
Additional ICC/Input
Outputs Enabled
2.5
mA
Outputs 3-STATE
2.5
mA
Outputs 3-STATE
50
PA
VI
Max
VCC 2.1V
Enable Input VI
Data Input VI
VCC 2.1V
V CC 2.1V
All Others at VCC or Ground
ICCD
Dynamic ICC
No Load
mA/
(Note 4)
0.1
MHz
Max
Outputs Open
OEn
GND, (Note 3)
One Bit Toggling, 50%
Duty Cycle
Note 3: For 8 bits toggling, ICCD 0.8 mA/MHz.
Note 4: Guaranteed, but not tested.
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2
(SOIC package)
Conditions
Symbol
Parameter
Min
VOLP
Quiet Output Maximum Dynamic VOL
VOLV
Quiet Output Minimum Dynamic VOL
1.3
VOHV
Minimum HIGH Level Dynamic Output Voltage
2.7
VIHD
Minimum HIGH Level Dynamic Input Voltage
2.0
VILD
Maximum LOW Level Dynamic Input Voltage
Typ
Max
VCC
Units
CL
50 pF,
RL
500:
V
5.0
TA
25qC (Note 5)
0.8
V
5.0
TA
25qC (Note 5)
3.1
V
5.0
TA
25qC (Note 7)
1.5
V
5.0
TA
25qC (Note 6)
V
5.0
TA
25qC (Note 6)
0.5
0.8
1.1
0.8
Note 5: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 6: Max number of data inputs (n) switching. n 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD).
Guaranteed, but not tested.
Note 7: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
AC Electrical Characteristics
(SOIC and SSOP package)
25qC
TA
VCC
Symbol
CL
Parameter
Min
40qC to 85qC
TA
5V
VCC
50 pF
Typ
CL
Max
Min
4.5V–5.5V
50 pF
Units
Max
tPLH
Propagation Delay
1.0
4.6
1.0
4.6
tPHL
Data to Outputs
1.0
4.6
1.0
4.6
tPZH
Output Enable
1.1
6.8
1.1
6.8
tPZL
Time
1.3
6.8
1.3
6.8
tPHZ
Output Disable
1.6
6.8
1.6
6.8
tPLZ
Time
1.0
5.9
1.0
5.9
ns
ns
ns
Capacitance
Conditions
Symbol
Parameter
CIN
Input Capacitance
COUT (Note 8)
Output Capacitance
Note 8: COUT is measured at frequency f
Typ
Units
5.0
pF
VCC
0V
9.0
pF
VCC
5.0V
TA
25qC
1 MHz, per MIL-STD-883, Method 3012.
3
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74ABT241
DC Electrical Characteristics
74ABT241
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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4
74ABT241
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
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74ABT241
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package Number MSA20
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6
74ABT241 Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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