TPS61251
www.ti.com
SLVSAF7 – SEPTEMBER 2010
BOOST CONVERTER FOR BATTERY BACKUP CHARGING WITH ADJUSTABLE
CONSTANT CURRENT AND SNOOZE MODE
Check for Samples: TPS61251
FEATURES
•
1
•
•
•
•
•
•
•
•
Resistor Programmable Input Current Limit
– ±10% Current Accuracy at 500mA over Full
Temperature Range
– Programmable from 100mA up to 1500mA
Snooze Mode Draws Only 2 mA (typ.)
Quiescent Current
Designed to Charge Large Capacitor Values in
the Farad Range
Up to 92% Efficiency
Power Good Indicates Appropriate Output
Voltage Level even in Shut Down
VIN Range from 2.3V to 6.0V
Adjustable Output Voltage up to 6.5V
100% Duty-Cycle Mode When VIN > VOUT
•
•
•
Load Disconnect and Reverse Current
Protection
Short Circuit Protection
Typical Operating Frequency 3.5 MHz
Available in a 2×2-mm QFN-8 Package
APPLICATIONS
•
•
•
•
•
Current Limited Applications With High Peak
Power Loads (SSD, PCMCIA Tx Bursts,
Memory, GPRS/GSM Tx)
Li-Ion Applications
Battery Backup Applications
Audio Applications
RF-PA Buffer
DESCRIPTION
The TPS61251 device provides a power supply solution for products powered by either a three-cell, NiCd or
NiMH battery, or a one-cell Li-Ion or Li-polymer battery. The wide input voltage range is ideal to power portable
applications like mobile phones, solid state drives (SSD) and wireless modems. The converter is designed to
charge large capacitors in the Farad range to support battery back up applications. During capacitor charging the
TPS61251 is working as a constant current source until VOUT has reached its programmed value. The charge
current can be programmed by an external resistor RILIM and provides a ±10% accuracy for the average input
current limit.
The TPS61251 in combination with a reservoir capacitor allows the converter to provide high current pules that
would exceed the capability of the suppling circuit (PC slot, USB) and keeps the slot power safely within its
capabilities. During light loads the device will automatically enters an enhanced power save mode (Snooze
Mode), which allows the converter to maintain the required output voltage, while only drawing 2 mA from the
battery. This will allow maximum efficiency at lowest quiescent currents.
TPS61251 allows the use of small inductors and input capacitors to achieve a small solution size. During
shutdown, the load is completely disconnected from the battery and will not discharge either the battery nor the
charged bulk capacitor. The TPS61251 is available in a 8-pin QFN package measuring 2×2 mm (DSG).
VOUT
L1
1 μH
VOUT
L
5.5 V
VIN
2.3 V to
6.0 V
R1
1 MΩ
VIN
C1
10 µF
EN
FB
CFF
1 nF
COUT
4.7 µF
CBULK
>150 µF
R4
1 MΩ
R2
280 kΩ
ILIM
RILIM
20 kΩ
GND
PG
Power Good
Output
TPS61251
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
TPS61251
SLVSAF7 – SEPTEMBER 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE DEVICE OPTIONS
(1)
(2)
TA
OUTPUT VOLTAGE (1)
PACKAGE MARKING
PACKAGE
PART NUMBER (2)
–40°C to 85°C
Adjustable
QTH
8-Pin QFN
TPS61251GSG
Contact TI for other fixed output voltage options
For detailed ordering information please check the PACKAGE OPTION ADDENDUM section at the end of this datasheet.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
Voltage range (2)
Temperature range
ESD rating (3)
(1)
(2)
(3)
MIN
MAX
VIN, VOUT, SW, EN, PG, FB, ILIM
–0.3
7
V
Operating junction, TJ
–40
150
°C
Storage, Tstg
–65
150
°C
2
kV
0.5
kV
Human Body Model - (HBM)
Charge Device Model - (CDM)
UNIT
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
All voltages are with respect to network ground terminal.
ESD testing is performed according to the respective JESD22 JEDEC standard.
THERMAL INFORMATION
TPS61251
THERMAL METRIC
(1)
DSG
UNITS
8 PINS
qJA
Junction-to-ambient thermal resistance
80.2
qJCtop
Junction-to-case (top) thermal resistance
93.5
qJB
Junction-to-board thermal resistance
54.2
yJT
Junction-to-top characterization parameter
0.9
yJB
Junction-to-board characterization parameter
59.3
qJCbot
Junction-to-case (bottom) thermal resistance
20
(1)
2
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
TPS61251
www.ti.com
SLVSAF7 – SEPTEMBER 2010
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX UNIT
Supply voltage at VIN
2.3
6.0
Output voltage at VOUT
3.0
6.5
V
Programable input current limit set by RILIM
100
1500
mA
Operating free air temperature range, TA
–40
85
°C
Operating junction temperature range, TJ
–40
125
°C
V
ELECTRICAL CHARACTERISTICS
Over recommended free air temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply
for condition VIN = EN = 3.6 V, VOUT = 5.5 V.
DC/DC STAGE
PARAMETER
VFB
TEST CONDITIONS
Feedback voltage
MIN
TYP
MAX
1.182
1.2
1.218
2.3 V ≤ VIN ≤ 6.0 V
Maximum line regulation
Maximum load regulation
f
Oscillator frequency
rDS(on)
V
0.5
%
0.5
%
3500
kHz
High side switch on resistance
200
mΩ
Low side switch on resistance
130
mΩ
Reverse leakage current into VOUT
EN = GND
3.5
ILIM pin set to VIN
IIN(DC)
UNIT
Programmable input average switch current limit
1500
ILIM pin set to GND
100
RILIM = 20 kΩ (500mA)
-10
PFM enabled, device is not switching
IQ
Quiescent current
SNOOZE mode, IOUT = 0 mA, current into
VIN pin
ISD
Shutdown current (1)
VIN turned on when EN is connected to
GND and no voltage is present at VOUT
OVP
Input over voltage protection threshold
µA
mA
mA
+10
%
30
µA
2
µA
0.85
3.5
mA
Falling
6.4
V
Rising
6.5
V
Falling
2.0
Hysteresis
0.1
CONTROL STAGE
VUVLO
Under voltage lockout threshold
VIL
EN input low voltage
2.3 V ≤ VIN ≤ 6.0 V
VIH
EN input high voltage
2.3 V ≤ VIN ≤ 6.0 V
EN, PG input leakage current
Clamped on GND or VIN
Power Good threshold voltage
Rising referred to VFB
Falling referred to VOUT
V
0.4
V
0.5
µA
97.5
%
1.0
92.5
V
V
95
2.3
V
50
µs
Overtemperature protection
140
°C
Overtemperature hysteresis
20
°C
Power good delay
(1)
2.1
When the power good threshold is triggered the first time a comparator is turned on to observe the output voltage increasing the
shutdown current.
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
3
TPS61251
SLVSAF7 – SEPTEMBER 2010
www.ti.com
DEVICE INFORMATION
PIN ASSIGNMENTS
8 VIN
GND 1
FB 3
ILIM 4
d
ose d
Exp al Pa
rm
The
VOUT 2
7 SW
6 EN
5 PG
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
EN
6
I
Enable input. (1 enabled, 0 disabled)
FB
3
I
Voltage feedback pin
GND
1
ILIM
4
I
Adjustable average input current limit. Can be connected to VIN for maximum current limit or to GND
for minimum current limit.
PG
5
O
Output power good (1 good, 0 failure; open drain)
SW
7
I
Connection for Inductor
VIN
8
I
Supply voltage for power stage
VOUT
2
O
Boost converter output
Exposed
Thermal Pad
4
Ground
Must be soldered to achieve appropriate power dissipation and for mechanical reasons. Must be
connected to GND.
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
TPS61251
www.ti.com
SLVSAF7 – SEPTEMBER 2010
FUNCTIONAL BLOCK DIAGRAM (TPS61251)
SW
VIN
Gate Drive
VOUT
PMOS
NMOS
Valley
Current
Sense
Pulse
PWM Modulator
FB
Softstart
VREF
EN
Control
Logic
Snooze Mode
Detection
Input
Current
Sense
Thermal
Shutdown
Undervoltage
Lockout
Averaging
Circuit
gm
VREF2
1V
VOUT
IAVE
Error Amp.
PG
ILIM
GND
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
5
TPS61251
SLVSAF7 – SEPTEMBER 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION
L1
VOUT
VOUT
L
VIN
R1
VIN
C1
C2
C3
FB
EN
C4
R4
R2
ILIM
R3
PG
GND
Power Good
Output
U1
Table 1. List of Components
REFERENCE
DESCRIPTION
MANUFACTURER
U1
TPS61251
Texas Instruments
L1
1.0 mH, 2.1 A, 27mΩ, 2.8 mm x 2.8
mm x 1.5 mm
DEM2815C, TOKO
C1
1 x 4.7 mF, 10 V, 0805, X7R ceramic
GRM21BR71A475KA73, Murata
C2
1 x 1000 pF, 50 V, 0603, COG
ceramic
GRM1885C1H102JA01B, Murata
C3
1 × 4.7 mF, 10 V, 0805, X7R ceramic
GRM21BR71A475KA73, Murata
C4
20 x 100 uF, 6.3 V, 1206, X5R
GRM31CR60J107ME39B, Murata
R1
Depending on the output voltage of TPS61252, 1% (all waveform measurements with 5.5 V output voltage uses 1000
kΩ)
R2
Depending on the output voltage of TPS61252, 1% (all waveform measurements with 5 V output voltage uses 280 kΩ)
R3
Depending on the input current limit of TPS61252, 1%
R4
1 MΩ, 1%
6
any
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
TPS61251
www.ti.com
SLVSAF7 – SEPTEMBER 2010
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
DESCRIPTION
FIGURE
Efficiency
vs Output current (VOUT = 5.5 V, ILIM = 1.5 A, R1 = 2320 kΩ and R2 = 649 kΩ)
Figure 1
vs Output current in 100% Duty-Cycle Mode (VOUT = 5.5V, ILIM = 1.5 A, R1 = 2320 kΩ
and R2 = 649 kΩ)
Figure 2
vs Input voltage (VOUT = 5.5V, ILOAD = {0.01;0.1; 1.0; 10; 100; 500 mA}, R1 = 2320 kΩ
and R2 = 649 kΩ)
Figure 3
Maximum output current
vs Input voltage (VOUT = 5.5 V, ILIM = {100; 200; 500; 1000; 1500 mA}, R1 = 1000 kΩ
and R2 = 280 kΩ)
Figure 4
Output voltage
vs Output current (VOUT = 5.5 V, ILIM = 1.5 A, R1 = 1000 kΩ and R2 = 280 kΩ)
Figure 5
Load transient response (Tantal Capacitor 2.3mF with >60 mΩ ESR, VOUT = 5.5V, VIN
= 3.6V, ILIM = 1000mA, Load change from 50 mA to 550 mA)
Figure 6
Load transient response (6 x 330uF Polymer Tantal <5 mΩ ESR in total, VOUT = 5.5V,
VIN = 3.6V, ILIM = 1000mA, Load change from 500 mA to 1500 mA)
Figure 7
Startup after enable (VOUT = 5.5V, VIN = 3.6V, ILIM = 1000mA)
Figure 8
Startup after enable (VOUT = 5.5V, VIN = 3.6V, ILIM = 500mA)
Figure 9
Waveforms
EFFICIENCY
vs
OUTPUT CURRENT IN 100%
DUTY-CYCLE MODE
EFFICIENCY
vs
OUTPUT CURRENT
100
VI = 4.2 V
100
VI = 3.6 V
90
90
80
80
VI = 5.5 V
VI = 3.3 V
VI = 6 V
VI = 2.3 V
70
VI = 2.7 V
60
Efficiency - %
Efficiency - %
70
50
40
30
50
40
30
20
20
VO = 5 V,
ILIM = max
10
0
0.00001
60
0.0001
0.001
0.01
0.1
IO - Output Current - A
VO = 5 V,
ILIM = max
10
1
0
0.00001
Figure 1.
0.0001
0.001
0.01
0.1
IO - Output Current - A
1
Figure 2.
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
7
TPS61251
SLVSAF7 – SEPTEMBER 2010
www.ti.com
EFFICIENCY
vs
INPUT VOLTAGE
MAXIMUM OUTPUT CURRENT
vs
INPUT VOLTAGE
1.6
1.5
1.4
100
IO = 500 mA
90
80
1.3
1.2
IO - Output Current - A
IO = 0.1 mA
Efficiency - %
70
60
IO = 0.01 mA
IO = 10 mA
50
IO = 1 mA
IO = 100 mA
40
30
20
0
2.3
2.7
3.1
3.5 3.9 4.3 4.7 5.1
VI - Input Voltage - V
5.5
IO (I_Lim = 1 A)
IO (I_Lim = 0.5 A)
0.9
0.8
IO (I_Lim = 0.2 A)
0.7
0.6
0.5
0.4
0.3
0.2
VO = 5 V,
ILIM = max
10
1.1
1
IO (I_Lim = 1.5 A)
0.1
0
2.3
5.9
IO (I_Lim = 0.1 A)
2.8
3.3
3.8
4.3
4.8
5.3
VI - Input Voltage - V
5.8
Figure 3.
Figure 4.
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
LOAD TRANSIENT RESPONSE (Tantal Capacitor)
5.6
5.575
VOUT
100mV/div; 5.25V offset
VO - Output Voltage - V
5.55
5.525
VI = 2.3 V
VI = 2.7 V
Output Current @ 1Ω
500mV/div
VI = 3.3 V
5.5
VI = 3.6 V
5.475
Inductor Current
0.5A/div; 1.5A offset
VI = 4.2 V
5.45
5.425
5.4
0.000001 0.00001 0.0001 0.001
0.01
IO - Output Current - A
Time = 500μs/div
0.1
1
Figure 5.
8
Figure 6.
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
TPS61251
www.ti.com
SLVSAF7 – SEPTEMBER 2010
LOAD TRANSIENT RESPONSE (Low ESR Polymer Tantal)
STARTUP AFTER ENABLE ILIM = 1000mA, NO LOAD
VOUT 2.0V/div; -2V offset
VOUT
50mV/div; 5.4V offset
Output Current @ 1Ω
500mV/div
Inductor Current
0.5A/div; 0.5A offset
Inductor Current
0.5A/div; 1.5A offset
Voltage @ SW pin
2.0V/div; 8V offset
Time = 500μs/div
Time = 2.0ms/div
Figure 7.
Figure 8.
STARTUP AFTER ENABLE ILIM = 500mA, NO LOAD
VOUT 2.0V/div; -2V offset
Inductor Current
0.5A/div; 0.5A offset
Voltage @ SW pin
2.0V/div; 8V offset
Time = 5.0ms/div
Figure 9.
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
9
TPS61251
SLVSAF7 – SEPTEMBER 2010
www.ti.com
DETAILED DESCRIPTION
OPERATION
The TPS61251 Boost Converter operates as a quasi-constant frequency adaptive on-time controller. In a typical
application the frequency will be 3.5 MHz and is defined by the input to output voltage ratio and does not vary
from moderate to heavy load currents. At light load the converter will automatically enter Power Save Mode and
operates in PFM (Pulse Frequency Modulation) mode. During PWM operation the converter uses a unique fast
response quasi-constant on-time valley current mode controller scheme which offers excellent line and load
regulation and the use of small ceramic input capacitors.
Based on the VIN/VOUT ratio, a simple circuit predicts the required on-time. At the beginning of the switching
cycle, the low-side NMOS switch is turned-on and the inductor current ramps up to a peak current that is defined
by the on-time and the inductance. In the second phase, once the peak current is reached, the current
comparator trips, the on-timer is reset turning off the switch, and the current through the inductor then decays to
an internally set valley current limit. Once this occurs, the on-timer is set to turn the boost switch back on again
and the cycle is repeated.
The TPS61251 directly and accurately controls the average input current through intelligent adjustment of the
valley current limit, allowing an accuracy of ±10%. Together with an external bulk capacitor the TPS61251 allows
an application to be interfaced directly to its load, without overloading the input source due to appropriate set
average input current limit .
High values of output capacitance are mainly achieved by putting capacitors in parallel. This reduces the overall
series resistance (ESR) to very low values. This results in almost no voltage ripple at the output and therefore
the regulation circuit has no voltage drop to react on. Nevertheless to guarantee accurate output voltage
regulation even with very low ESR the regulation loop can switch to a pure comparator regulation scheme.
During this operation the output voltage is regulated between two thresholds. The upper threshold is defined by
the programmed output voltage and the lower value is about 10 mV lower. If the upper threshold is reached the
off-time is increased to reduce the current in the inductor. Therefore the output voltage will slightly drop until the
lower threshold is tripped. Now the off-time will be reduced to increase the current in the inductor to charge up
the output voltage to the steady-state value. The current swing during this operation mode is strongly depending
on the current drawn by the load but will not exceed the programmed current limit. The output voltage during
comparator operation stays within the specified accuracy with minimum voltage ripple.
This architecture with adaptive slope compensation provides excellent transient load response and requiring
minimal output filtering. Internal softstart and loop compensation simplifies the design process while minimizing
the number of external components.
CURRENT LIMIT OPERATION
The current limit circuit employs a valley current sensing scheme. Current limit detection occurs during the
off-time through sensing of the voltage drop across the synchronous rectifier. The output voltage is reduced as
the power stage of the device operates in a constant current mode. The maximum continuous output current
(IOUT(CL)), before entering current limit (CL) operation, can be defined by Equation 1 as shown below:
IOUT(CL) = (1 - D) g IIN(DC)
(1)
The duty cycle (D) can be estimated by following Equation 2
V gh
D = 1 - IN
VOUT
(2)
SOFTSTART
The TPS61251 has an internal charging circuit that controls the current during the output capacitor charging and
prevents the converter from inrush current that exceeds the set current limit. For typical 100 µs the current is
ramped to the set current limit. After reaching the current limit threshold the output capacitor is charged with a
constant current until the programmed output voltage is reached. During the phase where VIN > VOUT the
rectifying switch is controlled by the current limit circuit and works as a linear regulator in constant current mode.
If then VIN = VOUT the converter starts switching and boosting up the voltage to its nominal output voltage by still
10
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
TPS61251
www.ti.com
SLVSAF7 – SEPTEMBER 2010
charging the capacitor with a constant current set by resistor RILIM. During constant current charging power
dissipation in the TPS61251 is increased resulting in a thermal rise or heating of the device. If the output
capacitor is very large charging time can be long and thermal rise high. To prevent overheating of the device
during the charge phase the current will be limited to a lower value when device temperature is high. Please refer
to THERMAL REGULATION.
POWER-SAVE MODE
The TPS61251 integrates a power save mode to improve efficiency at light load. In power save mode the
converter only operates when the output voltage trips below a set threshold voltage. It ramps up the output
voltage with several pulses and goes into power save mode once the output voltage exceeds the set threshold
voltage. During the power save operation when the output voltage is above the set threshold the converter turns
off some of the inner circuits to save energy.
The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM
mode.
SNOOZE MODE
During this enhanced power save mode, the converter will still maintain the output voltage with a tolerance of
±2%. The operating current in snooze mode, is however, drastically reduced to a typical value of 2 mA. This will
be achieved by turning off as much as possible of the inner regulation circuits. Load current in snooze mode is
limited to 2 mA. If the load current increases above 2 mA, the controller recognizes a further drop of the output
voltage and the device turns on again in order to charge the output capacitor to the programmed output voltage
again.
100% DUTY-CYCLE MODE
If VIN > VOUT the TPS61251 offers the lowest possible input-to-output voltage difference while still maintaining
current limit operation with the use of the 100% duty-cycle mode. In this mode, the PMOS switch is constantly
turned on. During this operation the output voltage follows the input voltage and will not fall below the
programmed value if the input voltage decreases below VOUT. The output voltage drop during 100% mode
depends on the load current and input voltage, and the resulting output voltage is calculated as:
VOUT = VIN - (DCR + rDS(on) ) g IOUT
(3)
with:
DCR is the DC resistance of the inductor
rDS(on) is the typical on-resistance of the PMOS switch
ENABLE
The device is enabled by setting EN pin to a voltage above 1 V. At first, the internal reference is activated and
the internal analog circuits are settled. Afterwards, the softstart is activated and the output voltage ramps up. The
output voltage reaches its nominal value as fast as the current limit settings and the load condition allows it.
The EN input can be used to control power sequencing in a system with several DC/DC converters. The EN pin
can be connected to the output of another converter, to drive the EN pin high and getting a sequencing of supply
rails. With EN = GND, the device enters shutdown mode.
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
11
TPS61251
SLVSAF7 – SEPTEMBER 2010
www.ti.com
UNDER-VOLTAGE LOCKOUT (UVLO)
The under voltage lockout circuit prevents the device from malfunctioning at low input voltages and the battery
from excessive discharge. It disables the output stage of the converter once the falling VIN trips the under-voltage
lockout threshold VUVLO which is typically 2.0V. The device starts operation once the rising VIN trips VUVLO
threshold plus its hysteresis of 100 mV at typ. 2.1V.
POWER GOOD
The device has a built in power good function to indicate whether the output voltage has reached the
programmed value and therefore the capacitor is fully charged. The power good output (PG) is set high if the
feedback voltage reaches 95% of its nominal value. The power good comparator operates even in shut down
mode when EN is set to low and/or VIN is turned off. This guaranties power good functionality until the capacitor
is discharged. The PG output goes low when VOUT drops below 2.3 V and indicates the discharge of the
capacitor. If the output voltage decreases further and goes below 2.0 V the converter disables all internal
circuitry. Therefore the PG open drain output becomes high resistive and follows the voltage the pull-up resistor
is connected to.
Since power good functionality is active as long as the output capacitors are charged the converter can be
disconnected from its supply but is still supplying the following circuitry with energy. A connected buck converter
or buck-boost converter can use this energy to support a follow-on circuit that needs additional energy for a
secured shut down.
INPUT OVER VOLTAGE PROTECTION
This converter has a input over voltage protection that protects the device from damage due to a voltage higher
than the absolute maximum rating of the input allows. If 6.5 V (typ.) at the input is exceeded the converter
completely shuts down to protect its inner circuitry as well as the circuit connected to VOUT . If the input voltage
drops below 6.4 V (typ.) it turns on the device again and enters normal start up again.
LOAD DISCONNECT AND REVERSE CURRENT PROTECTION
The TPS61251 has an intelligent load disconnect circuit that prevents current flow in any direction during
shutdown. In case of a connected battery and VIN > VOUT the converter will not discharge the battery during
shutdown of the converter. In the opposite case when a bulk capacitor is connected to VOUT and charged to a
higher voltage than VIN the converter prevents the capacitor from being discharged through the input load
(battery).
THERMAL REGULATION
The TPS61251 contains a thermal regulation loop that monitors the die temperature. If the die temperature rises
to values above 110 °C, the device automatically reduces the current to prevent the die temperature from further
increasing. Once the die temperature drops about 10 °C below the threshold, the device will automatically
increase the current to the target value. This function also reduces the current during a short-circuit-condition.
THERMAL SHUTDOWN
As soon as the junction temperature, TJ, exceeds 140°C (typical) the device enters thermal shutdown. In this
mode, the High Side and Low Side MOSFETs are turned-off. When the junction temperature falls about 20 °C
below the thermal shutdown, the device continues the operation.
12
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
TPS61251
www.ti.com
SLVSAF7 – SEPTEMBER 2010
APPLICATION INFORMATION
EXAMPLE
During the following Application Information section one specific example will be used to define and work with the
different equations.
Parameter
Symbol
Value
Unit
Input Voltage
VIN
3.6
V
Minimum Input Voltage
VIN(min)
2.9
V
Output Voltage
VOUT
5.5
V
Input Current Limit set by RILIM
ILIM
500
mA
Feedback Voltage
VFB
1.2
V
Switching Frequency
f
3.5
MHz
Estimated Efficiency
h
90
%
Inductor Value of Choice
L1
1.0
µH
OUTPUT VOLTAGE SETTING
The output voltage can be calculated by Equation 4:
æ
R ö
VOUT = VFB g ç 1 + 1 ÷
R
2 ø
è
(4)
To minimize the current through the feedback divider network and therefore increase efficiency during snooze
mode operation, R2 should be >240k. To keep the network robust against noise the resistor divider can also be
in the lower 100k values. Regarding the example, R1 is 1000 kΩ and R2 is 280 kΩ.
An external feed forward capacitor C1 is required for optimum load transient response. The value of C1 should
be 1000pF. The connection from FB pin to the resistor divider should be kept short and away from noise
sources, such as the inductor or the SW line.
AVERAGE INPUT CURRENT LIMIT
The average input current is set by selecting the correct external resistor value correlating to the required current
limit. Equation 5 is a guideline for selecting the correct resistor value:
1.0V
RILIM =
g 10,000
ILIM
(5)
For a current limit of 500 mA the resistor value will be 20 kΩ
MAXIMUM OUTPUT CURRENT
The maximum output current is set by RILIM and the input to output voltage ratio and can be calculated by
Equation 6:
V gh
IOUT(max) » ILIM g IN
VOUT
(6)
Following the example IOUT(max) will be 295 mA at 3.6 V input voltage and will decrease with lower input voltage
values due to the energy conservation.
INDUCTOR SELECTION
As for all switching power supplies two main passive components are required for storing the energy during
operation. This is done by an inductor and an output capacitor. The inductor must be connected between VIN pin
and SW pin to make sure that the TPS61251 device operates. To select the right inductor current rating the
programmed input current limit as well as the current ripple through the inductor is necessary. Estimation of the
maximum peak inductor current can be done using Equation 7.
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
13
TPS61251
SLVSAF7 – SEPTEMBER 2010
IL(max) = ILIM + DIL = ILIM +
www.ti.com
VIN(min) g D
Lg f
with D = 1 -
VIN(min) g h
VOUT
(7)
Regarding the example from above the current ripple (ΔIL) will be 290 mA and therefore an inductor with a rated
current of about 800 mA should be used.
The TPS61251 is designed to work with inductor values between 1.0 µH and 2.2 µH. For typical applications a
1.5 µH inductor is recommended. Regarding the conversion factor and the need of a sufficient output current the
rated current for the inductor drives into lower inductance values. Therefore the inductor value can be reduced
down to 1.0 µH without degrading the stability. Reduced inductance values increase the current ripple that needs
to be included in the peak current calculation for the inductor (Equation 7). Using standard boost converters the
current through the inductor is defined by the switch current limit of the converters switches and therefore bigger
inductors have to be chosen. TPS61251 allows the design engineer to reduce the current limit to the needs of
the application regardless the maximum switch current limit of the converter. Programming a lower current value
allows the use of smaller inductors without the danger to get into saturation.
OUTPUT CAPACITOR
The second energy storing device is the output capacitor. When selecting output capacitors for large pulsed
loads, the magnitude and duration of the pulsing current, together with the ripple voltage specification, determine
the choice of the output capacitor. Both the ESR of the capacitor and the charge stored in the capacitor each
cycle contribute to the output voltage ripple. The ripple due to the charge is approximately what results from
Equation 8
I
-I
gt
VRIPPLE(mV) = PULSE STANDBY on
COUT
(8)
where IPULSE and tON are the peak current and on time during transmission burst and ISTANDBY is the current in
standby mode. The above is a worst-case approximation assuming all the pulsing energy comes from the output
capacitor.
The ripple due to the capacitor ESR is defined by Equation 9
DVESR = (IPULSE - ISTANDBY ) g ESR
(9)
High capacitance values and low ESR can lead to instability in some internally compensated boost converters.
The internal loop compensation of the TPS61251 is optimized to be stable with output capacitor values greater
than 150mF with very low ESR.
Since big bulk capacitors can not be placed very close to the IC it is required to put a small ceramic capacitor of
about 4.7 µF as close as possible to the output terminals. This will reduce parasitic effects that can influence the
functionality of the converter.
Table 2. List of Bulk Capacitors
VENDOR (alphabetical order)
CAPACITANCE
PART NUMBER
Kemet
470 µF, 6.3 V, 55 mΩ
T520W477M006ATE055
Sanyo
470 µF, 6.3 V, 35 mΩ
6TPE470MAZU
14
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
TPS61251
www.ti.com
SLVSAF7 – SEPTEMBER 2010
INPUT CAPACITOR
Multilayer ceramic capacitors are an excellent choice for input decoupling of the step-up converter as they have
extremely low ESR and are available in small form factors. Input capacitors should be located as close as
possible to the device. While a 10mF input capacitor is sufficient for most applications, larger values may be used
to reduce input current ripple on the supply rail without limitations. Although low ESR tantalum capacitors may be
used.
NOTE
DC Bias effect: High capacitance ceramic capacitors have a DC Bias effect, which will
have a strong influence on the final effective capacitance. Therefore the right capacitor
value has to be chosen very carefully. Package size and voltage rating in combination with
material are responsible for differences between the rated capacitor value and the
effective capacitance. A 10 V rated 0805 capacitor with 10 µF can have an effective
capacitance of less 5 µF at an output voltage of 5 V.
CHECKING LOOP STABILITY
The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:
• Switching node, SW
• Inductor current, IL
• Output ripple voltage, VOUT(AC)
These are the basic signals that need to be measured when evaluating a switching converter. When the
switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the
regulation loop may be unstable. This is often a result of board layout and/or L-C combination.
As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between
the load transient takes place and the turn on of the PMOS switch, the output capacitor must supply all of the
current required by the load. VOUT immediately shifts by an amount equal to ΔI(LOAD) x ESR, where ESR is the
effective series resistance of COUT. ΔI(LOAD) begins to charge or discharge COUT generating a feedback error
signal used by the regulator to return VOUT to its steady-state value. The results are most easily interpreted when
the device operates in PWM mode.
During this recovery time, VOUT can be monitored for settling time, overshoot or ringing that helps judge the
converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin. Because the
damping factor of the circuitry is directly related to several resistive parameters (e.g., MOSFET rDS(on)) that are
temperature dependant, the loop stability analysis has to be done over the input voltage range, load current
range, and temperature range.
LAYOUT CONSIDERATIONS
For all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed close to the IC to keep the feedback connection short. To lay out the
ground, short traces and wide are recommended. This avoids ground shift problems, which can occur due to
superimposition of power ground current and the feedback divider.
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
15
TPS61251
SLVSAF7 – SEPTEMBER 2010
www.ti.com
10mm (0.39in)
VOUT
VIN
COUT
7mm (0.27in)
GND
CIN
L1
R1
R2
CFF
RILIM
GND
Figure 10. Suggested Layout without bulk capacitors (Top)
THERMAL INFORMATION
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependant issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the
power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:
• Improving the power dissipation capability of the PCB design
– E.g. increase of the GND plane on the top layer which is connected to the exposed thermal pad
– Use thicker cupper layer
• Improving the thermal coupling of the component to the PCB
• Introducing airflow in the system
Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where
high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design.
The maximum junction temperature (TJ) of the TPS61251 is 150°C.
16
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS61251
PACKAGE OPTION ADDENDUM
www.ti.com
2-Oct-2010
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
TPS61251DSGR
ACTIVE
WSON
DSG
8
3000
TBD
Call TI
Call TI
Purchase Samples
TPS61251DSGT
ACTIVE
WSON
DSG
8
250
TBD
Call TI
Call TI
Purchase Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DLP® Products
www.dlp.com
Communications and
Telecom
www.ti.com/communications
DSP
dsp.ti.com
Computers and
Peripherals
www.ti.com/computers
Clocks and Timers
www.ti.com/clocks
Consumer Electronics
www.ti.com/consumer-apps
Interface
interface.ti.com
Energy
www.ti.com/energy
Logic
logic.ti.com
Industrial
www.ti.com/industrial
Power Mgmt
power.ti.com
Medical
www.ti.com/medical
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
RFID
www.ti-rfid.com
Space, Avionics &
Defense
www.ti.com/space-avionics-defense
RF/IF and ZigBee® Solutions www.ti.com/lprf
Video and Imaging
www.ti.com/video
Wireless
www.ti.com/wireless-apps
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2010, Texas Instruments Incorporated