Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET DESCRIPTION Monolithic overload protected logic level power MOSFET in a surface mount plastic envelope, intended as a general purpose switch for automotive systems and other applications. APPLICATIONS General controller for driving lamps small motors solenoids FEATURES Vertical power DMOS output stage Overload protected up to 125˚C ambient Overload protection by current limiting and overtemperature sensing Latched overload protection reset by input 5 V logic compatible input level Control of power MOSFET and supply of overload protection circuits derived from input Low operating input current permits direct drive by micro-controller ESD protection on all pins Overvoltage clamping for turn off of inductive loads BUK113-50DL QUICK REFERENCE DATA SYMBOL PARAMETER MIN. MAX. UNIT VDS Continuous drain source voltage - 50 V ID Drain current limiting 4 8 A PD Total power dissipation - 4 W Tj Continuous junction temperature - 150 ˚C RDS(ON) Drain-source on-state resistance - 200 mΩ FUNCTIONAL BLOCK DIAGRAM DRAIN O/V CLAMP POWER INPUT MOSFET RIG LOGIC AND PROTECTION SOURCE Fig.1. Elements of the TOPFET. PINNING - SOT223 PIN PIN CONFIGURATION DESCRIPTION 1 input 2 drain 3 source 4 drain (tab) January 1996 SYMBOL 4 D TOPFET I 2 1 1 3 P S Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET BUK113-50DL LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS ID II IIRM PD Tstg Tj PARAMETER CONDITIONS 1 Continuous drain source voltage Continuous drain current2 Continuous input current Non-repetitive peak input current Total power dissipation Storage temperature Continuous junction temperature clamping tp ≤ 1 ms Tsp = 90 ˚C normal operation MIN. MAX. UNIT -55 - 50 self limiting 3 10 4 150 150 V A mA mA W ˚C ˚C ESD LIMITING VALUE SYMBOL PARAMETER CONDITIONS VC Electrostatic discharge capacitor voltage Human body model; C = 250 pF; R = 1.5 kΩ MIN. MAX. UNIT - 2 kV OVERVOLTAGE CLAMPING LIMITING VALUES At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients. SYMBOL PARAMETER CONDITIONS EDSM Non-repetitive clamping energy EDRM Repetitive clamping energy Tb ≤ 25 ˚C; IDM < ID(lim); inductive load Tb ≤ 75 ˚C; IDM = 50 mA; f = 250 Hz MIN. MAX. UNIT - 100 mJ - 4 mJ OVERLOAD PROTECTION LIMITING VALUES With the protection supply provided via the input pin, TOPFET can protect itself from short circuit loads. Overload protection operates by means of drain current limiting and activating the overtemperature protection. SYMBOL PARAMETER CONDITIONS VISP VDDP Protection supply voltage3 for valid protection Protected drain source supply voltage VIS = 5 V MIN. MAX. UNIT 4 - 35 V V THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT measured to pin 4 solder point - 12 15 K/W on PCB of fig. 3 on minimum footprint PCB - 70 100 - K/W K/W Thermal resistance Rth j-sp Junction to solder point Application information Rth j-a Junction to ambient 1 Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy. 2 Refer to OVERLOAD PROTECTION CHARACTERISTICS. 3 The input voltage for which the overload protection circuits are functional. January 1996 2 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET BUK113-50DL OVERLOAD PROTECTION CHARACTERISTICS TOPFET switches off to protect itself when there is an overload fault condition. It remains latched off until reset by the input. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VIS = 5 V 4 6 8 A VDD = 13 V; VIS = 5 V - tbf - J 150 165 - ˚C MIN. TYP. MAX. UNIT 50 55 - V Overload protection ID(lim) Drain current limiting Short circuit load protection EDS(TO) Overload threshold energy Overtemperature protection Tj(TO) Threshold junction temperature VIS = 5 V STATIC CHARACTERISTICS Tb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS V(CL)DSS Drain-source clamping voltage VIS = 0 V; ID = 10 mA V(CL)DSS Drain-source clamping voltage VIS = 0 V; IDM = 200 mA; tp ≤ 300 µs; δ ≤ 0.01 - 56 70 V IDSS Off-state drain current VDS = 45 V; VIS = 0 V - 0.5 2 µA IDSS Off-state drain current VDS = 50 V; VIS = 0 V - 1 20 µA IDSS Off-state drain current VDS = 40 V; VIS = 0 V; Tj = 100 ˚C - 10 100 µA RDS(ON) Drain-source on-state resistance1 VIS = 5 V; IDM = 1 A; tp ≤ 300 µs; δ ≤ 0.01 - 150 200 mΩ INPUT CHARACTERISTICS Tb = 25 ˚C unless otherwise specified. The supply for the logic and overload protection is taken from the input. SYMBOL PARAMETER CONDITIONS VIS(TO) IIS Input threshold voltage Input supply current VDS = 5 V; ID = 1 mA normal operation; IISL Input supply current protection latched; VISR V(CL)IS RIG Protection latch reset voltage2 Input clamping voltage Input series resistance II = 1.5 mA to gate of power MOSFET VIS = 5 V VIS = 4 V VIS = 5 V VIS = 3.5 V MIN. TYP. MAX. UNIT 1.7 1 6 - 2.2 330 170 500 250 2.2 7.5 33 2.7 450 270 650 400 3.5 - V µA µA µA µA V V kΩ SHADED BOXES Values shown within shaded boxes are estimated for the objective specification. These will not be fixed until the evaluation of prototype samples. 1 Continuous input voltage. The specified pulse width is for the drain current. 2 The input voltage below which the overload protection circuits will be reset. January 1996 3 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET BUK113-50DL MOUNTING INSTRUCTIONS PRINTED CIRCUIT BOARD Dimensions in mm. Dimensions in mm. 3.8 36 min 1.5 min 18 60 1.5 min 4.5 4.6 9 2.3 6.3 10 (3x) 1.5 min 7 4.6 15 50 Fig.3. PCB for thermal resistance and power rating. PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35 µm thick). Fig.2. Soldering pattern for surface mounting. January 1996 4 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET BUK113-50DL MECHANICAL DATA Dimensions in mm Net Mass: 0.11 g 0.95 0.85 handbook, full pagewidth S 0.1 S seating plane 6.7 6.3 0.32 0.24 B 3.1 2.9 0.2 M A 4 A 0.10 0.01 16 o max 16 3.7 3.3 o 1 1.80 max 7.3 6.7 10 o max 2 3 0.80 0.60 2.3 4.6 0.1 M B (4x) MSA035 - 1 Fig.4. SOT223 surface mounting package1. 1 For further information, refer to surface mounting instructions for SOT223 envelope. Epoxy meets UL94 V0 at 1/8". January 1996 5 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET BUK113-50DL DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1996 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. January 1996 6 Rev 1.000