VISHAY FA38SA50LCP

FA38SA50LCP
Vishay Semiconductors
Power MOSFET, 38 A
FEATURES
• Fully isolated package
• Easy to use and parallel
• Low on-resistance
• Dynamic dV/dt rating
• Fully avalanche rated
SOT-227
• Simple drive requirements
• Low drain to case capacitance
• Low internal inductance
• UL pending
• Compliant to RoHS directive 2002/95/EC
• Designed for industrial level
PRODUCT SUMMARY
VDSS
500 V
RDS(on)
0.13 Ω
ID
38 A
Type
Modules - MOSFET
Package
SOT-227
DESCRIPTION
Third Generation Power MOSFETs from Vishay HPP provide
the designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The SOT-227 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 500 W. The low thermal resistance
of the SOT-227 contribute to its wide acceptance
throughout the industry.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
Continuous drain current at VGS 10 V
TEST CONDITIONS
TC = 25 °C
ID
TC = 100 °C
IDM (1)
Pulsed drain current
Power dissipation
PD
MAX.
UNITS
38
24
A
150
TC = 25 °C
Linear derating factor
500
W
4.0
W/°C
VGS
± 20
V
Single pulse avalanche energy
EAS (2)
580
mJ
Avalanche current
IAR (1)
38
A
(1)
Gate to source voltage
Repetitive avalanche energy
EAR
50
mJ
Peak diode recovery dV/dt
dV/dt (3)
10
V/ns
Operating junction and storage temperature range
TJ, TStg
- 55 to + 150
°C
VISO
2.5
kV
1.3
Nm
Insulation withstand voltage (AC-RMS)
Mounting torque
M4 screw
Notes
(1) Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
(2) Starting T = 25 °C, L = 0.80 mH, R = 25 Ω, I
J
g
AS = 38 A (see fig. 12)
(3) I
SD ≤ 38 A, dI/dt ≤ 410 A/μs, VDD ≤ V(BR)DSS, TJ ≤ 150 °C
Document Number: 94547
Revision: 11-May-10
For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
www.vishay.com
1
FA38SA50LCP
Power MOSFET, 38 A
Vishay Semiconductors
THERMAL RESISTANCE
PARAMETER
SYMBOL
TYP.
MAX.
Junction to case
RthJC
-
0.25
Case to sink, flat, greased surface
RthCS
0.05
-
UNITS
°C/W
ELECTRICAL CHARACTERISTCS (TJ = 25 °C unless otherwise noted)
PARAMETER
SYMBOL
Drain to source breakdown voltage
Breakdown voltage temperature
coefficient
Static drain to source on-resistance
TEST CONDITIONS
V(BR)DSS
VGS = 0 V, ID = 1.0 mA
ΔV(BR)DSS/ΔTJ
RDS(on) (1)
Gate threshold voltage
VGS(th)
Forward transconductance
gfs
Drain to source leakage current
IDSS
Gate to source forward leakage
IGSS
Gate to source reverse leakage
Total gate charge
Qg
Gate to source charge
Qgs
Gate to drain ("Miller") charge
Qgd
Turn-on delay time
td(on)
Rise time
tr
Turn-off delay time
td(off)
Fall time
tf
Internal source inductance
LS
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Reference to 25 °C, ID = 1 mA
MIN.
TYP.
MAX.
UNITS
500
-
-
V
-
0.66
-
V/°C
-
-
0.13
Ω
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
VDS = 25 V, ID = 23 A
S
VGS = 10 V, ID = 23 A
22
-
-
VDS = 500 V, VGS = 0 V
-
-
50
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
500
VGS = 20 V
-
-
200
VGS = - 20 V
-
-
- 200
ID = 38 A
VDS = 400 V
VGS = 10 V; see fig. 6 and 13 (1)
-
280
420
-
37
55
-
150
220
-
42
-
-
340
-
-
200
-
-
330
-
-
5.0
-
-
6900
-
-
1600
-
-
580
-
MIN.
TYP.
MAX.
-
-
38
-
-
150
VDD = 250 V
ID = 38 A
Rg = 10 Ω (ιντερναλ)
RD = 8 Ω, see fig. 10 (1)
Between lead, and center of die
contact
VGS = 0 V
VDS = 25 V
f = 1.0 MHz, see fig. 5
μA
nA
nC
ns
nH
pF
Note
(1) Pulse width ≤ 300 μs, duty cycle ≤ 2 %
SOURCE-DRAIN RATINGS AND CHARACTERISTICS
PARAMETER
SYMBOL
Continuous source current
(body diode)
D
IS
Pulsed source current (body diode)
TEST CONDITIONS
ISM (1)
(2)
Diode forward voltage
VSD
Reverse recovery time
trr
Reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the integral reverse
p-n junction diode.
UNITS
A
G
S
TJ = 25 °C, IS = 38 A, VGS = 0 V
TJ = 25 °C, IF = 38 A; dI/dt = 100 A/μs (2)
-
-
1.3
V
-
830
1300
ns
-
15
22
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS + LD)
Notes
Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
(2) Pulse width ≤ 300 μs, duty cycle ≤ 2 %
(1)
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For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
Document Number: 94547
Revision: 11-May-10
FA38SA50LCP
Power MOSFET, 38 A
3.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
ID , Drain-to-Source Current (A)
TOP
100
10
4.5V
20μs PULSE WIDTH
TC = 25°C
1
1
10
A
RDS(on) , Drain-to-Source On Resistance
(Normalized)
1000
100
Vishay Semiconductors
ID = 38A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VDS , Drain-to-Source Voltage (V)
16000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
60
80 100 120 140 160
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
14000
C, Capacitance (pF)
I D , Drain-to-Source Current (A)
40
Fig. 4 - Normalized On-Resistance vs. Temperature
TOP
100
12000
10000
Ciss
8000
6000
Coss
4000
Crss
4.5V
1
2000
20μs PULSE WIDTH
TJ = 150 °C
10
10
0
100
1
VDS, Drain-to-Source Voltage (V)
VGS , Gate-to-Source Voltage (V)
20
100
TJ = 150 ° C
TJ = 25 ° C
10
V DS = 50V
20μs PULSE WIDTH
4
5
6
7
VGS , Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
Document Number: 94547
Revision: 11-May-10
100
Fig. 5 - Typical Capacitance vs.
Drain to Source Voltage
1000
1
10
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
I D , Drain-to-Source Current (A)
20
TJ , Junction Temperature ( °C)
Fig. 1 - Typical Output Characteristics
1000
VGS = 10V
0
ID = 38A
VDS = 400V
VDS = 250V
VDS = 100V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
8
0
80
160
240
320
400
QG , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs.
Gate to Source Voltage
For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
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FA38SA50LCP
Power MOSFET, 38 A
Vishay Semiconductors
ISD , Reverse Drain Current (A)
1000
Current regulator
Same type as D.U.T.
100
50 KΩ
.2 µF
12 V
TJ = 150 ° C
.3 µF
10
D.U.T.
+
V
- DS
TJ = 25 ° C
1
VGS
3 mA
0.1
0.2
V GS = 0 V
0.4
0.6
0.8
1.0
1.2
1.4
IG
ID
Current sampling resistors
1.6
VSD ,Source-to-Drain Voltage (V)
Fig. 7 - Typical Source Drain Diode Forward Voltage
Fig. 10 - Gate Charge Test Circuit
1000
ID , Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY RDS(on)
RD
VDS
100
10us
VGS
D.U.T.
RG
+
- VDD
100us
10
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
1ms
1
TC = 25 °C
TJ = 150 °C
Single Pulse
1
10
10ms
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
QG
Fig. 11 - Switching Time Test Circuit
VDS
90%
10V
QGS
QGD
VG
0%
GS
Charge
Fig. 9 - Basic Gate Charge Waveform
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td(on)
tr
t d(off)
tf
Fig. 12 - Switching Time Waveforms
For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
Document Number: 94547
Revision: 11-May-10
FA38SA50LCP
Power MOSFET, 38 A
Vishay Semiconductors
Thermal Response (Z thJC )
1
0.50
0.1
0.20
0.10
0.05
PDM
0.02
0.01
0.01
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t1, Rectangular Pulse Duration (sec)
Fig. 13 - Maximum Effective Transient Thermal Impedance, Junction to Case
V(BR)DSS
15 V
L
VDS
tp
Driver
D.U.T
RG
+
- VDD
IAS
20 V
tp
A
I AS
0.01 Ω
Fig. 14 - Unclamped Inductive Test Circuit
Fig. 15 - Unclamped Inductive Waveforms
EAS , Single Pulse Avalanche Energy (mJ)
1200
TOP
1000
BOTTOM
ID
17A
24A
38A
800
600
400
200
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
Fig. 16 - Maximum Avalanche Energy vs. Drain Current
Document Number: 94547
Revision: 11-May-10
For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
www.vishay.com
5
FA38SA50LCP
Power MOSFET, 38 A
Vishay Semiconductors
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
3
+
2
-
-
4
+
1
RG
•
•
•
•
+
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - Device under test
-
VDD
Fig. 17 - Peak Diode Recovery dV/dt Test Circuit
Driver Gate Drive
D=
Period
P.W.
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig. 18 - For N-Channel Power MOSFETs
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For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
Document Number: 94547
Revision: 11-May-10
FA38SA50LCP
Power MOSFET, 38 A
Vishay Semiconductors
ORDERING INFORMATION TABLE
Device code
F
A
38
S
A
50
LC
P
1
2
3
4
5
6
7
8
1
-
Power MOSFET
2
-
Generation 3, MOSFET silicon, DBC construction
3
-
Current rating (38 = 38 A)
4
-
Single switch (see Circuit Configuration table)
5
-
SOT-227
6
-
Voltage rating (50 = 500 V)
7
-
Low charge
8
-
P = Lead (Pb)-free
CIRCUIT CONFIGURATION
CIRCUIT
CIRCUIT
CONFIGURATION CODE
CIRCUIT DRAWING
D (3)
Lead assignment
S
Single switch no diode
S
G (2)
D
4
3
1
2
S (1-4)
S
G
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95036
Packaging information
www.vishay.com/doc?95037
Document Number: 94547
Revision: 11-May-10
For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
www.vishay.com
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Outline Dimensions
Vishay Semiconductors
SOT-227
DIMENSIONS in millimeters (inches)
38.30 (1.508)
37.80 (1.488)
Chamfer
2.00 (0.079) x 45°
4 x M4 nuts
Ø 4.40 (0.173)
Ø 4.20 (0.165)
-A3
4
6.25 (0.246)
12.50 (0.492)
25.70 (1.012)
25.20 (0.992)
-B-
1
2
R full
7.50 (0.295)
15.00 (0.590)
30.20 (1.189)
29.80 (1.173)
8.10 (0.319)
4x
7.70 (0.303)
2.10 (0.082)
1.90 (0.075)
0.25 (0.010) M C A M B M
2.10 (0.082)
1.90 (0.075)
-C-
12.30 (0.484)
11.80 (0.464)
0.12 (0.005)
Notes
• Dimensioning and tolerancing per ANSI Y14.5M-1982
• Controlling dimension: millimeter
Document Number: 95036
Revision: 28-Aug-07
For technical questions, contact: [email protected]
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Document Number: 91000
Revision: 11-Mar-11
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