OKI Semiconductor MSM6585 FEDL6585-03 Issue Date: Aug. 25, 2004 ADPCM Voice Synthesis IC GENERAL DESCRIPTION The MSM6585 is an version-up product of the MSM5205 voice synthesis IC. Mainly improved points are improvement for the precision of an internal DA converter, a built-in low-pass filter, and expansion on the sampling frequency. The MSM6585 does not include a control circuit to drive an external memory similar to the MSM5205. Therefore, the MSM6585 can be connected with not only semiconductor memories, but other memory media (CD-ROM, etc.) by the control of CPU. FEATURES • 4-bit ADPCM method • Built-in 12-bit DA converter • Built-in low-pass filter (LPF) (–40dB/oct) • Sampling frequencies: 4k/8k/16k/32kHz • Master clock frequency (ceramic oscillator) : 640kHz • Voice data synthesis: Supported by voice analysis editing tool AR207 • Package options: 18-pin plastic DIP (DIP18-P-300-2.54) (MSM6585RS) 24-pin plastic SOP (SOP24-P-430-1.27-K) (MSM6585MAZXXX) 30-pin plastic SSOP (SSOP30-P-56-0.65-K) (MSM6585MBZXXX) DIFFERENCES BETWEEN MSM6585 AND MSM5205 • Master clock frequency: • Sampling frequency: • ADPCM bit length: • DA Converter: • Low-pass filter: • Overflow preventing circuit: • Power supply voltage: • Operating current consumption: • Operating temperature: • D3 to D0 input timing MSM6585 640kHz 4k/8k/16k/32kHz 4-bit 12-bit Included (–40dB/oct) Included 4.5 to 5.5V 10mA –40 to +85°C MSM5205 384kHz 4k/6k/8kHz 3-bit/4-bit 10-bit Not included Not included 3.0 to 6.0V 4mA –30 to +70°C VCK (O) D3 - D0 input timing ADPCM Data MSM6585 MSM5205 1 MSM6585 ¡ Semiconductor BLOCK DIAGRAM GND VDD D3 D2 D1 D0 4-Bit LATCH 4 ADPCM Synthesizer 12-Bit DAC 12 – + LPF AOUT DAO OSC XT Timing Controller XT S1 S2 RESET TEST CIRCUIT VCK T1 T2 T3 T4 2 MSM6585 ¡ Semiconductor PIN CONFIGURATION (TOP VIEW) S1 1 S2 2 T3 3 D0 4 D1 5 D2 6 D3 7 T4 8 GND 9 S1 1 24 VDD S2 2 23 18 VDD XT T3 3 22 XT 17 XT NC 4 21 NC 16 XT D0 5 20 RESET NC 6 19 NC D1 7 18 VCK 15 RESET 14 VCK D2 8 17 T2 13 T2 NC 9 16 T1 12 T1 D3 T4 10 11 15 14 NC DAO GND 12 13 AOUT 11 DAO 10 AOUT NC : No connection 24-Pin Plastic SOP 18-Pin Plastic DIP S1 1 30 VDD S2 2 29 XT NC 3 28 NC NC 4 27 NC NC 5 26 NC T3 6 25 XT D0 7 24 RESET D1 8 23 VCK D2 9 22 T2 D3 NC 10 11 21 20 T1 NC NC 12 19 NC NC T4 13 14 18 NC 17 DAO GND 15 16 AOUT NC : No connection 30-Pin Plastic SSOP 3 MSM6585 ¡ Semiconductor PIN DESCRIPTION Pin DIP SOP SSOP 1 1 1 Symbol Type Pins to determine the sampling frequency. S1 I 2 2 2 S2 3 3 6 T3 I 7-10 D0-D3 I 4-7 5, 7, 8, 10 Description The sampling frequencies of 32k, 16k, 8k, and 4kHz can be selected by combinations. (See the sampling frequencies in FUNCTIONAL DESCRIPTION on the selection of combinations.) Pin to test the internal circuit. Set this pin to a high level or make it open because it has a built-in pull-up resistor. Input pins for ADPCM data. Pin to test the internal circuit. Make this pin open. 8 11 14 T4 O Pin to test the internal circuit. Make this pin open. 9 12 15 GND — Ground pin Pin to output the analog voice from the low-pass filter. Connect a 0.01 mF 10 13 16 AOUT O capacitor to this pin. (See the AOUT connecting circuit in FUNCTIONAL DESCRIPTION on the connecting circuit.) DAO 11 14 17 12 16 21 T1 13 17 22 T2 14 18 23 VCK O I Pin to output the analog voice from the DA converter. Pins to test the internal circuit. Set these pins to a low level or make them open because pull-down resistors are included. This pin outputs the sampling frequency selected by the combinations of O S1 and S2. The voice synthesis starts or stops by synchronizing with VCK. Reset pin. The voice synthesis circuit is initialized by synchronizing with 15 20 24 RESET I VCK. If this pin is set to a high level, the D0 to D3 data inputs are disabled by synchronizing with VCK. The AOUT and DA0 pins output 1/2 VDD and become the state of no voice. 16 22 25 XT I 17 23 29 XT O 18 24 30 VDD — Pin to connect an oscillator. When the external clock is used, input it from this pin. Pin to connect an oscillator. When the external clock is used, make this pin open. Power supply pin. Insert a bypass capacitor of 0.1 mF or more between this pin and the GND pin. 4 MSM6585 ¡ Semiconductor ABSOLUTE MAXIMUM RATINGS (GND=0 V) Rating Unit Ta = 25°C –0.3 to +7.0 V Ta = 25°C –0.3 to VDD+0.3 V — –55 to +150 °C Symbol Condition Power Supply Voltage VDD Input Voltage VIN Storage Temperature TSTG Parameter RECOMMENDED OPERATING CONDITIONS Parameter Power Supply Voltage (GND = 0V) Symbol Condition Range Unit VDD — 4.5 to 5.5 V Operating Temperature Top — –40 to +85 °C Master Clock Frequency fOSC oscillator connection 640 kHz ELECTRICAL CHARACTERISTICS DC Characteristics (VDD=4.5 to 5.5V, GND=0V, Ta=–40 to +85°C) Parameter Symbol Condition Min. Typ. Max. Unit "H" Input Voltage VIH — 0.8¥VDD — VDD+0.1 V "L" Input Voltage VIL — –0.1 — 0.2¥VDD V "H" Output Voltage VOH VCK: IOH = –40mA VDD–0.4 — — V "L" Output Voltage VOL VCK: IOL = 40mA — — 0.4 V "H" Input Current IIH1 T1, T2, RESET: VIH = VDD 20 150 400 mA "H" Input Current IIH2 S1, S2, D0 - D3, T3: VIH = VDD — — 10 mA "H" Input Current IIH3 XT: VIH = VDD — — 20 mA "L" Input Current IIL1 T3: VIL = 0V –400 –120 –20 mA "L" Input Current IIL2 S1, S2, D0 - D3, T1, T2, RESET: VIL=0V –10 — — mA "L" Input Current IIL3 XT=VIL=0V –20 — — mA IDD fosc=640kHz, No load — 5 10 mA | VDAE | No load — — 40 mV DA Output Impedance RDAO — 10 — 40 kW LPF Load Resistance RAOUT — 50 — — kW Current Consumption DA Output Relative Error 5 MSM6585 ¡ Semiconductor AC Characteristics Parameter Symbol Condition Min. Typ. fduty — 40 50 60 % 2¥tVCK — — ms — — 3 ms tVCK/2 — — ms Original Oscillation Duty Cycle RESET Input Pulse Width tW(RST) Data Setup Time tS Data Hold Time tH fSAM = 4kHz ... = 8kHz ... =16kHz ... =32kHz ... tVCK = 250ms = 125ms = 62.5ms =31.25ms Max. Unit When data is shared with the MSM5205, note that the D3 to D0 selection timings of the MSM6585 and MSM5205 are different. (Refer to DIFFERENCES BETWEEN MSM6585 AND MSM5205.) TIMING DIAGRAM VCK (O) tVCK RESET (I) tW(RST) D3 - D0 (I) IC internalD3 - D0 selection timings tH ADPCM1 ADPCM2 tS ADPCMN ADPCM N+1 tVCK/8 AOUT, DAO (O) The VCK clock rising and falling edges are reversed between the MSM5205 and the MSM6588, as indicated in DIFFERENCES BETWEEN MSM6585 AND MSM5205. Note that the MSM6585 cannot accept data if the MSM5205 controls to repeat valid and invalid each half cycle, when the MSM5205 is replaced with the MSM6585. 6 MSM6585 ¡ Semiconductor FUNCTIONAL DESCRIPTION 1. Sampling Frequency The relationship of the sampling frequencies on S1 and S2, and the cutoff frequencies are listed below. 2. S1 S2 Sampling frequency (fSAM) Cutoff frequency (fCUT) L L 4 kHz 1.6 kHz H L 8 kHz 3.2 kHz L H 16 kHz 6.4 kHz H H 32 kHz 12.8 kHz AOUT Connecting Circuit Connect a 0.01mF capacitor to the AOUT pin. The circuit diagram is as shown below. MSM6585 Amplifier Speaker AOUT 0.01mF Even when the DAO pin is used, connect a 0.01mF capacitor to the AOUT pin. This capacitor is used for the improvement of a voice quality. 3. Voice Output The MSM6585 has two voice output pins. The DAO is direct output pin from the internal DA converter. The AOUT is a pin to output a voice after which the DAO output passed a built-in LPF. 3.1 DA Converter Output Waveform The output amplitude from the DA converter is max. (4095/4096) ¥ VDD and becomes a stair step waveform synchronized with the sampling frequency. The DAO output impedance varies in the ranges from 10kW to 40kW. Therefore, determine the filter constant so that the resistor variation does not have influence on the cutoff frequency of the filter. 7 MSM6585 ¡ Semiconductor 3.2 Low-pass Filter Output The cutoff frequency of the low-pass filter varies in proportion to the sampling frequency. The following figure shows the low-pass filter characteristics in the sampling frequency 8kHz. Damping factor (dB) 0 –20 –40 –60 100 1k 10k Frequency (Hz) 4. Oscillation Following show external circuit diagrams using a ceramic resonator, KBR-640B made by Kyocera Corp. and CSB640P made by Murata MFG. Co., Ltd. Kyocera Corp. KBR-640B used Murata MFG. Corp. CSB640P used MSM6585 MSM6585 XT XT XT XT 1MW 640kHz 220pF 640kHz 220pF 100pF 100pF 8 MSM6585 ¡ Semiconductor APPLICATION CIRCUITS Centronics Interface Circuit (sampling frequency : 8kHz) +5V 14 0.1mF 10 4 1 BUSY 6 STROBE MSM4013 11 3 RESET 2 5 8 7 12 9 13 9 14 7 D0 0.1mF S1 T3 VDD AOUT RESET VCK MSM6585 T4 T1 ADPCM S2 DECODER GND T2 D3 D2 AMP 0.01mF DAO XT D1 D0 XT 640kHz 5 D1 D2 D3 D4 D5 3 MSM4019 13 1 12 6 11 4 10 2 D6 15 D7 8 16 0.1mF Centronics Timing Chart RESET RES MIN250msec First byte DATA STROBE 125msec VCK KA High nibble Low nibble KB BUSY 9 MSM6585 ¡ Semiconductor Example of Interface Circuit with 256K-bit EPROM The circuit example and timing diagram that used the 256K-bit EPROM are shown below. MSM27256 A0 - A10 A11 A12 A13 A14 CE O0 O4 O1 O5 O2 O6 O3 O7 11 O0 - O11 O12 MSM4040 CL RESET B1 A1 B2 A2 B3 A3 B4 A4 KB MSM4019 D2 D3 D4 KA D1 640kHz Q2 D2 Q2 MSM4013 CL1 R1D1 S2 Q1 R2 CL2 D0 S1 VCK D1 D2 D3 MSM6585 RESET S2 S1 AOUT XT XT 0.01mF 100kW START SW CL RESET 10kW Q1 Q2 Q3 MSM4040 Q4 (MSM4025) 0.1mF 100kW M6585 VCK (O) START SW M4013 S1 M4013 Q1 (M6585 RESET) M4013 Q2 (Lower 4-bit) Q2 (Upper 4-bit) M4040 Q1 Q2 Q12 M4040 Q3 Q4 10 MSM6585 ¡ Semiconductor PAD CONFIGURATION Pad Layout Product name Function Die size Die thickness Pad size Substrate voltage MSM6585 ADPCM voice synthesis IC ¥ = 2.92 mm, Y = 3.58 mm 350 µm ±30 µm 130 µm ¥ 130 µm GND Y 12 8 7 13 X 16 3 17 20 1 2 Pad Coordiantes (The die center is located at X=0, Y=0) (Unit: mm) PAD No. PAD Name X-axis Y-axis PAD No. PAD Name X-axis Y-axis 1 S1 377 –1635 11 AOUT 38 1635 2 S2 819 –1635 12 DAO –1125 1635 3 T3 1305 –1635 13 T1 –1305 1579 4 D0 1305 –943 14 T2 –1305 1009 5 D1 1305 44 15 VCK –1305 –88 6 D2 1305 1095 16 RESET –1305 –818 7 D3 1305 1635 17 XT –1281 –1635 8 T4 830 1635 18 XT –529 –1635 9 AVSS 447 1580 19 VDD –299 –1549 10 VSS 267 1580 20 AVDD –119 –1549 11 MSM6585 ¡ Semiconductor PACKAGE DIMENSIONS (Unit : mm) DIP18-P-300-2.54 Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 1.30 TYP. 12 MSM6585 ¡ Semiconductor (Unit : mm) SOP24-P-430-1.27-K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.58 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 13 MSM6585 ¡ Semiconductor (Unit : mm) SSOP30-P-56-0.65-K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.19 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 14 1Semiconductor MSM6585 REVISION HISTORY Document No. Date Page Previous Current Edition Edition Description E2D0011-39-91 Sep. 1999 — — Final edition 1 FEDL6585-02 Jun. 30, 2004 — — Final edition 2 1 1 Changed the voice analysis editing tools from AR203 and AR204 to AR207. 1 1 Changed the package product names from MSM6585GS-K and MSM6585GS-AK to MSM6585MAZXXX and MSM6585MBZXXX, respectively. 10 10 Changed the product name of the circuit block in the upper-left portion of the block diagram from MSM4013 to MSM4040. FEDL6585-03 Aug. 25, 2004 15 1Semiconductor MSM6585 NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not, unless specifically authorized by Oki, authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2004 Oki Electric Industry Co., Ltd. 16