EVALUATION KIT AVAILABLE MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers General Description Benefits and Features The MAX17598/MAX17599 low IQ, active clamp currentmode PWM controllers contain all the control circuitry required for the design of wide-input isolated/non-isolated forward-converter industrial power supplies. The MAX17598 is well-suited for universal input (rectified 85V AC to 265V AC) or telecom (36V DC to 72V DC) power supplies. The MAX17599 is optimized for low-voltage industrial supplies (4.5V DC to 36V DC). S Active Clamp, Peak Current-Mode Forward PWM Controller The devices include an AUX driver that drives an auxiliary MOSFET (clamp switch) that helps implement the active-clamp transformer reset topology for forward converters. Such a reset topology has several advantages including reduced voltage stress on the switches, transformer size reduction due to larger allowable flux swing, and improved efficiency due to elimination of dissipative snubber circuitry. Programmable dead time between the AUX and main driver allows for zero voltage switching (ZVS). S Programmable 100kHz to 1MHz Switching Frequency The switching frequency is programmable from 100kHz to 1MHz for the devices with an accuracy of Q8% using an external resistor. This allows optimization of the magnetic and filter components, resulting in compact, cost-effective isolated/nonisolated power supplies. For EMI-sensitive applications, the ICs incorporate a programmable frequency-dithering scheme, enabling low-EMI spread-spectrum operation. An input undervoltage lockout (EN/UVLO) is provided for programming input-supply start voltage, and to ensure proper operation during brownout conditions. EN/UVLO input is also used to turn on/off the ICs. Input overvoltage (OVI) protection scheme is provided to make sure that the regulator shuts down when input supply exceeds its maximum allowed value. To control inrush current, the devices incorporate an SS pin to set the soft-start time for the regulators. Power dissipation under fault conditions is minimized by hiccup overcurrent protection (hiccup mode). Soft-stop feature provides safe discharging of the clamp capacitor when the device is turned off, and allows the controller to restart in a wellcontrolled manner. Additionally, negative current limit is provided in the current-sense circuitry, helping limit clamp switch current under dynamic operating conditions. SYNC feature is provided to synchronize multiple converters to a common external clock in noise-sensitive applications. Overtemperature fault triggers thermal shutdown for reliable protection of the device. The ICs are available in a 16-pin, TQFN package with 0.5 mm lead spacing. S 20FA Startup Current in UVLO S 4.5V to 36V Input-Supply Operating Range (MAX17599) S Programmable Input Undervoltage Lockout S Programmable Input Overvoltage Protection S Switching Frequency Synchronization S Programmable Frequency Dithering for Low EMI Spread-Spectrum Operation S Programmable Dead Time S Adjustable Soft-Start S Programmable Slope Compensation S Fast Cycle-by-Cycle Peak-Current-Limit S 70ns Internal Leading-Edge Current-Sense Blanking S Hiccup Mode Output Short-Circuit Protection S Soft-Stop for Well-Controlled Clamp Capacitor Discharge S Negative Clamp-Switch Current Limit S 3mm x 3mm, Lead-Free 16-Pin TQFN S -40°C to +125°C Operating Temperature Range Applications Telecom and Datacom Power Supplies Isolated Battery Chargers Servers and Embedded Computing Industrial Power Supplies Ordering Information appears at end of data sheet. For related parts and recommended products to use with this part, refer to www.maximintegrated.com/MAX17598.related. For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com. 19-6179; Rev 1; 3/13 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers ABSOLUTE MAXIMUM RATINGS VIN (MAX17599 only).............................................-0.3V to +40V VDRV to SGND (MAX17598 Only)...............................................-0.3V to +16V (MAX17599 Only).................................................-0.3V to +6V EN/UVLO to SGND......................................-0.3V to (VIN + 0.3V) NDRV, AUXDRV to PGND........................-0.3V to (VDRV + 0.3V) OVI, RT, DITHER, COMP, SS, FB, SLOPE, DT to SGND...........................................-0.3V to +6V CS to SGND.............................................................-0.8V to +6V PGND to SGND.....................................................-0.3V to +0.3V Maximum Input /Output Current (Continuous) VIN, VDRV.......................................................................100mA NDRV (pulsed for less than 100ns)..........................+0.9A/-1.5A AUXDRV (pulsed for less than 100ns)......................+0.3A/-0.7A Continuous Power Dissipation (TA = +70NC) TQFN (derate 20.8mW/°C above 70°C).....................1666mW Operating Temperature Range......................... -40°C to +125°C Maximum Junction Temperature......................................+150°C Storage Temperature Range............................. -65°C to +150°C Lead Temperature (soldering, 10s).................................+300°C Soldering Temperature (reflow).......................................+260°C PACKAGE THERMAL CHARACTERISTICS (Note 1) TQFN Junction-to-Case Thermal Resistance (qJC)..................7°C/W Junction-to-Ambient Thermal Resistance (qJA)...........48°C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = 12V (for MAX17598, bring VIN up to 21V for startup), VCS = VDITHER = VFB = VOVI = VSGND = VPGND = 0V, VEN/UVLO = +2V, AUXDRV = NDRV = SS = COMP = SLOPE = unconnected, RRT = 25kI, RDT = 10kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX MAX17598 8 29 MAX17599 4.5 36 UNITS INPUT SUPPLY (VIN) VIN Voltage Range VIN V MAX17598 18.5 20 21.5 MAX17599 3.8 4.1 4.4 MAX17598 6.5 7 7.5 MAX17599 3.6 3.9 4.2 VIN < UVLO 20 32 FA 32 FA VIN Bootstrap UVLO Wakeup VIN-UVR IN rising VIN Bootstrap UVLO Shutdown Level VIN-UVF IN falling VIN Supply Startup Current (under UVLO) IINSTARTUP VIN Supply Shutdown Current IIN-SH VEN = 0V 20 VIN Supply Current IIN-SW Switching, fSW = 400kHz 2 VIN Clamp Voltage VINC VEN = 0V, IIN = 2mA sinking (MAX17598) (Note 3) 30 33 36 VENR VEN rising 1.16 1.21 1.26 VENF VEN falling 1.1 1.15 1.20 -100 +100 V V mA V ENANBLE (EN) EN Threshold EN Input Leakage Current Maxim Integrated IEN VEN = 1.5V, TA = +25NC V nA 2 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers ELECTRICAL CHARACTERISTICS (continued) (VIN = 12V (for MAX17598, bring VIN up to 21V for startup), VCS = VDITHER = VFB = VOVI = VSGND = VPGND = 0V, VEN/UVLO = +2V, AUXDRV = NDRV = SS = COMP = SLOPE = unconnected, RRT = 25kI, RDT = 10kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX 7.1 7.4 7.7 UNITS INTERNAL LDO (VDRV) 8V < VIN < 15V and 0mA < IVDRV < 50mA (MAX17598) VDRV Output Voltage Range VVDRV V 6V < VIN < 15V and 0mA < IVDRV < 50mA (MAX17599) 4.7 4.9 5.1 VDRV Current Limit IVDRV-MAX 70 100 mA VDRV Dropout VVDRV-DO VIN = 4.5V, IVDRV = 20mA (MAX17599) 4.2 VOVIR VOVI rising 1.16 1.21 1.26 VOVIF VOVI falling 1.1 1.15 1.2 2 Fs +100 nA 1000 kHz V OVERVOLTAGE PROTECTION (OVI) OVI Overvoltage Threshold OVI Masking Delay OVI Input Leakage Current tOVI-MD V IOVI VOVI = 1V, TA = +25NC -100 NDRV Switching Frequency Range fSW 100 NDRV Switching Frequency Accuracy -8 +8 % fSW = 400KHz, RDT = 10kI 71 72.5 74 % 3 V OSCILLATOR (RT) Maximum Duty Cycle DMAX SYNCHRONIZATION (DITHER/SYNC) Synchronization Logic-High Input VIH-SYNC Synchronization Pulse Width Synchronization Frequency Range fSYNC 50 1.1 x fSW ns 1.3 x fSW DITHERING RAMP GENERATOR (DITHER/SYNC) Charging Current 45 50 55 FA Discharging Current 43 50 57 FA Ramp-High Trip Point 2 Ramp-Low Trip Point 0.4 Maxim Integrated V 3 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers ELECTRICAL CHARACTERISTICS (continued) (VIN = 12V (for MAX17598, bring VIN up to 21V for startup), VCS = VDITHER = VFB = VOVI = VSGND = VPGND = 0V, VEN/UVLO = +2V, AUXDRV = NDRV = SS = COMP = SLOPE = unconnected, RRT = 25kI, RDT = 10kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SOFT-START/SOFT-STOP (SS) Soft-Start Charging Current Soft-Stop Discharging Current SS Bias Voltage ISSCH 9 10 11 FA ISSDISCH 4.4 5 5.6 FA VSS 1.19 1.21 1.23 V VSSDISCH Soft-stop completion 0.15 V Pulldown Impedance RNDRV-N INDRV (sinking) = 100mA 1.37 3 I Pullup Impedance RNDRV-P INDRV (sourcing) = 50mA 4.26 8.5 I Peak Sink Current CNDRV = 10nF 1.5 A Peak Source Current CNDRV = 10nF 0.9 A SS Discharge Threshold NDRV DRIVER (NDRV) Fall Time tNDRV-F CNDRV = 1nF 10 ns Rise Time tNDRV-R CNDRV = 1nF 20 ns AUXDRV DRIVER (AUXDRV) Pulldown Impedance RAUXDRV-N IAUXDRV (sinking) = 100mA 3.35 7 I Pullup Impedance RAUXDRV-P IAUXDRV (sourcing) = 50mA 9.78 19 I Peak Sink Current CAUXDRV = 10nF 0.7 A Peak Source Current CAUXDRV = 10nF 0.3 A Fall Time tAUXDRV-F CAUXDRV = 1nF 16 ns Rise Time tAUXDRV-R CAUXDRV = 1nF 32 ns 25 DEAD TIME (DT) NDRV to AUXDRV Delay (Dead Time) NDRV$ to AUXDRV$ tDT AUXDRV# to NDRV# RDT = 10kI RDT = 100kI RDT = 10kI 250 RDT = 100kI 25 ns 250 CURRENT-LIMIT COMPARATOR (CS) Cycle-by-Cycle PeakCurrent-Limit Threshold VCS-PEAK 290 305 320 mV Cycle-by-Cycle RunawayCurrent-Limit Threshold VCS-RUN 340 360 380 mV Cycle-by-Cycle ReverseCurrent-Limit Threshold VCS-REV -122 -102 -82 mV Maxim Integrated 4 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers ELECTRICAL CHARACTERISTICS (continued) (VIN = 12V (for MAX17598, bring VIN up to 21V for startup), VCS = VDITHER = VFB = VOVI = VSGND = VPGND = 0V, VEN/UVLO = +2V, AUXDRV = NDRV = SS = COMP = SLOPE = unconnected, RRT = 25kI, RDT = 10kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2) PARAMETER SYMBOL Current-Sense Leading-Edge Blanking Time tCS-BLANK tCS-BLANK- Current-Sense-Blanking Time for Reverse-Current Limit Propagation Delay from Comparator Input to NDRV Rev tPDCS CONDITIONS MIN TYP MAX UNITS From NDRV# edge 70 ns From AUXDRV$ edge 70 ns From CS rising (10mV overdrive) to NDRV falling (excluding leading-edge blanking) 40 ns Number of Consecutive Peak-Current-Limit Events to HICCUP NHICCUP-P 8 event Number of Runaway CurrentLimit Events to HICCUP N-HICCUP-R 1 event Overcurrent Hiccup Timeout Minimum On-Time tON-MIN 32,768 90 130 cycle 170 ns SLOPE COMPENSATION (SLOPE) Slope Bias Current ISLOPE 9 10 11 FA Slope Resistor Range RSLOPE 25 200 kI 140 165 190 mV/Fs Slope Compensation Ramp RSLOPE = 100kW Default Slope Compensation Ramp VSLOPE < 0.2V or 4V < VSLOPE 50 mV/Fs PWM COMPARATOR Comparator Offset Voltage VPWM-OS Current-Sense Gain ACS-PWM Comparator Propagation Delay VCOMP, when VCS = 0V DVCOMP /DVCS 1.65 1.81 2 V 1.75 1.97 2.15 V/V 110 ns 1.21 1.23 V tPWM Change in VCS = 10mV (including internal lead-edge blanking) VREF VFB, when ICOMP = 0V and VCOMP = 1.8V 1.19 IFB VFB = 1.5V, TA = +25NC ERROR AMPLIFIER FB Reference Voltage FB Input Bias Current Open-Loop Voltage Gain Transconductance Maxim Integrated -100 +100 nA AEAMP 90 dB Gm 1.5 1.8 2.1 mS 5 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers ELECTRICAL CHARACTERISTICS (continued) (VIN = 12V (for MAX17598, bring VIN up to 21V for startup), VCS = VDITHER = VFB = VOVI = VSGND = VPGND = 0V, VEN/UVLO = +2V, AUXDRV = NDRV = SS = COMP = SLOPE = unconnected, RRT = 25kI, RDT = 10kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2) PARAMETER Transconductance Bandwidth SYMBOL CONDITIONS MIN TYP MAX UNITS BW Open-loop (gain = 1), -3dB frequency° 10 MHz 80 120 210 FA 80 120 210 FA 160 °C 20 °C Source Current Sink Current VCOMP = 1.8V, VFB = 1V VCOMP = 1.8V, VFB = 1.75V Thermal Shutdown Threshold Temperature rising Thermal Shutdown Hysteresis THERMAL SHUTDOWN Note 2: All devices are 100% production tested at +25NC. Limits over temperature are guaranteed by design. Note 3: The MAX17598 is intended for use in universal input power supplies. The internal clamp circuit at IN is used to prevent the bootstrap capacitor from charging to a voltage beyond the absolute maximum rating of the device when EN is low (shutdown mode). Externally limit the maximum current to IN (hence to clamp) to 2mA (max) when EN is low. Typical Operating Characteristics (VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted.) VIN WAKEUP LEVEL vs. TEMPERATURE (MAX17599) 20.02 20.01 20.00 4.11 4.10 4.09 4.08 19.99 19.98 4.07 -40 -20 0 20 40 60 TEMPERATURE (°C) Maxim Integrated 80 100 120 7.025 MAX17598/9 toc03 4.12 VIN WAKEUP LEVEL (V) 20.03 MAX17598/9 toc02 4.13 MAX17598/9 toc01 BOOTSTRAP UVLO WAKE-UP LEVEL (V) 20.04 IN UVLO SHUTDOWN LEVEL vs. TEMPERATURE (MAX17598) IN UVLO SHUTDOWN LEVEL (V) BOOTSTRAP UVLO WAKE-UP LEVEL vs. TEMPERATURE (MAX17598) 7.020 7.015 7.010 7.005 7.000 6.995 -40 -20 0 20 40 60 TEMPERATURE (°C) 80 100 120 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) 6 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Typical Operating Characteristics (continued) (VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted.) 3.89 3.88 3.87 23.5 22.5 21.5 20.5 0 20 40 60 80 100 120 0 550 450 350 250 60 0 20 40 60 300 200 5 80 15 25 35 45 65 75 85 95 DEAD TIME vs. RDT MAX17598/9 toc08 12 10 8 6 220 180 140 100 60 20 200 300 400 500 600 700 800 900 1000 100 120 55 FREQUENCY SELECTION RESISTOR (kI) 2 -20 400 80 100 120 4 RT = 100kI 50 10 20 30 40 50 60 70 80 90 100 TEMPERATURE (°C) RDITHER (kI) RDT (kI) DEAD TIME vs. TEMPERATURE PEAK-CURRENT-LIMIT THRESHOLD vs. TEMPERATURE REVERSE CURRENT LIMIT THRESHOLD vs. TEMPERATURE 246 RDT = 100kI 242 305 304 303 302 301 0 20 40 60 TEMPERATURE (°C) Maxim Integrated 80 100 120 -96 -97 -98 -99 -100 -101 -102 -103 -104 300 -40 -20 MAX17598/9 toc12 306 -95 REVERSE CURRENT LIMIT THRESHOLD (mV) 248 MAX17598/9 toc11 250 307 PEAK-CURRENT-LIMIT THRESHOLD (mV) MAX17598/9 toc10 252 DEAD TIME (ns) 40 DEAD TIME - DT (ns) 650 244 20 14 FREQUENCY DITHERING (%) 750 -40 500 FREQUENCY DITHERING vs. RDITHER MAX17598/9 toc07 NDRV SWITCHING FREQUENCY (kHz) RT = 10kI 150 600 TEMPERATURE (°C) NDRV SWITCHING FREQUENCY vs. TEMPERATURE 850 700 0 -40 -20 TEMPERATURE (°C) 950 800 MAX17598/9 toc09 -20 900 100 19.5 -40 MAX17598/9 toc06 24.5 1000 NDRV SWITCHING FREQUENCY (kHz) 3.90 MAX17598/9 toc05 3.91 25.5 IN SUPPLY CURRENT UNDER UVLO (µA) MAX17598/9 toc04 VIN FALLING THRESHOLD (V) 3.92 NDRV SWITCHING FREQUENCY vs. RESISTOR IN SUPPLY CURRENT UNDER UVLO vs. TEMPERATURE VIN FALLING THRESHOLD vs. TEMPERATURE (MAX17599) -40 -20 0 20 40 60 TEMPERATURE (°C) 80 100 120 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) 7 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Typical Operating Characteristics (continued) (VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted.) FB REGULATION VOLTAGE vs. TEMPERATURE CURRENT-SENSE GAIN vs. TEMPERATURE 1.97 1.96 1.95 1.94 MAX17598/9 toc14 FB REGULATION VOLTAGE (V) 1.98 CURRENT-SENSE GAIN (V/V) 1.217 MAX17598/9 toc13 1.99 1.215 1.213 1.211 1.209 1.207 1.93 1.205 1.92 -40 -20 0 20 40 60 80 -40 100 120 -20 0 20 40 60 100 120 TEMPERATURE (°C) NDRV PEAK SOURCE AND SINK CURRENTS AUXDRV PEAK SOURCE AND SINK CURRENTS MAX17598/9 toc15 MAX17598/9 toc16 PEAK SOURCE CURRENT PEAK SOURCE CURRENT IAUXDRV 0.28A/div INDRV 0.7A/div PEAK SINK CURRENT 200ns/div Maxim Integrated 80 TEMPERATURE (°C) PEAK SINK CURRENT 200ns/div 8 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Typical Operating Characteristics (continued) ENABLE SHUTDOWN WAVEFORM (SOFT-STOP) ENABLE STARTUP WAVEFORM (DUTY-CYCLE SOFT-START) MAX17598/9 toc18 MAX17598/9 toc17 VEN/UVLO 2V/div VEN/UVLO 2V/div VOUT 2V/div VOUT 2V/div 4ms/div 4ms/div SOFT-START FROM INPUT (FIGURE 9) INPUT SHUTDOWN (FIGURE 9) MAX17598/9 toc19 MAX17598/9 toc20 VIN 20V/div VIN 20V/div VOUT 2V/div VOUT 2V/div 200ms/div 20ms/div DEAD TIME BETWEEN NDRV AND AUXDRV (FIGURE 9) NDRV AND AUXDRV SIGNALS (FIGURE 9) MAX17598/9 toc21 MAX17598/9 toc22 50ns 1µs/div Maxim Integrated VNDRV 5V/div VNDRV 5V/div VAUXDRV 5V/div VAUXDRV 5V/div 40ns/div 9 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Typical Operating Characteristics (continued) MOMENTARY OVI OPERATION (FIGURE 9) SS, NDRV AND AUXDRV IN HICCUP MODE (FIGURE 9) MAX17598/9 toc24 MAX17598/9 toc23 VOVI 5V/div VSS 500mV/div VSS 1V/div VNDRV 5V/div VOUT 5V/div VAUXDRV 5V/div VCLAMPCAP 50V/div 4ms/div 4ms/div EFFICIENCY CURVES LOAD TRANSIENT RESPONSE (FIGURE 9) MAX17598/9 toc26 100 MAX17598/9 toc25 90 ILOAD 2A/div VOUT (AC) 100mV/div EFFICIENCY (%) 80 70 60 50 40 30 20 VIN = 36V VIN = 48V VIN = 72V 15 0 200µs/div 0 2 4 6 8 10 OUTPUT CURRENT (A) BODE PLOT (FIGURE 9) ACTIVE CLAMP SWITCHING WAVEFORM (FIGURE 9) MAX17598/98 toc27 MAX17598/9 toc28 VDS 50V/div PHASE 36°/div BANDWIDTH = 10.3kHz PHASE MARGIN = 72° 6 81 2 4 6 81 IPRIMARY 1A/div GAIN 10dB/div 2 4 6 81 1µs/div Maxim Integrated 10 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers NDRV PGND CS TOP VIEW AUXDRV Pin Configuration 12 11 10 9 VDRV 13 VIN 14 MAX17598 MAX17599 EN/UVLO 15 EP 1 2 3 4 SLOPE RT DITHER/ SYNC + DT OVI 16 TQFN 8 SGND 7 SS 6 FB 5 COMP Pin Description PIN NAME FUNCTION 1 DT Dead-Time Programming Resistor Connection. Connect resistor from DT to GND to set the desired dead time between the NDRV and AUXDRV signals. See the Dead Time section to calculate the resistor value for a particular dead time. 2 SLOPE Slope Compensation Programming Input. A resistor RSLOPE connected from SLOPE to SGND programs the amount of internal slope compensation. Shorting this pin to SGND sets a default slope compensation of 50mV/Fs. 3 RT Switching Frequency Programming Resistor Connection. Connect resistor from RT to SGND to set the PWM switching frequency. 4 DITHER/SYNC Frequency Dithering Programming or Synchronization Connection. For spread-spectrum frequency operation, connect a capacitor from DITHER to SGND and a resistor from DITHER to RT. To synchronize the internal oscillator to the externally applied frequency, connect DITHER/SYNC to the synchronization pulse. 5 COMP Transconductance Amplifier Output. Connect the frequency compensation network between COMP and SGND in nonisolated applications and between COMP and FB pins in isolated applications. 6 FB Transconductance Error Amplifier Inverting Input 7 SS Soft-Start/Soft-Stop Capacitor Pin for Forward/Flyback Regulator. Connect a capacitor from SS to SGND to set the soft-start/soft-stop time interval. 8 SGND 9 CS 10 PGND Maxim Integrated Signal Ground. Connect SGND to the signal ground plane. Current-Sense Input. Current-sense connection for average current-sense and cycle-by-cycle current limit. Peak current limit trip voltage is 350mV (typ). Power Ground. Connect PGND to the power ground plane. 11 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Pin Description (continued) PIN NAME FUNCTION 11 NDRV 12 AUXDRV 13 VDRV Linear Regulator Output and Driver Input. Connect a 1FF bypass capacitor from VDRV to PGND as close as possible to the IC. 14 VIN Internal VDRV Regulator Input. Connect VIN to the input voltage source. Bypass VIN to PGND with a 0.1FF minimum ceramic capacitor. 15 EN/UVLO Enable/Undervoltage Lockout Pin. To externally program the UVLO threshold of the input supply, connect a resistive divider among input supply, EN/UVLO, and SGND. 16 OVI Overvoltage Comparator Input. Connect a resistive divider among the input supply, OVI, and SGND to set the input overvoltage threshold. — EP Exposed Pad External Switching NMOS Gate-Driver Output PMOS Active-Clamp-Switch Gate-Driver Output. AUXDRV can also be used to drive a pulse transformer for synchronous flyback application. Detailed Description The MAX17598/MAX17599 low IQ active-clamp currentmode PWM controllers contain all the control circuitry required for design of wide-input isolated/nonisolated forward converter industrial power supplies. The MAX17598 has a rising UVLO threshold of 20V with a 13V hysteresis, and is therefore well-suited for universal input (rectified 85V AC to 265V AC) or telecom (36V DC to 72V DC) power supplies. The MAX17599 features a 4.1V rising UVLO with a 200mV hysteresis and is optimized for lowvoltage industrial supplies (4.5V DC to 36V DC). The devices include an AUX driver that drives an auxiliary MOSFET (clamp switch) that helps implement the activeclamp transformer reset topology for forward converters. Such a reset topology has several advantages, including reduced voltage stress on the switches, transformer size reduction due to larger allowable flux swing, and improved efficiency due to elimination of dissipative snubber circuitry. Programmable dead time between the AUX and main driver allows for zero voltage switching (ZVS). Maxim Integrated Input Voltage Range The MAX17598 has different rising and falling undervoltage lockout (UVLO) thresholds on the VIN pin than those of the MAX17599. The thresholds for the MAX17598 are optimized for implementing power-supply startup schemes typically used for off-line AC/DC and telecom DC-DC power supplies that are typically encountered in industrial applications. As such, the MAX17598 has no limitation on the maximum input voltage, as long as the external components are rated suitably, and the maximum operating voltages of the MAX17598 are respected. The MAX17598 can be successfully used in universal input (85V to 265V AC) rectified bus applications, rectified 3-phase DC bus applications, and telecom (36V to 72V DC) applications. The VIN pin of the MAX17599 has a maximum operating voltage of 36V. The MAX17599 implements rising and falling thresholds on the VIN pin that assume powersupply startup schemes, typical of lower voltage DC-DC applications down to an input voltage of 4.5V DC. Thus isolated/non-isolated active-clamp converters with supply-voltage range of 4.5V to 36V can be implemented with the MAX17599. See Startup Operation section for more details on power-supply startup schemes for MAX17598/MAX17599. 12 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers DT VDRV MAX17598 MAX17599 AUXDRV DRIVER NDRV PGND TSDN 7.4V (MAX17598) OR VDRV 4.9V (MAX17599) VDRV AUXDRV THERMAL SENSOR NDRV DRIVER CONTROL AND DRIVER LOGIC LDO DEAD TIME PGND HICCUP POK VIN REVERSE ILIM COMP -102mV UVLO EN/ UVLO CHIPEN SGND OSC CLK 1.21V DITHER/SYNC 8 PEAKEVENTS SSDONE OR 1 RUNAWAY PEAKLIM COMP PGND 305mV OVI RUNAWAY COMP 1.21V 360mV RT CHIPEN 10µA 1.21V 5µA CS 70ns SS SS BLANKING 0.9V PWM COMP FIXED OR VARIABLE SSDONE 10µA SLOPE DECODE SLOPE CLK COMP R 1x CHIPEN/ HICCUP DITHER/ SYNC R 1.21V FB Q50µA SS 2V/0.4V CURRENT SOFT-START Figure 1. Block Diagram Maxim Integrated 13 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Linear Regulator (VDRV) The MAX17598/MAX17599 have an internal linear regulator that is powered from the VIN pin. The output of the linear regulator is connected to the VDRV pin, and should be decoupled with a 1FF capacitor to ground for stable operation. The VDRV converter output supplies the MOSFET drivers internal to the MAX17598/ MAX17599. The VDRV voltage is regulated at 7.4V (typ) in the MAX17598, and at 4.9V (typ) in the MAX17599. The maximum operating voltage of the IN pin is 29V for the MAX17598 and 36V for the MAX17599. Maximum Duty Cycle (Dmax) The MAX17598/MAX17599 operate at a maximum duty cycle of 72.5% (typ). When the SLOPE pin is left OPEN, the ICs have the necessary amount of slope compensation to provide stable, jitter-free current-mode control operation in applications where the operating duty cycle is less than 50%. Slope compensation is necessary for stable operation of current-mode controlled converters at duty cycles greater than 50%, in addition to the loop compensation required for small signal stability. The MAX17598/MAX17599 implement a SLOPE pin for this purpose. See the Slope Compensation Programming section for more details. Applications Information tion, only if the voltage at the OVI pin falls below 1.15V (typ). The OVI feature is easily disabled by tying the pin to ground. For given values of startup DC input voltage (VSTART) and input overvoltage protection voltage (VOVI), the resistor values for the divider can be calculated as follows, assuming a 24.9kI resistor for ROVI. RSUM represents the series combination of several resistors that might be needed in high-voltage DC bus applications (MAX17598) or a single resistor in low-voltage DC-DC applications (MAX17599). V R EN = 24.9 × OVI − 1 kW, VSTART where VSTART and VOVI are in volts. R SUM= VSTART − 1 kW, 1.21 [24.9 + REN] × where REN is in kI. RSUM might need to be implemented as equal multiple resistors in series (RDC1, RDC2, RDC3) so that voltage across each resistor is limited to its maximum operating voltage. Startup Voltage and Input Overvoltage Protection Setting (EN/UVLO, OVI) The EN/UVLO pin in the MAX17598/MAX17599 serves as an enable/disable input, as well as an accurate programmable undervoltage lockout (UVLO) pin. The MAX17598/MAX17599 do not commence startup operations unless the EN/UVLO pin voltage exceeds 1.21V (typ). The MAX17598/MAX17599 turn off if the EN/UVLO pin voltage falls below 1.15V (typ). A resistor divider from the input DC bus to ground maybe used to divide down and apply a fraction of the input DC voltage to the EN/ UVLO pin as shown in Figure 2. The values of the resistor divider can be selected so that the EN/UVLO pin voltage exceeds the 1.21V (typ) turn on threshold at the desired input DC bus voltage. The same resistor divider can be modified with an additional resistor, ROVI, to implement input overvoltage protection, in addition to the EN/UVLO functionality as shown in Figure 2. When the voltage at the OVI pin exceeds 1.21V (typ), the MAX17598/MAX17599 stop switching. Switching resumes with soft-start opera- Maxim Integrated R SUM kW. 3 = R DC1 R= DC2 R= DC3 VDC RDC1 RSUM RDC2 RDC3 EN/UVLO MAX17598 MAX17599 REN OVI ROVI Figure 2. Programming EN/UVLO, OVI 14 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Startup Operation The MAX17598 is optimized for implementing activeclamp converters operating either from a rectified AC input or in a 36V DC to 72VDC telecom application. A cost-effective RC startup circuit can be used in such applications. In this startup method (Figure 3), when the input DC voltage is applied, the startup resistor RSTART charges the startup capacitor CSTART, causing the voltage at the VIN pin to increase towards the rising VIN UVLO threshold (20V typical). During this time, the MAX17598 draws a low startup current of 20FA (typ) through the startup resistor RSTART. When the voltage at VIN reaches the rising IN UVLO threshold, the MAX17598 commences all internal operations and drives the external MOSFETs connected to NDRV and AUXDRV. In this condition, the MAX17598 draws 2mA (typ) current in from CSTART, in addition to the current required to switch the gates of the external MOSFETs Q1and Q2. Since this current cannot be supported by the current through RSTART, the voltage on CSTART starts to drop. When suitably configured as shown in Figure 3, the converter operates to generate an output voltage (VBIAS) that is bootstrapped to the VIN pin. If the voltage VBIAS exceeds 7V before the voltage on CSTART falls below 7V (typ), then the VIN voltage is sustained by VBIAS, thus allowing the MAX17598 to continue to operate with energy from VBIAS. The large hysteresis (13V typical) of the MAX17598 allows for a small startup capacitor (CSTART). The low startup current (20FA typical) allows the use of a large startup resistor (RSTART), thus reducing power dissipation at higher DC bus voltages. The startup resis- tor RSTART might need to be implemented as equal, multiple resistors in series (RIN1, RIN2 and RIN3) to share the applied high DC voltage in offline applications so that the voltage across each resistor is limited to the maximum continuous operating voltage rating. RSTART and CSTART can be calculated as follows: 7.4 × C VDRV + 0.04 × IIN × C SS C START = 0.09 Q GATE × fsw µF + I + t IN SS 6 10 where IIN is the supply current drawn at the IN pin in mA, QGATE is the sum of the gate charges of the external MOSFETs Q1 and Q2 in nC, fsw is the switching frequency of the converter in Hz, tSS is the soft-start time programmed for the converter in ms. CVDRV is cummulative capacitor used at DRV node in μF, and CSS is soft-start capacitor in nF. See the Soft-Start section. = R START (VSTART − 10) × 50 kW, 1 + C START where CSTART is the startup capacitor in FF. The IN UVLO rising threshold of the MAX17599 is set to 4.1V with a hysteresis of 200mV, and is optimized for low-voltage DC-DC applications in the range of 4.5V DC to 36V DC. The IN pin is rated for a maximum operating input voltage of 36V DC and can directly be connected to the input DC supply. VDC RIN1 VDC VBIAS LBIAS D1 RSTART RIN2 D2 RIN3 VIN CSTART AUXDRV LDO Q1 MAX17598 NDRV CCLAMP VDRV CVDRV Q2 Figure 3. RC-Based Startup Circuit Maxim Integrated 15 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers 4.5V TO 36V DC VOUT LOUT D1 MAX17599 VIN LDO D2 AUXDRV Q1 VDRV NDRV COUT CCLAMP CVDRV Q2 Figure 4. Typical Startup Circuit with IN Connected Directly to DC Input Soft-Start and Soft-Stop In a current-mode isolated active clamp forward converter, the COMP voltage programs the peak current in the primary, and thus the secondary-side inductor current as well. The MAX17598/MAX17599 implement a soft-start scheme that controls the COMP pin of the device at turn on. A useful benefit of this feature is the elimination of need for secondary-side soft-start circuitry in such isolated applications. In the absence of secondary-side soft-start circuitry, the secondary-side error amplifier can cause the output voltage to rapidly reach the regulation value, thus causing inrush current and output voltage overshoot. The MAX17598/MAX17599 avoid this issue by applying a soft-start to the COMP pin. Thus the regulator’s primary and secondary currents are ramped up in a well-controlled manner resulting in a current-mode soft-start operation. Soft-start period of MAX17598/MAX17599 can be programmed by selecting the value of capacitor connected from SS pin to GND. The capacitor CSS can be calculated as follows: C SS = 10 × t SS nF VCOMP − 1.81 where tSS is in ms, VCOMP is steady-state COMP voltage (VCOMP,MAX = 2.6V). Maxim Integrated A soft-stop feature ramps down the output voltage when the device is turned off, and provides safe discharging of the clamp capacitor, thus allowing the controller to restart in a well-controlled manner. Additionally, a negative current limit is provided in the current-sense circuitry that helps limit the clamp switch current under dynamic operating conditions, such as momentary input overvoltage charging from a precharged output capacitor. The soft-stop duration is twice that of the programmed softstart period. Programming Slope Compensation Since the MAX17598/MAX17599 operate at a maximum duty cycle of 72.5% (typ), slope compensation is required to prevent subharmonic instability that occurs naturally in continuous-conduction mode, peak current modecontrolled converters operating at duty cycles greater than 50%. A minimum amount of slope signal is added to the sensed current signal, even for converters operating below 50% duty to provide stable, jitter-free operation. The SLOPE pin allows the user to program the necessary slope compensation by setting the value of the resistor RSLOPE connected from SLOPE pin to ground. R= SLOPE SE − 8 kW 1.55 where SE, the slope is expressed in mV per microseconds. For the default minimum slope compensation of 50mV/Fs (typ), the SLOPE pin should be connected to SGND or left unconnected. 16 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers VSS = ISSCH x t /CSS SOFT-START BEGIN VCOMP* - 1.36V SOFT-START ENDS 0.0V 0.4V NDRV AUXDRV CS Figure 5. Duty Cycle Soft-Start SOFT-STOP ENDS VCOMP* - 1.36V VSS = 1.21V - ISSDISCH x t/CSS 0.4V SOFT-STOP BEGINS 0.0V NDRV AUXDRV CS Figure 6. Duty Cycle or Current Soft-Stop *VCOMP is steady-state COMP voltage. Maxim Integrated 17 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers n-Channel MOSFET Gate Driver The NDRV output drives an external n-channel MOSFET. NDRV can source/sink in excess of 900mA /1500mA peak current. Therefore, select a MOSFET that yields acceptable conduction and switching losses. p-Channel MOSFET Gate Driver The AUXDRV output drives an external p-channel MOSFET with the aid of a level shifter, as shown in the Typical Application Circuits. AUXDRV can source/sink in excess of 300mA/700mA peak current. Therefore, select a MOSFET that yields acceptable conduction and switching losses. The external PMOSFET used must be able to withstand the maximum clamp voltage. Dead Time Dead time between the main and AUX output edges allow ZVS to occur, minimizing switching losses and improving efficiency. The dead time (tDT) is applied to both leading and trailing edges of the main and AUX outputs as shown in Figure 7. Connect a resistor between DT and GND to set tDT to any value between 25ns and 250ns. RDT in kΩ, is calculated as: R DT =0.4 × t DT kW, where tDT is in ns. Oscillator/Switching Frequency The ICs’ switching frequency is programmable between 100kHz and 1MHz with a resistor RRT connected between RT and GND. Use the following formula to determine the appropriate value of RRT needed to generate the desired output switching frequency (fSW): R RT = 1× 10 10 fSW where fSW is the desired switching frequency. Peak-Current-Limit The current-sense resistor (RCS), connected between the source of the n-channel MOSFET and PGND, sets the current limit. The source end of current-sense resistor connects to CS pin of MAX17598/MAX17599. The signal thus obtained is used by the devices, both for current-mode control and peak-current limiting purposes. The current-limit comparator has a voltage trip level (VCS-PEAK) of 305mV, and is independent of slope Maxim Integrated NDRV AUXDRV DEAD TIME, tDT Figure 7. Dead Time Between AUXDRV and NDRV compensation applied to stabilize the converter. The following equation is used to calculate the value of RCS: R CS = 305mV 1.2 × IPRI_PEAK where IPRI_PEAK is the peak current in the primary side of the transformer, which also flows through the main n-channel MOSFET. When the voltage produced by this current (through the current-sense resistor) exceeds the current-limit comparator threshold, the MOSFET driver (NDRV) terminates the current on-cycle within 40ns (typ). The devices implement 70ns of internal leading-edge blanking to ignore leading-edge current spikes encountered in practice due to parasitics. Use a small RC network for additional filtering of the leading-edge spike on the sense waveform when needed. Set the corner frequency of the RC filter network at 5 to 10 times the switching frequency. For a given peak-current-limit setting, the runaway current limit is typically 20% higher. The peak current-limittriggered hiccup operation is disabled until the end of soft-start, while the runaway current-limit-triggered hiccup operation is always enabled. Negative Peak Current Limit The MAX17598/MAX17599 protect against excessive negative currents through the clamp switch, primary of the transformer and the clamp capacitor under dynamic operating conditions. The devices limit negative current by monitoring the voltage across RCS, while the AUXDRV output is low and the p-Channel FET is on. The typical negative-current-limit threshold is set at -102mV (1/3 of the positive-peak-current-limit threshold). 18 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers VCS-PEAK (305mV) CURRENT-SENSE VOLTAGE HICCUP TIMEOUT HICCUP SIGNAL VSS-HI DISCHARGE WITH ISSDISCH SOFT-START VOLTAGE, VSS tSS tRSTR Figure 8. Hiccup-Mode Timing Diagram Output Short-Circuit Protection with Hiccup Mode When the MAX17598/MAX17599 detect eight consecutive peak-current-limit events, both NDRV and AUXDRV driver outputs are turned off (hiccup is followed by softstop) for a restart period, tRSTR. After tRSTR, the device turns on again with a soft-start. The duration of the restart period is 32678 clock cycles, and therefore depends on the switching frequency setting. The device also features a runaway current limit setting at 120% (typ) of the peak current limit. This feature is useful under short-circuit faults in forward converters with synchronous rectifiers that occur during minimum on-time conditions at high input voltages. Under these conditions, the primary peak current tends to build up and staircase beyond the peak current limit setting due to insufficient discharging of the output inductor. One single event of a runaway current limit forces the MAX17598/MAX17599 into hiccup mode Maxim Integrated operation. Figure 8 shows the behavior of the device prior and during hiccup mode. Oscillator Synchronization The internal oscillator can be synchronized to an external clock by applying the clock to SYNC/DITHER directly. The external clock frequency can be set anywhere between 1.1x to 1.3x the internal clock frequency. Using an external clock increases the maximum duty cycle by a factor equal to fSYNC /fSW. Frequency Dithering for Spread-Spectrum Applications (Low EMI) The switching frequency of the converter can be dithered in a range of Q10% by connecting a capacitor from DITHER/SYNC to GND, and a resistor from DITHER to RT as shown in the Typical Applications Circuit. This results in lower EMI. 19 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers A current source at SYNC/DITHER charges the capacitor CDITHER to 2V with 50FA. Upon reaching this trip point, it discharges CDITHER to 0.4V with 50FA. The charging and discharging of the capacitor generates a triangular waveform on SYNC/DITHER with peak levels at 0.4V and 2V. CDITHER is calculated as: C DITHER = 15.625 nF fTRI where fTRI is in kHz. Typically, fTRI should be set close to 1kHz. The resistor RDITHER connected from SYNC/DITHER to RT determines the amount of dither as follows: %DITHER = R RT R DITHER where %DITHER is the amount of dither expressed as a percentage of the switching frequency. Setting RDITHER to 10 x RRT generates Q10% dither. Layout Recommendations All connections carrying pulsed currents must be very short and as wide as possible. The inductance of these connections must be kept to an absolute minimum due Maxim Integrated to the high di/dt of the currents in high-frequency switching power converters. This implies that the loop areas for forward- and return-pulsed currents in various parts of the circuit should be minimized. Additionally, small current loop areas reduce radiated EMI. Similarly, the heatsink of the MOSFET presents a dV/dt source. Therefore, the surface area of the MOSFET heatsink should be minimized as much as possible. Ground planes must be kept as intact as possible. The ground plane for the power section of the converter should be kept separate from the analog ground plane, except for a connection at the least-noisy section of the power ground plane, typically the return of the input filter capacitor. The negative terminal of the filter capacitor, the ground return of the power switch, and current-sensing resistor must be close together. PCB layout also affects the thermal performance of the design. A number of thermal vias that connect to a large ground plane should be provided under the exposed pad of the part for efficient heat dissipation. For a sample layout that ensures first pass success, please refer to the MAX17598/MAX17599 Evaluation Kit layouts available at www.maximintegrated.com. For universal AC input designs, follow all applicable safety regulations. Offline power supplies can require UL, VDE, and other similar agency approvals. 20 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Typical Application Circuits VIN L1 10mH D1 T1 C7 4.7µF R1 221kI VDC D2 VOUT NB R2 0R NS INPUT 36V TO 72V INPUT VOUT L2 1.5µH R3 0R C2 22µF C3 2.2µF PGND C4 330µF C5 47µF N1 3.3V, 8A OUTPUT C6 47µF NP PGND0 N2 PGND PGND0 PGND VIN C8 0.47µF U1 C16 100nF SS R20 OPEN AUXDRV SLOPE R18 28.7kI C11 0.047µF DITHER /SYNC R9 0R P1 R12 0R NDRV VDRV D4 PGND 4 DITHER/ SYNC C15 1000pF SGND MAX17598 SGND R23 49.9kI R6 10kI VDRV VOUT EN /UVLO EN/UVLO 3 U3 1 R22 30kI PGND0 DT R5 1.6MI C20 4.7µF 2 C9 1µF FB VDC C13 OPEN C14 2.2nF D3 PGND0 VDRV R16 OPEN 2 R13 10kI SGND COMP R11 49.9kI 3 SGND PGND C19 33nF R24 22kI R7 35.7kI VFB R17 470 SGND C1 100pF VFB R21 0.1 R10 221 U2 1 C18 0.47µF R19 100 CS C12 SHORT (PC TRACE) VOUT N3 R14 10kI RT R15 OPEN SGND VIN C10 22nF PGND R8 20kI PGND EP C17 OPEN SGND OVI OVI R4 24.9kI SGND SGND SGND Figure 9. Typical Application Circuit (Telecom Power Supplies) Maxim Integrated 21 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Typical Application Circuits (continued) VIN D2 T1 C16 47nF NB VDC VOUT L1 10µH PGND VOUT INPUT 17V TO 34V INPUT C1 22µF C2 0.1µF R22 100kI PGND VIN NP U1 VIN SS AUXDRV SLOPE C9 47nF GND0 C18 2.2µF R10 0R P1 3 R12 0R NDRV N1 R24 100kI R6 10kI D1 PGND 5 MAX17599 R17 100m R25 150kI R21 47I VFB R13 22kI 2 PGND C20 100pF VDRV VDRV R20 33.2kI C7 2.2µF DT R9 20kI C10 10nF C11 47pF R14 470R SGND 2 3 FB VDC R8 332kI 4 SGND SGND COMP VOUT R7 120I U2 1 C19 0.1µF C12 4.7nF 2 1 GND0 VDRV R16 100R CS VFB 3.3V, 3A OUTPUT C8 0.01µF DITHER/ SYNC R19 49.9kI C5 OPEN GND0 SGND SGND C15 100µF N2 Z2 6.2V RT R23 C17 OPEN SHORT C14 100µF C4 100µF N3 PGND R15 40kI R2 0R Q1 C6 0.47µF R11 OPEN NS D3 PGND C13 47nF R3 0R U3 1 R18 200kI PGND GND0 R1 3.3MI EN /UVLO EN/UVLO EP SGND R4 150kI OVI OVI R5 121kI SGND SGND Figure 10. Typical Application Circuit (Power Supply for Low-Voltage DC-DC Applications) Maxim Integrated 22 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Ordering Information PART TEMP RANGE PIN PACKAGE MAX17598ATE+ -40NC to +125NC 16 TQFN MAX17599ATE+ -40NC to +125NC 16 TQFN UVLO, IN CLAMP Dmax Active-clamp, peak-current-mode, offline PWM controller 20V, Yes 70% Active-clamp, peak-current-mode, PWM DC-DC controller 4V, No 70% FUNCTIONALITY +Denotes a lead(Pb)-free/RoHS-compliant package. Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Maxim Integrated PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 16 TQFN T1633+4 21-0136 90-0032 23 MAX17598/MAX17599 Low IQ, Wide-Input Range, Active Clamp Current-Mode PWM Controllers Revision History REVISION NUMBER REVISION DATE 0 1/12 Initial release 1 3/13 Updated General Description, Benefits and Features, Absolute Maximum Ratings, Electrical Characteristics, Typical Operating Characteristics, Pin Description, Detailed Description sections, and Figures 1, 3–6, 8–10 DESCRIPTION PAGES CHANGED — 1–23 Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 © 2013 Maxim Integrated Products, Inc. 24 Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.