CYPRESS CY2300SXC

CY2300
Phase-Aligned Clock Multiplier
Phase-Aligned Clock Multiplier
Features
Functional Description
■
4-multiplier configuration
The CY2300 is a 4 output 3.3 V phase-aligned system clock
designed to distribute high-speed clocks in PC, workstation,
datacom, telecom, and other high-performance applications.
■
Single PLL architecture
■
Phase alignment
■
Low jitter, high accuracy outputs
■
Output enable pin
■
3.3 V operation
■
5 V tolerant input
■
Internal loop filter
■
8-pin 150-mil small-outline integrated circuit (SOIC) package
■
Commercial temperature
The part allows the user to obtain 1/2x, 1x, 1x and 2x REFIN
output frequencies on respective output pins.
The part has an on-chip PLL which locks to an input clock
presented on the REFIN pin. The input-to-output skew is
guaranteed to be less than 200 ps, and output-to-output skew
is guaranteed to be less than 200 ps.
Multiple CY2300 devices can accept the same input clock and
distribute it in a system. In this case, the skew between the
outputs of two devices is guaranteed to be less than 400 ps.
The CY2300 is available in commercial temperature range.
Logic Block Diagram
FBK
1/2xREF
REFIN
PLL
/2
Divider
Logic
REF
REF
2xREF
OE
Cypress Semiconductor Corporation
Document #: 38-07252 Rev. *D
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised September 01, 2010
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CY2300
Pinouts
Figure 1. CY2300 – 8-pin SOIC - Top View
1/2xREF
GND
REFIN
REF
8
7
6
5
1
2
3
4
OE
VDD
2xREF
REF
Table 1. Pin Definitions
Signal[1]
Pin
Description
1
1/2xREF
Clock output, 1/2x reference
2
GND
Ground
3
REFIN
Input reference frequency, 5 V tolerant input
4
REF
Clock output reference
5
REF
Clock output reference
6
2xREF
Clock output, 2x reference
7
VDD
3.3 V Supply
8
OE
Output enable (weak pull-up)
Maximum Ratings
Supply voltage to ground potential ...............–0.5 V to +7.0 V
DC input voltage (except ref) ............... –0.5 V to VDD + 0.5 V
Junction temperature................................................. 150 °C
Static discharge voltage
(per MIL-STD-883, method 3015) ........................... > 2000 V
DC input voltage REF ........................................–0.5 V to 7 V
Storage temperature ................................ –65 °C to +150 °C
Operating Conditions
Parameter
Description
Min
Max
Unit
3.0
3.6
V
Operating temperature (ambient temperature)
0
70
°C
Load capacitance, 10 MHz < FOUT < 133.33 MHz
–
18
pF
VDD
Supply voltage
TA
CL
Load capacitance,133.33 MHz < FOUT < 166.67 MHz
–
12
pF
CIN
Input capacitance
–
7
pF
tPU
Power-up time for all VDD's to reach minimum specified voltage (power
ramps must be monotonic)
0.05
50
ms
Note
1. Weak pull-down on all outputs.
Document #: 38-07252 Rev. *D
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CY2300
Electrical Characteristics
Parameter
Description
VIL
Input LOW voltage
VIH
Input HIGH voltage
IIL
Input LOW current
Test Conditions
VIN = 0 V
Min
Max
Unit
–
0.8
V
2.0
–
V
–
100
µA
IIH
Input HIGH current
VIN = VDD
–
50
µA
VOL
Output LOW voltage[2]
IOL = 8 mA
–
0.4
V
VOH
[2]
Output HIGH voltage
IOH = –8 mA
2.4
–
V
IDD
Supply current
Unloaded outputs, REFIN = 66 MHz
–
45
mA
Unloaded outputs, REFIN = 33 MHz
–
32
mA
Unloaded outputs, REFIN = 20 MHz
–
18
mA
Switching Characteristics
Parameter
1/t1
Name
Test Conditions
Output frequency
Duty cycle[3] = t2 t1
t3
Rise
time[3]
time[3]
Min
Typ
Max
Unit
18-pF load
10
–
133.33
MHz
12-pF load
–
–
166.67
MHz
Measured at VDD/2
40
50
60
%
Measured between 0.8 V and 2.0 V
–
–
1.20
ns
Measured between 0.8 V and 2.0 V
–
–
1.20
ns
t4
Fall
t5
Output to output skew on rising All outputs equally loaded
edges[3]
Measured at VDD/2
–
–
200
ps
t6
Delay, REFIN rising edge to
output rising edge[3]
Measured at VDD/2 from REFIN to any
output
–
–
200
ps
t7
Device to device skew[3]
Measured at VDD/2 on the 1/2xREF pin
of devices (pin 1)
–
–
400
ps
tJ
Period jitter[3]
Measured at Fout=133.33 MHz, loaded
outputs, 18-pF load
–
–
175
ps
tLOCK
PLL lock time[3]
Stable power supply, valid clocks
presented on REFIN
–
–
1.0
ms
Switching Waveforms
Figure 2. Duty Cycle Timing
t1
t2
VDD/2
Notes
2. Parameter is guaranteed by design and characterization. It is not 100% tested in production.
3. All parameters are specified with equally loaded outputs.
Document #: 38-07252 Rev. *D
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CY2300
Switching Waveforms (continued)
Figure 3. All Outputs Rise/Fall Time
2.0V
0.8V
OUTPUT
3.3V
2.0V
0.8V
0V
t4
t3
Figure 4. Output to Output Skew
OUTPUT
VDD/2
VDD/2
OUTPUT
t5
Figure 5. Input to Output Propagation Delay
REFIN
VDD/2
VDD/2
OUTPUT
t6
Figure 6. Device to Device Skew
1/2xREF, Device1
VDD/2
VDD/2
1/2xREF, Device2
t7
Test Circuits
Figure 7. Test Circuit #1
VDD
0.1 F
OUTPUTS
CLK OUT
C LOAD
GND
Document #: 38-07252 Rev. *D
Page 4 of 9
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CY2300
Ordering Information
Ordering Code
Package Type
Operating Range
Pb-free
CY2300SXC
8-pin 150-mil SOIC
Commercial (0 to 70 °C)
CY2300SXCT
8-pin 150-mil SOIC - Tape and Reel
Commercial (0 to 70 °C)
Ordering Code Definitions
CY 2300 S
X
C
(T)
T = Tape and Reel, Blank = Tube
Temperature Grade: C = Commercial
Fixed for Pb-free
Package Type: S = SOIC
Part Identifier
Company ID: CY = Cypress
Document #: 38-07252 Rev. *D
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CY2300
Package Drawing and Dimensions
Figure 7. 8-pin (150-Mil) SOIC S8
51-85066 *D
Document #: 38-07252 Rev. *D
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CY2300
Acronyms
Acronym
Description
FBK
Feedback
OE
Output enable
PLL
Phase locked loop
REFIN
Reference input
Reference Documents
Reference documents are available through your local Cypress sales representative. You can also direct your requests to
[email protected]
Document Number
NA
Document Title
NA
Description
NA
Document Conventions
Units of Measure
Symbol
°C
Unit of Measure
degrees Celsius
Hz
Hertz
kHz
kilo Hertz
MHz
Mega Hertz
µA
micro Amperes
µF
micro Farads
µs
micro seconds
µV
micro Volts
mA
milli Amperes
mm
milli meters
ms
milli seconds
mV
milli Volts
ns
nano seconds
pA
pico Amperes
pF
pico Farads
ps
pico seconds
V
Volts
Document #: 38-07252 Rev. *D
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CY2300
Document History Page
Document Title: CY2300 Phase-Aligned Clock Multiplier
Document Number: 38-07252
ECN
Orig. of
Change
**
110517
SZV
01/07/02
Change from Spec number: 38-01039 to 38-07252
*A
121854
RBI
12/14/02
Power up requirements added to Operating Conditions Information
REV.
Submission
Date
Description of Change
*B
246829
RGL
08/02/04
Added Lead Free Devices
*C
2568533
AESA
09/23/08
Updated template.
Removed Selector Guide.
Removed Operating Conditions for CY2300SI Industrial Temperature
Devices.
Removed Electrical Characteristics for CY2300SI Industrial
Temperature Devices.
Removed Switching Characteristics for CY2300SI Industrial
Temperature Devices.
Removed part number CY2300SC, CY2300SC, CY2300SI, CY2300SI,
CY2300SXI and CY2300SXIT.
*D
3026183
BASH
09/01/2010
Removed “Benefits” from page 1.
Added lower limit of 10MHz for 18pF load capacitance in Operating
Conditions on page 3.
Ordering Code Definitions added on page 5.
Acronyms, Reference Documents and Document Conventions added
on page 7.
Document #: 38-07252 Rev. *D
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CY2300
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at cypress.com/sales.
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© Cypress Semiconductor Corporation, 2002-2010. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of
any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for
medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as
critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems
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Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Document #: 38-07252 Rev. *D
Revised September 01, 2010
Page 9 of 9
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