Ordering number : EN6235A CMOS IC LC75844M 1/4-Duty General-Purpose LCD Display Driver Overview The LC75844M is a 1/4 duty general-purpose LCD driver that can be used for frequency display in electronic tuners under the control of a microcontroller. The LC75844M can drive an LCD with up to 88 segments directly. The LC75844M can also control up to 4 general-purpose output ports. Since the LC75844M uses separate power supply systems for the LCD drive block and the logic block, the LCD driver block power-supply voltage can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage. Application • Car, Home frequency display Features • Support for 1/4 duty 1/2 bias or 1/4 duty 1/3 bias drive of up to 88 segments under serial data control. • Serial data input supports CCB format communication with the system controller. • Serial data control of the power-saving mode based backup function and all the segments forced off function • Serial data control of switching between the segment output port and the general-purpose output port functions • High generality, since display data is displayed directly without decoder intervention. • Independent VLCD for the LCD driver block (VLCD can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage.) • The INH pin can force the display to the off state. • RC oscillator circuit • • CCB is a trademark of SANYO Electric Co., Ltd. CCB is SANYO's original bus format and all the bus addresses are controlled by SANYO. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. 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To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 80608HKIM B8-8317 / 92299TH(OT) No.6235-1/15 LC75844M Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0V Parameter Symbol Conditions Ratings Unit VDD max VDD -0.3 to +7.0 VLCD max VLCD -0.3 to +7.0 VIN1 CE, CL, DI, INH VIN2 OSC VIN3 VLCD1, VLCD2 VOUT1 OSC VOUT2 S1 to S22, COM1 to COM4, P1 to P4 IOUT1 S1 to S22 IOUT2 COM1 to COM4 3 IOUT3 P1 to P4 5 Allowable power dissipation Pd max Ta = 85°C Operating temperature Topr -40 to +85 °C Storage temperature Tstg -55 to +125 °C Maximum supply voltage Input voltage Output voltage Output current V -0.3 to +7.0 -0.3 to VDD+0.3 V -0.3 to VLCD+0.3 -0.3 to VDD+0.3 V -0.3 to VLCD+0.3 300 100 μA mA mW Allowable Operating Ranges at Ta = -40 to +85°C, VSS = 0V Ratings Parameter Supply voltage Input voltage Symbol Conditions min typ Unit max VDD VDD 2.7 6.0 VLCD VLCD 2.7 6.0 VLCD1 VLCD1 2/3VLCD VLCD VLCD2 VLCD2 1/3VLCD VLCD Input high-level voltage VIH CE, CL, DI, INH 0.8VDD Input low-level voltage VIL CE, CL, DI, INH 0 Recommended external resistor Rosc OSC 6.0 0.2VDD 43 V V V V kΩ Recommended external capacitor Cosc OSC Oscillation guaranteed range fosc OSC Data setup time tds CL, DI [Figure 2] 160 ns Data hold time tdh CL, DI [Figure 2] 160 ns CE wait time tcp CE, CL [Figure 2] 160 ns CE setup time tcs CE, CL [Figure 2] 160 ns CE hold time tch CE, CL [Figure 2] 160 ns High-level clock pulse width tφH CL [Figure 2] 160 ns Low-level clock pulse width tφL CL [Figure 2] 160 ns Rise time tr CE, CL, DI [Figure 2] 160 ns Fall time tf CE, CL, DI [Figure 2] 160 ns INH switching time tc INH, CE [Figure 3] 680 25 10 50 pF 100 kHz μs No.6235-2/15 LC75844M Electrical Characteristics at Allowable Operating Ranges Parameter Symbol Pin Ratings Conditions min typ Hysteresis width VH CE, CL, DI, INH Input high-level current IIH CE, CL, DI, INH VI = 6.0V Input low-level current IIL CE, CL, DI, INH VI = 0V Output high-level voltage VOH1 S1 to S22 IO = -20μA VLCD-0.9 VOH2 COM1 to COM4 IO = -100μA VLCD-0.9 VLCD-0.9 Output low-level voltage Output middle-level 0.1VDD 5.0 V VOH3 P1 to P4 IO = -1mA S1 to S22 IO = 20μA 0.9 VOL2 COM1 to COM4 IO = 100μA 0.9 VOL3 P1 to P4 IO = 1mA VMID1 COM1 to COM4 1/2 bias, IO = ±100μA 1/2VLCD -0.9 +0.9 VMID2 S1 to S22 1/3 bias, IO = ±20μA 2/3VLCD 2/3VLCD -0.9 +0.9 VMID3 S1 to S22 1/3 bias, IO = ±20μA 1/3VLCD 1/3VLCD -0.9 +0.9 2/3VLCD 2/3VLCD COM1 to COM4 μA μA VOL1 VMID4 V 0.9 1/3 bias, IO = ±100μA VMID5 COM1 to COM4 1/3 bias, IO = ±100μA fOSC OSC Rosc = 43kΩ 1/2VLCD -0.9 +0.9 1/3VLCD 1/3VLCD -0.9 +0.9 40 Cosc = 680pF Supply current V -5.0 voltage *1 Oscillator frequency Unit max 50 60 IDD1 VDD Power saving mode IDD2 VDD VDD = 6.0V, output open, fosc = 50kHz ILCD1 VLCD Power saving mode ILCD2 VLCD VLCD = 6.0V, output open, 1/2 bias, fosc = 50kHz 100 200 ILCD3 VLCD VLCD = 6.0V, output open, 1/3 bias, fosc = 50kHz 60 120 V kHz 5 230 460 5 μA Note: *1 Excluding the bias voltage generation divider resistors built into VLCD1, VLCD2. (See Figure 1.) VLCD VLCD1 To the common segment driver VLCD2 Except these resistors VSS Figure 1 No.6235-3/15 LC75844M ≈ 1. When CL is stopped at the low level VIH CE ≈ VIL tφL ≈ tf tcp tch tcs ≈ ≈ DI tr ≈ ≈ CL ≈ tφH VIH 50% VIL VIH VIL tdh tds ≈ 2. When CL is stopped at the high level VIH CE ≈ VIL tφH VIH 50% VIL tf ≈ CL ≈ tφL tr ≈ ≈ VIH VIL DI tch tcs ≈ ≈ tcp tdh tds Figure 2 Package Dimensions unit : mm (typ) 3263 15.2 0.65 7.9 19 10.5 36 1 0.8 0.3 18 0.25 0.1 (2.25) 2.45max (0.8) SANYO : MFP36SDJ(375mil) No.6235-4/15 LC75844M DI CL CE INH OSC VSS VLCD2 VLCD1 VLCD VDD COM4 COM3 COM2 COM1 S22 S21 S20 S19 Pin Assignment 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 P1/S1 P2/S2 P3/S3 P4/S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 LC75844M Top view COMMON DRIVER SEGMENT DRIVER & LATCH CLOCK GENERATOR SHIFT REGISTER S1/P1 S2/P2 S3/P3 S5 S4/P4 S21 S22 COM1 COM2 COM3 COM4 Block Diagram INH OSC VDD VLCD VLCD1 ADDRESS DETECTOR VLCD2 CE CL DI VSS No.6235-5/15 LC75844M Pin Functions Handling Symbol Pin No. Function Active I/O when unused S1/P1 to S4/P4 1 to 4 S5 to S22 5 to 22 COM1 to COM4 23 to 26 OSC 32 CE 34 CL 35 DI 36 Segment outputs for displaying the display data transferred by serial data input. The S1/P1 to S4/P4 pins can be used as general-purpose output ports - O OPEN - O OPEN - I/O VDD H I under serial data control. Common driver outputs The frame frequency (fo) is given by: fo=(fosc/512) Hz. Oscillator pin, which, together with externally connected resistor and capacitor, makes up an oscillator circuit. Serial data transfer input pin to be connected to the controller. CE: Chip enable CL: Synchronization clock DI: Transfer data I GND - I L I GND - I OPEN - I OPEN Display off input pin • INH=”L” (VSS) ... OFF S1/P1 to S4/P4=”L” (VSS) (Fixed to “L” after forced selection INH 33 of segment output port.) S5 to S22=”L” (VSS) COM1 to COM4=”L” (VSS) • INH=”H” (VDD) ... ON Note that the serial data can be transferred when OFF. VLCD1 29 VLCD2 30 Used for applying the LCD driver 2/3 bias voltage externally. Must be connected to VLCD2 when a 1/2 bias scheme is used. Used for applying the LCD driver 1/3 bias voltage externally. Must be connected to VLCD1 when a 1/2 bias scheme is used. VDD 27 Logic block power supply pin to provide a voltage between 2.7V to 6.0V. - - - VLCD 28 LCD driver power supply pin to provide a voltage between 2.7V to 6.0V. - - - VSS 31 Power supply pin to connect to ground. - - - No.6235-6/15 LC75844M Serial Data Transfer Form (1) When CL is stopped at the low level ≈ CE 0 0 1 0 0 0 1 0 D1 D2 D3 D37 D38 D39 D40 D41 D42 D43 D44 0 0 0 0 0 P0 P1 P2 DR SC BU 0 B0 B1 B2 B3 A0 A1 A2 A3 Display data 44-bits Control data 11-bit DD 1-bits ≈≈≈ ≈ ≈ CCB address 8-bits 0 0 1 0 0 0 1 0 D45 D46 D47 D81 D82 D83 D84 D85 D86 D87 D88 0 0 0 0 0 0 0 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8-bits Fixed data 11-bit Display data 44-bits ≈≈≈ DI ≈≈≈ CL DD 1-bits Note) DD ⋅⋅⋅⋅⋅ Direction data (2) When CL is stopped at the low level CL 0 1 0 0 0 1 0 D1 D2 D3 D37 D38 D39 D40 D41 D42 D43 D44 0 0 0 0 0 P0 P1 P2 DR SC BU 0 B0 B1 B2 B3 A0 A1 A2 A3 Display data 44-bits Control data 11-bit DD 1-bits ≈≈ 0 ≈≈ ≈≈ CCB address 8-bits 0 1 0 0 0 1 0 D45 D46 D47 D81 D82 D83 D84 D85 D86 D87 D88 0 0 0 0 0 0 0 B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8-bits Display data 44-bits Fixed data 11-bit 0 0 0 0 1 ≈≈ 0 DI ≈≈ ≈≈ CE DD 1-bits Note) DD ⋅⋅⋅⋅⋅ Direction data • CCB address ·· “44H” • D1 to D88 ······ Display data • P0 to P2·········· Segment output port / general-purpose output port switching control data • DR ················· 1/2 bias driver / 1/3 bias driver switching control data • SC ·················· Segment ON, OFF control data • BU ················· Normal mode, power save mode control data No.6235-7/15 LC75844M Example of Serial Data Transfer • When used with 45 segments or more Serial data must be transferred all 112-bit. 8-bit 0 0 1 0 0 56-bit 0 1 0 D1 D2 D3 D37 D38 D39 D40 D41 D42 D43 D44 0 0 0 0 0 P0 P1 P2 DR SC BU 0 D45 D46 D47 D81 D82 D83 D84 D85 D86 D87 D88 0 0 0 0 0 B0 B1 B2 B3 A0 A1 A2 A3 0 0 1 0 0 0 1 0 0 0 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 • When fewer than 45 segments are used, only 56-bits of serial data need to be sent. However, the display data D1 to D44 and the control data must be sent. 8-bit 0 0 1 0 0 56-bit 0 1 0 D37 D38 D39 D40 D41 D42 D43 D44 0 D1 D2 D3 0 0 0 0 P0 P1 P2 DR SC BU 0 B0 B1 B2 B3 A0 A1 A2 A3 Note) When fewer than 45 segments are used, transfers such as that shown in the figure below cannot be used. 8-bit 0 0 1 0 0 56-bit 0 1 0 D45 D46 D47 D81 D82 D83 D84 D85 D86 D87 D88 0 0 0 0 0 0 0 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 Control Data Description (1) P0 to P2 ⋅⋅⋅⋅⋅ Segment output port/General-purpose output port switching control data This control data switching output S1/P1 to S4/P4 segment output port and general-purpose output port. Control data Output pin state P0 P1 P2 S1/P1 S2/P2 S3/P3 S4/P4 0 0 0 S1 S2 S3 S4 0 0 1 P1 S2 S3 S4 0 1 0 P1 P2 S3 S4 0 1 1 P1 P2 P3 S4 1 0 0 P1 P2 P3 P4 Note) Sn (n=1 to 4): Segment output port Pn (n=1 to 4): General-purpose output port The following shows the correspondence between output pins and display data when the general-purpose output port is selected. Output pin Correspondence display data S1/P1 D1 S2/P2 D5 S3/P3 D9 S4/P4 D13 For example, if output pin S4/P4 is for the general-purpose output port, output pin S4/P4 outputs high and low-level when display data D13=“1” and D13= “0”, respectively. (2) DR ⋅⋅⋅⋅⋅ 1/2 bias drive, 1/3 bias driver switching control data This control data switching LCD 1/2 bias driver and 1/3 bias driver. DR Driver method 0 1/3 bias driver 1 1/2 bias driver No.6235-8/15 LC75844M (3) SC ⋅⋅⋅⋅⋅ Segment ON, OFF control data This control data controls segment ON and OFF. SC Display state 0 ON 1 OFF Note: that the OFF state with SC=[1] corresponds to the OFF state due to output of the display OFF waveform from the segment output pin. (4) BU ⋅⋅⋅⋅⋅ Normal mode, Power save mode control data This control data controls normal mode and power save mode. BU Mode Normal mode 0 Power save mode (oscillation on the OSC pin stops and the common, segment output pins go low, However, output pins 1 S1/P1 to S4/P4 can be used as the general-purpose output port by the use of control data P0 to P2.) Display data and output pin correspondence Output pin COM1 COM2 COM3 COM4 Output pin COM1 COM2 COM3 COM4 S1/P1 D1 D2 D3 D4 S12 D45 D46 D47 D48 S2/P2 D5 D6 D7 D8 S13 D49 D50 D51 D52 S3/P3 D9 D10 D11 D12 S14 D53 D54 D55 D56 S4/P4 D13 D14 D15 D16 S15 D57 D58 D59 D60 S5 D17 D18 D19 D20 S16 D61 D62 D63 D64 S6 D21 D22 D23 D24 S17 D65 D66 D67 D68 S7 D25 D26 D27 D28 S18 D69 D70 D71 D72 S8 D29 D30 D31 D32 S19 D73 D74 D75 D76 S9 D33 D34 D35 D36 S20 D77 D78 D79 D80 S10 D37 D38 D39 D40 S21 D81 D82 D83 D84 S11 D41 D42 D43 D44 S22 D85 D86 D87 D88 Note: Output pins S1/P1 to S4/P4 are for segment output port selection. For example, the data to output pin correspondence for the output pin S11 is as follows. Display data Output pin (S11) state D41 D42 D43 D44 0 0 0 0 LCD segments for COM1, COM2, COM3 and COM4 OFF 0 0 0 1 LCD segment for COM4 ON 0 0 1 0 LCD segment for COM3 ON 0 0 1 1 LCD segments for COM3 and COM4 ON 0 1 0 0 LCD segment for COM2 ON 0 1 0 1 LCD segments for COM2 and COM4 ON 0 1 1 0 LCD segments for COM2 and COM3 ON 0 1 1 1 LCD segments for COM2, COM3 and 4 ON 1 0 0 0 LCD segment for COM1 ON 1 0 0 1 LCD segments for COM1 and COM4 ON 1 0 1 0 LCD segments for COM1 and COM3 ON 1 0 1 1 LCD segments for COM1, 3 and COM4 ON 1 1 0 0 LCD segments for COM1 and COM2 ON 1 1 0 1 LCD segments for COM1, COM2 and COM4 ON 1 1 1 0 LCD segments for COM1, COM2 and COM3 ON 1 1 1 1 LCD segments for COM1, COM2, COM3 and COM4 ON No.6235-9/15 LC75844M Output Waveforms (1/4-Duty 1/2-Bias ON System) fosc 512 [Hz] COM1 VLCD VLCD1, VLCD2 0V COM2 VLCD VLCD1, VLCD2 0V COM3 VLCD VLCD1, VLCD2 0V COM4 VLCD VLCD1, VLCD2 0V LCD driver output when LCD segments for COM1, COM2, COM3 and COM4 are off. VLCD VLCD1, VLCD2 0V LCD driver output when only LCD segment for COM1 is on. VLCD VLCD1, VLCD2 0V LCD driver output when only LCD segment for COM2 is on. VLCD VLCD1, VLCD2 0V LCD driver output when LCD segments for COM1 and COM2 are on. VLCD VLCD1, VLCD2 0V LCD driver output when only LCD segment for COM3 is on. VLCD VLCD1, VLCD2 0V LCD driver output when LCD segments for COM1 and COM3 are on. VLCD VLCD1, VLCD2 0V LCD driver output when LCD segments for COM2 and COM3 are on. VLCD VLCD1, VLCD2 0V LCD driver output when LCD segments for COM1, COM2 and COM3 are on. VLCD VLCD1, VLCD2 0V LCD driver output when only LCD segment for COM4 is on. VLCD VLCD1, VLCD2 0V LCD driver output when LCD segments for COM2 and COM4 are on. VLCD VLCD1, VLCD2 0V LCD driver output when LCD segments for COM1, COM2, COM3 and COM4 are on. VLCD VLCD1, VLCD2 0V 1/4 duty, 1/2 bias waveform No.6235-10/15 LC75844M Output Waveforms (1/4-Duty 1/3-Bias ON System) fosc 512 [Hz] VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V COM1 COM2 COM3 COM4 LCD driver output when LCD segments for COM1, COM2, COM3 and COM4 are off. LCD driver output when only LCD segment for COM1 is on. LCD driver output when only LCD segment for COM2 is on. LCD driver output when LCD segments for COM1 and COM2 are on. LCD driver output when only LCD segment for COM3 is on. LCD driver output when LCD segments for COM1 and COM3 are on. LCD driver output when LCD segments for COM2 and COM3 are on. LCD driver output when LCD segments for COM1, COM2 and COM3 are on. LCD driver output when only LCD segment for COM4 is on. LCD driver output when LCD segments for COM2 and COM4 are on. LCD driver output when LCD segments for COM1, COM2, COM3 and COM4 are on. 1/4 duty, 1/3 bias waveform No.6235-11/15 LC75844M INH and Display Control Since the IC internal data (D1 to D88, control data) is undefined immediately after applying power, hold INH low at same time as applying power to turn off the display (S1/P1 to S4/P4, S5 to S22, COM1 to COM4 ⋅⋅⋅ VSS level), and serial transfer data from the microprocessor during the period that INH is low. When the data transfer is complete, set INH high. This procedure will avoid displaying meaningless patterns at startup. (See Figure 3) Power Sequence Be sure to observe the following sequence for power ON/OFF (See Figure 3) • Power ON: Logic block power (VDD) ON → LCD driver power (VLCD) ON • Power OFF: LCD driver power (VLCD) OFF → Logic block power (VDD) OFF When the logic block power (VDD) and LCD driver power (VLCD) are common, both power supplies can be turned ON/OFF simultaneously. t2 ≈ t1 t3 ≈ VDD ≈ VLCD INH VIL CE Internal data D1 to D44 P0 to P2 DR, SC, BU Internal data (D45 to D88) VIL Display data, control data transfer ≈ ≈ ≈ ≈ ≈ tc Indefinite Decision Indefinite Indefinite Decision Indefinite Figure 3 Note: •t1≥0 •t2>0 •t3≥0 (t2>t3) •tc ⋅⋅⋅⋅⋅ 10μs min Note on Controller-used Display Data Transfer Since the LC75844M is such that display data (D1 to D88) is transferred in 4 times, it is recommended to transfer display data within 30 [ms] in terms of display quality. No.6235-12/15 LC75844M Sample Application Circuit 1 1/2 Bias (For normal panel) (P1) (General-purpose output port) (P2) *2 (P3) (P4) Used for control of back-light OSC COM1 COM2 COM3 COM4 P1/S1 P2/S2 P3/S3 P4/S4 S5 VDD +3V VSS VLCD +5V VLCD1 C≥0.047μF C VLCD2 INH CE CL DI From controller LCD panel (Max.88 segment) S20 S21 S22 *2 If a capacitor other than the external capacitor Cosc=680 [pF] recommended is to be used, it is recommended to used a capacitor of 220 to 2200 [pF]. Sample Application Circuit 2 1/2 bias (For large panel) (P1) (General-purpose output port) (P2) *2 (P3) (P4) Used for control of back-light OSC VDD +3V VSS VLCD +5V Number 10kΩ≥R≥ Number kΩ C≥0.047μF C From controller R VLCD1 R VLCD2 INH CE CL DI COM1 COM2 COM3 COM4 P1/S1 P2/S2 P3/S3 P4/S4 S5 LCD panel (Max.88 segment) S20 S21 S22 *2 If a capacitor other than the external capacitor Cosc=680 [pF] recommended is to be used, it is recommended to used a capacitor of 220 to 2200 [pF]. No.6235-13/15 LC75844M Sample Application Circuit 3 1/3 bias (For normal panel) (P1) (P2) (P3) *2 (P4) (General-purpose output port) Used for control of back-light OSC +3V COM1 COM2 COM3 COM4 P1/S1 P2/S2 P3/S3 P4/S4 S5 VDD VSS VLCD +5V VLCD1 C≥0.047μF C LCD panel (Max.88 segment) VLCD2 C INH CE CL DI From controller S20 S21 S22 *2 If a capacitor other than the external capacitor Cosc=680 [pF] recommended is to be used, it is recommended to used a capacitor of 220 to 2200 [pF]. Sample Application Circuit 4 1/3 bias (For large panel) (P1) (General-purpose output port) (P2) (P3) *2 (P4) Used for control of back-light OSC VDD +3V VSS VLCD +5V R Number 10kΩ≥R≥ Number kΩ C≥0.047μF From controller VLCD1 R COM1 COM2 COM3 COM4 P1/S1 P2/S2 P3/S3 P4/S4 S5 LCD panel (Max.88 segment) VLCD2 C C R INH CE CL DI S20 S21 S22 *2 If a capacitor other than the external capacitor Cosc=680 [pF] recommended is to be used, it is recommended to used a capacitor of 220 to 2200 [pF]. No.6235-14/15 LC75844M SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of August, 2008. Specifications and information herein are subject to change without notice. PS No.6235-15/15