PERICOM PI49FCT3805DQ

PI49FCT3805D/E
3.3V, 2 x 1:5 CMOS Clock Driver
Features
Description
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Pericom Semiconductor’s PI49FCT3805D/E is composed of
non-inverting drivers. The outputs are configured into 2 groups of
one-in, five-out with independent output enable. Group B has an
extra MON output. Excellent output signals to power and ground
ratio minimize power and ground noise and also improves output
performance.
Low output skew: <200ps
Switching frequency up to 166 MHz
Fast output rise/fall time: <1.0ns
Low propagation delay: <2.5ns
Low input capacitance: <6.0pF
Balanced CMOS outputs
Industrial Temperature: –40°C to +85°C
3.3V ±10% operation, 5V Input Tolerant
Packaging (Pb-free & Green available):
– 20-pin 300-mil wide SOIC (S)
– 20-pin 150-mil wide QSOP (Q)
– 20-pin 209-mil wide SSOP (H)
– 20-pin 173-mil wide TSSOP (L)
Block Diagram
Pin Configuration
VCC
1
20
VCCB
OA0
2
19
OB0
OA1
3
18
OB1
OA2
4
17
OB2
GNDA
5
16
GNDB
OA3
6
15
OB3
OA4
7
14
OB4
GNDQ
8
13
MON
OEA
9
12
OEB
INA
10
11
INB
OEA
5
INA
OA0Ð4
5
INB
OB0Ð4
OEB
MON
Truth Table(1)
Pin Description
Pin Name
Inputs
Deescription
OEX
Hi-Z State Output Enable Inputs (Active Low)
INX
Outputs
OEX
INX
OAX
MON
Clock Inputs
L
L
L
L
OAN, OBN
Clock Outputs
L
H
H
H
MON
Monitor Output
H
L
Z
L
GND
Ground
H
H
Z
H
VCC
Power
Note:
1. H = High Voltage Level, L = Low Voltage Level,
Z = High Impedance
08-0298
1
PS8492D
11/13/08
PI49FCT3805D/E
3.3V, 2 x 1:5 CMOS Clock Driver
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................................................. –65°C to +150°C
Ambient Temperature with Power Applied ................................ –40°C to +85°C
Input Voltage to GND Potential (Inputs & VCC Only) .................. –0.5V to 5.5V
Output Voltage to GND Potential (Outputs & I/O Only)...–0.5V to +VCC +0.5V
VCC Input Voltage ........................................................................ –0.5V to +4.6V
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
DC Electrical Characteristics (TA = –40°C to +85°C, VCC = 3.3V ± 0.3V)
Symbol
Test Conditions(1)
Parameters
Min.
Typ.
VCC-0.2
2.4(3)
2.4(3)
3.0
3.0
Max.
Units
0.2
0.4
0.4
V
VOH
Output High Voltage
VCC = Min.,
VIN = VIL or VIH
IOH = -0.1mA
IOH = -8mA
IOH = -12mA
VOL
Output Low Voltage
VCC = Min.,
VIN = VIL or VIH
IOH = 0.1mA
IOH = 8mA
IOH = 12mA
VIH
Input High Voltage
Low Logic
2.0
5.5
VIL
Input Low Voltage
High Logic
-0.5
0.8
IIH
Input High Current
VCC = Max., VIN = 5.5V
1
IIL
Input Low Current
VCC = Max., VIN = GND
-1
IOZH
IOZL
High Impedance
output current
VCC = Max., all
outputs disabled
1
-1
VIK
Clamp Diode Voltage
VCC = Min., IIN = -18mA
IODH
IODL
IOS
0.2
0.3
VOUT = VCC
VOUT = GND
-0.7
-1.2
-40
-74
-100
VOUT = 1.5V, VIN = VIL or VIH, VCC = 3.3V
50
90
130
VCC = Max., VOUT = GND
-60
-100
-120
Output High
Current(4, 5)
VOUT = 1.5V, VIN = VIL or VIH, VCC = 3.3V
Output Low
Current(4, 5)
Short Circuit
Current(4, 5)
μA
V
mA
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading.
3. VOH = VCC – 0.6V at rated current.
4. This parameter is determined by device characterization but is not production tested.
5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
08-0298
2
PS8492D
11/13/08
PI49FCT3805D/E
3.3V, 2 x 1:5 CMOS Clock Driver
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(1)
Description
Test Conditions
Typ
Max.
CIN
Input Capacitance
VIN = 0V
3.0
4
COUT
Output Capacitance
VOUT = 0V
—
6
Units
pF
Note:
1. This parameter is determined by device characterization but is not production tested.
Power Supply Characteristics
Parameters
Test Conditions(1)
Description
ICC
Quiescent Power
Supply Current
VCC = Max.
IDD
Dynamic Supply
Current per Output
VCC = 3.6V,
CL = 15pF,
All Outputs Toggling
IC
∆ICC
Total Power Supply
Current
Supply Current per
inputs @ TTL High
VIN = GND or VDD
Min.
Typ. (2)
Max.
0.1
30
Units
μA
VCC = 3.6V,
CL = 15pF,
All Outputs Toggling,
fi = 133 MHz
VCC = 3.6V,
CL = 15pF,
All Outputs Toggling,
fi = 166 MHz
VCC = Max.
80
120
VIN = VCC or GND
100
135
VIN = VCC -0.6V or GND
100
135
VIN = VCC or GND
120
160
VIN = VCC -0.6V or GND
120
160
VIN = VCC -0.6V(3)
45
300
mA/
MHz
μA
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Per TTL driven input (VIN = VCC – 0.6V); all other inputs at VCC or GND.
08-0298
3
PS8492D
11/13/08
PI49FCT3805D/E
3.3V, 2 x 1:5 CMOS Clock Driver
Switching Characteristics over Operating Range
Parameters
tPLH
tPHL
Test Conditions(1)
Description
Propagation Delay INN to ON
tR/tF
CLKn Rist/Fall Time 0.8V ~ 2.0V
CL = 15pF,
133 MHz (3805D)
166 MHz (3805E)
3805D
3805E
Max.
Max.
3.0
2.5
1.5
1.0
270
270
270
200
Units
ns
(3)
Pulse Skew
(3)
Output Skew
tSK(t)
(3)
Package Skew
550
550
tZL, tZH,
tLZ, tHZ
Enable/Disable Time
5.2
5.0
ns
FMAX
Input Frequency
133
166
MHz
tSK(o)
tSK(p)
ps
Note:
1. These parameters are guaranteed by design
2. Series Resistor loading = 33Ω (See Test Circuit)
Switch Position
Test
Switch
Disable LOW
Enable LOW
6V
Disable HIGH
Enable HIGH
GND
All Other Inputs
Open
Definitions:
1. CL = Load capacitance: includes jig and probe capacitance.
2. RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
Enable/Disable Time Test Set-Up
Tests Circuit
6V
VCC
S
VCC
33Ω
Pulse
Generator
f = 125MHz
500Ω
D.U.T.
50Ω
33Ω
Pulse
Generator
CL
15pF
D.U.T.
50Ω
08-0298
4
CL
15pF
PS8492D
500Ω
11/13/08
PI49FCT3805D/E
3.3V, 2 x 1:5 CMOS Clock Driver
Switching Waveforms
Output Skew – tSK(o)
Propagation Delay
3V
Input
3V
Input
1.5V
0V
1.5V
tPLHx
tPHLx
0V
VOH
tPHL
tPLH
Ox
VOH
Output
1.5V
VOL
1.5V
tSK(o)
tSK(o)
VOL
VOH
Oy
Enable and Disable Times
1.5V
VOL
tPHLy
tPLHy
Enable
Disable
3V
OE
tSK(o) = | tPLHy Ð tPLHx | or | tPHLy Ð tPHLx |
1.5V
0V
tPZL
3.0V
3.0V
Output
Normally
Low
Switch
Closed
Enable
Disable
3V
1.5V
0.3V
tPZH
Output
Normally
High
Pulse Skew – tSK(p)
tPLZ
OE
VOL
1.5V
tPHZ
0.3V
Switch
Open
0V
VOH
1.5V
0V
tPLZ
tPZL
Output
Normally
Low
0V
1.5V
0.3V
tPZH
Package Skew – tSK(t)
Output
Normally
High
3V
Input
1.5V
3.0V
3.0V
Switch
Closed
Switch
Open
VOL
tPHZ
0.3V
VOH
1.5V
0V
0V
0V
tPHL1
tPLH1
VOH
Package 1
Output
1.5V
VOL
tSK(t)
tSK(t)
VOH
Package 2
Output
1.5V
tPLH2
VOL
tPHL2
tSK(t) = | tPLH2 Ð tPLH1 | or | tPHL2 Ð tPHL1 |
08-0298
5
PS8492D
11/13/08
PI49FCT3805D/E
3.3V, 2 x 1:5 CMOS Clock Driver
Packaging Mechanical: 20-Pin 300-mil wide SOIC (S)
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Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
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6
PS8492D
11/13/08
PI49FCT3805D/E
3.3V, 2 x 1:5 CMOS Clock Driver
Packaging Mechanical: 20-Pin 150-mil wide QSOP (Q)
DOCUMENT CONTROL NO.
PD - 1202
20
REVISION: H
.008
0.20
MIN.
.150
.157
DATE: 10/22/07
.008
.013
0.20
0.33
3.81
3.99
Guage Plane
.010
0.254
1
Detail A
.337 8.56
.344 8.74
.058 REF
1.47
.041
1.04
REF
.015 x 45˚
0.38
.053 1.35
.069 1.75
Detail A
.007
.010
SEATING
PLANE
.025
BSC
0.635
0˚-6˚
.016
.035
0.41
0.89
.004 0.101
.010 0.254
0.178
0.254
.228
.244
5.79
6.19
.008 0.203
.012 0.305
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1) Controlling dimensions in inches.
2) Ref: JEDEC MO-137B/AD
3) Dimensions do not include mold flash, protrusions or gate burrs
DESCRIPTION: 20-Pin, 150-Mil Wide, QSOP
PACKAGE CODE: Q
08-0298
7
PS8492D
11/13/08
PI49FCT3805D/E
3.3V, 2 x 1:5 CMOS Clock Driver
Packaging Mechanical: 20-Pin 209-mil wide SSOP (H)
DATE: 04/10/08
DESCRIPTION: 20-Pin, 209-Mil Wide, SSOP
PACKAGE CODE:
H20
DOCUMENT CONTROL #: PD-1240
REVISION: E
08-0140
08-0298
8
PS8492D
11/13/08
PI49FCT3805D/E
3.3V, 2 x 1:5 CMOS Clock Driver
Packaging Mechanical: 20-Pin 173-mil wide TSSOP (L)
DOCUMENT CONTROL NO.
PD - 1311
20
REVISION: E
DATE: 03/09/05
.169
.177
4.3
4.5
1
.252
.260
6.4
6.6
.004 0.09
.008 0.20
.047
1.20
Max
.007
.012
0.19
0.30
.0256
BSC
0.65
0.45
0.75
SEATING
PLANE
.018
.030
.238
.269
6.1
6.7
.002 0.05
.006 0.15
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AC
DESCRIPTION: 20-Pin, 173-Mil Wide, TSSOP
PACKAGE CODE: L
Ordering Information
Ordering Code
Package Code
Package Description
PI49FCT3805DHE
H
Pb-free & Green, 20-pin 209-mil SSOP
PI49FCT3805DQ
Q
20-pin 150-mil QSOP
PI49FCT3805DQE
Q
Pb-free & Green, 20-pin 150-mil QSOP
PI49FCT3805DSE
S
Pb-free & Green, 20-pin 300-mil SOIC
PI49FCT3805EH
H
20-pin 209-mil SSOP
PI49FCT3805EH
H
20-pin 209-mil SSOP
PI49FCT3805EQ
Q
20-pin 150-mil QSOP
PI49FCT3805EQ
Q
20-pin 150-mil QSOP
PI49FCT3805EL
L
20-pin 173-mil TSSOP
PI49FCT3805EL
L
20-pin 173-mil TSSOP
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. Number of Transistors = TBD
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
08-0298
9
PS8492D
11/13/08