PD - 96198A
IRFS4115PbF
IRFSL4115PbF
HEXFET® Power MOSFET
Applications
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
D
G
Benefits
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
S
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
150V
10.3m:
12.1m:
99A
ID (Package Limited)
195A
c
D
D
S
G
G
D2Pak
IRFS4115PbF
D
S
TO-262
IRFSL4115PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
Parameter
Max.
99
70
195
396
375
2.5
± 20
18
-55 to + 175
d
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
f
dv/dt
TJ
TSTG
Avalanche Characteristics
EAS (Thermally limited)
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
d
Thermal Resistance
Symbol
RθJC
RθJA
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g
Parameter
kl
jk
Junction-to-Case
Junction-to-Ambient
e
Units
c
c
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
A
W
W/°C
V
V/ns
°C
300
x
x
10lb in (1.1N m)
830
See Fig. 14, 15, 22a, 22b,
mJ
A
mJ
Typ.
Max.
Units
–––
0.4
40
°C/W
–––
1
03/09/11
IRFS/SL4115PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
ΔV(BR)DSS/ΔTJ
RDS(on)
VGS(th)
IDSS
IGSS
RG
Parameter
Min. Typ. Max. Units
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
150
–––
–––
3.0
–––
–––
–––
–––
–––
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
–––
0.18
10.3
–––
–––
–––
–––
–––
2.3
–––
–––
12.1
5.0
20
250
100
-100
–––
Conditions
V VGS = 0V, ID = 250μA
V/°C Reference to 25°C, ID = 3.5mA
mΩ VGS = 10V, ID = 62A
V VDS = VGS, ID = 250μA
μA VDS = 150V, VGS = 0V
VDS = 150V, VGS = 0V, TJ = 125°C
nA VGS = 20V
VGS = -20V
d
g
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Parameter
Conditions
Min. Typ. Max. Units
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
97
–––
–––
–––
–––
Turn-On Delay Time
–––
Rise Time
–––
Turn-Off Delay Time
–––
Fall Time
–––
Input Capacitance
–––
Output Capacitance
–––
Reverse Transfer Capacitance
–––
Effective Output Capacitance (Energy Related) –––
Effective Output Capacitance (Time Related)
–––
–––
77
28
26
51
18
73
41
39
5270
490
105
460
530
–––
120
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
VDS = 50V, ID = 62A
ID = 62A
VDS = 75V
VGS = 10V
ID = 62A, VDS =0V, VGS = 10V
VDD = 98V
ID = 62A
RG = 2.2Ω
VGS = 10V
VGS = 0V
VDS = 50V
g
ns
pF
g
ƒ = 1.0 MHz, See Fig. 5
VGS = 0V, VDS = 0V to 120V
VGS = 0V, VDS = 0V to 120V
Diode Characteristics
Symbol
IS
Parameter
VSD
trr
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
ISM
d
–––
99
A
–––
–––
396
A
MOSFET symbol
showing the
G
integral reverse
p-n junction diode.
TJ = 25°C, IS = 62A, VGS = 0V
TJ = 25°C
VR = 130V,
IF = 62A
TJ = 125°C
TJ = 25°C
di/dt = 100A/μs
TJ = 125°C
TJ = 25°C
g
D
S
––– –––
1.3
V
–––
86
–––
ns
––– 110 –––
––– 300 –––
nC
––– 450 –––
–––
6.5
–––
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Recommended max EAS limit, starting TJ = 25°C,
L = 0.17mH, RG = 25Ω, IAS = 100A, VGS =15V.
ISD ≤ 62A, di/dt ≤ 1040A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
2
Conditions
Min. Typ. Max. Units
–––
i, See Fig. 11
h
g
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
RθJC value shown is at time zero.
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IRFS/SL4115PbF
1000
1000
100
BOTTOM
100
10
1
5.0V
BOTTOM
5.0V
10
≤60μs PULSE WIDTH
≤60μs PULSE WIDTH
Tj = 175°C
Tj = 25°C
0.1
0.1
1
1
10
0.1
100
Fig 1. Typical Output Characteristics
10
100
Fig 2. Typical Output Characteristics
1000
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
T J = 175°C
100
T J = 25°C
10
1
VDS = 50V
≤60μs PULSE WIDTH
0.1
ID = 62A
VGS = 10V
2.5
2.0
1.5
1.0
0.5
2
4
6
8
10
12
14
16
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
100000
14.0
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
10000
C, Capacitance (pF)
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
Ciss
Coss
1000
Crss
100
10
ID= 62A
12.0
VDS= 120V
VDS= 75V
VDS= 30V
10.0
8.0
6.0
4.0
2.0
0.0
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
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0
20
40
60
80
100
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
3
IRFS/SL4115PbF
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 175°C
100
10
T J = 25°C
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100μsec
100
10msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
1
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
1
VSD, Source-to-Drain Voltage (V)
80
60
40
20
0
75
100
125
150
175
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
ID, Drain Current (A)
100
50
1000
200
Id = 3.5mA
190
180
170
160
150
140
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Drain-to-Source Breakdown Voltage
6.0
VGS(th) , Gate threshold Voltage (V)
6.0
5.0
4.0
Energy (μJ)
100
Fig 8. Maximum Safe Operating Area
120
25
10
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
3.0
2.0
1.0
0.0
5.0
4.0
ID = 250μA
3.0
ID = 1.0mA
ID = 1.0A
2.0
1.0
-20
0
20
40
60
80 100 120 140 160
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy
4
1msec
DC
-75 -50 -25
0
25 50 75 100 125 150 175
T J , Temperature ( °C )
Fig 12. Threshold Voltage vs. Temperature
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IRFS/SL4115PbF
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
τJ
R1
R1
τJ
τ1
R2
R2
τC
τ2
τ1
τC
Ri (°C/W) τi (sec)
0.245
0.0059149
0.155
τ2
0.0006322
C i= τi/R i
Ci = τi/Ri
0.001
SINGLE PULSE
( THERMAL RESPONSE )
0.0001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig. 13 Maximum Effective Transient Thermal Impedance, Junction-to-Case
50
50
IF = 42A
V R = 130V
40
TJ = 25°C
TJ = 125°C
30
IRR (A)
IRR (A)
40
IF = 62A
V R = 130V
20
TJ = 25°C
TJ = 125°C
30
20
10
10
0
0
0
200
400
600
800
0
1000
200
600
800
1000
Fig. 15 - Typical Recovery Current vs. dif/dt
Fig. 14 - Typical Recovery Current vs. dif/dt
2500
3000
IF = 42A
V R = 130V
2000
IF = 62A
V R = 130V
2400
TJ = 25°C
TJ = 125°C
1500
QRR (A)
QRR (A)
400
diF /dt (A/μs)
diF /dt (A/μs)
1000
500
TJ = 25°C
TJ = 125°C
1800
1200
600
0
0
0
200
400
600
800
1000
diF /dt (A/μs)
Fig. 16 - Typical Stored Charge vs. dif/dt
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0
200
400
600
800
1000
diF /dt (A/μs)
Fig. 17 - Typical Stored Charge vs. dif/dt
5
IRFS/SL4115PbF
Driver Gate Drive
D.U.T
-
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 18. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
VGS
20V
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 19a. Unclamped Inductive Test Circuit
RD
VDS
Fig 19b. Unclamped Inductive Waveforms
VDS
90%
VGS
D.U.T.
RG
+
- VDD
V10V
GS
10%
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
Fig 20a. Switching Time Test Circuit
tr
t d(off)
Fig 20b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
tf
.2μF
.3μF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
6
Fig 21a. Gate Charge Test Circuit
Qgs1 Qgs2
Qgd
Qgodr
Fig 21b. Gate Charge Waveform
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IRFS/SL4115PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
7+,6,6$1,5)6:,7+
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(/
,17(51$7,21$/
5(&7,),(5
/2*2
3$57180%(5
)6
'$7(&2'(
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$66(0%/<
/27&2'(
25
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
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)6
'$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7237,21$/
<($5 :((.
$ $66(0%/<6,7(&2'(
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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7
IRFS/SL4115PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
(;$03/( 7+,6,6$1,5//
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(&
3$57180%(5
,17(51$7,21$/
5(&7,),(5
/2*2
'$7(&2'(
<($5 :((.
/,1(&
$66(0%/<
/27&2'(
25
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
3$57180%(5
'$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7237,21$/
<($5 :((.
$ $66(0%/<6,7(&2'(
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
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IRFS/SL4115PbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 03/2011
9