Ordering number : EN8362C LB11967V Monolithic Digital IC For Variable Speed Fan Motor http://onsemi.com Single-Phase Full-Wave Pre-Driver Overview The LB11967V is a single-phase bipolar variable speed fan motor pre-driver that works with an external PWM signal. A highly efficient, quiet and low power consumption motor driver circuit, with a large variable speed, can be implemented by adding a small number of external components. This device is optimal for driving large scale fan motors (with large air volume and large current) such as those used in servers and consumer products. Functions • Pre-driver for single-phase full-wave drive ⇒ PNP-EMOS is used as an external power Transistor, enabling high-efficiency low-consumption drive by means of the low-saturation output and single-phase full-wave drive. (PMOS-NMOS also applicable) • External PWM input enabling variable speed control ⇒ Separately-excited upper direct PWM (f = 25kHz) control method, enabling highly silent speed control • Compatible with 12V, 24V, and 48V power supplies • Current limiter circuit incorporated ⇒ Chopper type current limit at start • Reactive current cut circuit incorporated ⇒ Reactive current before phase change is cut to enable silent and low-consumption drive. • Minimum speed setting pin ⇒ Minimum speed can be set with external resistor. The start assistance circuit enables start at extremely low speed. • Constant-voltage output pin for Hall bias • Lock protection and automatic reset functions incorporated • (Rotation speed detection), RD (Lock detection) output Semiconductor Components Industries, LLC, 2013 May, 2013 61610 SY/91708 MS / 72308 MS 20080703-S00002 / 92706 / 81005 SY PC No.8362-1/9 LB11967V Specifications Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit VCC maximum supply voltage VCC max 18 V OUT pin maximum output current IOUT max 50 mA OUT pin output withstand voltage VOUT max 18 V IHB max 10 mA VVTH max 8 V VRD/VFG max 18 V IRD/IFG max 10 mA 800 mW HB maximum output current VTH input pin withstand voltage RD/FG output pin output withstand voltage RD/FG output current Allowable power dissipation Pd max Mounted on a specified board* Operating temperature range Topr -30 to +95 °C Storage temperature range Tstg -55 to +150 °C *Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Recommended Operating Conditions at Ta = 25°C Parameter Symbol VCC supply voltage VCC VTH input level voltage range VTH Hall input common phase input VICM Conditions Ratings Unit 6 to 16 Full speed mode V 0 to 7 V 0.2 to 3 V voltage range Electrical Characteristics at Ta = 25°C, VCC = 12V, unless otherwise specified. Parameter Symbol Ratings Conditions min Circuit current 6VREG voltage HB voltage VOVER voltage typ Unit max ICC1 During drive 6 10 14 mA ICC2 During lock protection 6 10 14 mA 6VREG VHB VVOVER I6VREG = 5mA 5.80 6.0 6.15 V IHB = 5mA 1.05 1.22 1.35 V IVOVER = 1mA 12.0 12.8 13.6 V CPWM-H level voltage VCRH 4.35 4.55 4.75 V CPWM-L level voltage VCRL 1.45 1.65 1.85 V CPWM oscillation frequency FPWM CT pin H level voltage VCTH CT pin L level voltage VCTL ICT pin charge current ICT1 VCT = 1.2V ICT pin discharge current ICT2 VCT = 4.0V ICT charge/discharge current ratio RCT OUT-N output voltage VON OUT-P sink current IOP Hall input sensitivity VHN C = 100pF 18 25 32 kHz 3.4 3.6 3.8 V 1.4 1.6 1.8 V 1.6 2.0 2.5 μA 0.16 0.20 0.28 μA ICT1/ICT2 8 10 12 deg IO = 20mA 4 10 V 15 20 mA Zero peak value 10 20 mV 0.15 0.3 V 30 μA (including offset and hysteresis) RD/FG output pin L voltage VRD/VFG IRD/IFG = 5mA RD/FG output pin leak current IRDL/IFGL VRD/VFG = 16V No.8362-2/9 LB11967V Package Dimensions unit : mm (typ) 3179C Pd max -- Ta Allowable power dissipation, Pd max -- mW 1000 6.5 0.5 6.4 11 4.4 20 1 10 0.65 0.15 0.22 1.5max (1.3) (0.33) Mounted on specified board: 114.3×76.1×1.6mm3 glass epoxy board 800 600 400 352 200 0 --30 --10 10 30 50 70 90 110 PCA00204 0.1 Ambient temprature, Ta -- °C SANYO : SSOP20(225mil) Pin Assignment 20 OUT1P OUT2N 2 19 OUT1N VCC 3 18 VOVER VLIM 4 17 SGND LB11967V OUT2P 1 SENSE 5 RMI 6 VTH 7 16 6VREG 15 ROFF 14 CT CPWM 8 13 IN+ FG 9 12 HB RD 10 11 INTop view Truth Table During full-speed rotation IN- IN+ H L L H H L L H VTH CPWM L H H L CT L H IN- OUT1P OUT1N OUT2P OUT2N FG RD Mode OUT1 → 2 drive L L OFF H L OFF H L L OFF OFF L OFF H L OFF H OFF L OFF IN+ OUT1P OUT1N OUT2P OUT2N Mode L OUT2 → 1 drive OFF Lock protection H L L L OFF H OUT1 → 2 drive L H OFF H L L OUT2 → 1 drive H L OFF L OFF H During rotation L Regeneration in lower Tr L H OFF H OFF No.8362-3/9 VCC HALL IN- IN+ HB ROFF 6VREG 0.47 to 1μF CT Hysteresis AMP Hall-Bias 6VREG RMI Discharge pulse VTH Controller CPWM Oscillation VLIM SENSE Discharge circuit SGND OUT2P OUT2N OUT1P OUT1N RD FG LB11967V Block Diagram No.8362-4/9 LB11967V Sample Application Circuit 1 (12V) CB=~0.022μF RB=10kΩ Vz=18V ROUT=100Ω SOP8901 RF RFG,RRD=10k~100kΩ VCC RD VOVER FG HB H 6VREG SENSE IN- VLIM IN+ 6VREG RMI ROFF R=0~5kΩ OUT1P VTH PWM-IN OUT1N OUT2P CPWM CP=100pF 25kHz CT=0.47μF OUT2N CT SGND No.8362-5/9 LB11967V Sample Application Circuit 2 (24V, 48V) RF VCC RD VOVER FG H 6VREG HB SENSE IN- VLIM IN+ 6VREG RMI ROFF OUT1P VTH PWM-IN OUT1N OUT2P CPWM CP=100pF OUT2N CT SGND No.8362-6/9 LB11967V *1. <Power supply-GND wiring> SGND is connected to the control circuit power supply system. *2. <Power stabilization capacitor for regeneration> For the CM capacitor that is a power stabilization capacitor for PWM drive and for absorption of kick-back, the capacitance uses 0.1μF or more. In this IC, the lower Transistor performs current regeneration by means of switching of upper Transistor. Connect CM between VCC and GND with the thick pattern and along the shortest route. *3. <Zener diode to stabilize power supply for regneration> Be sure to use the zener diode if kick-back causes excessive increase of the supply voltage because such increase damages IC. *4. <Hall input> Wiring need to be short to prevent carrying of the noise. If the noise is carried, insert a capacitor between IN+ and IN-. The Hall input circuit is a comparator having a hysteresis of 20mV. It is recommended that the Hall input level is more than three times (60mVp-p) this hysteresis. *5. <Capacitor to set the PWM oscillation frequency> With CP = 100pF, oscillation occurs at f = 25kHz and provides the basic frequency of PWM. *6. <RD output> This is the open collector output, which outputs “L” during rotation and “H” at stop. This output is left open when not used. *7. <FG output> This is the open collector output, which can detect the rotation speed using the FG output according to the phase shift. This output is left open when not used. *8. <HB pin> This is a Hall element bias pin, that is, the constant-voltage output pin. *9. <RMI pin> This is the minimum speed setting pin, which is pulled up with 6VREG when not used. When IC power may possibly be turned OFF first when the pin is used, be sure to insert a current limiting resistor to prevent inflow of the large current. (The same applies to the VTH pin.) *10. <ROFF pin> This pin sets the soft switching time to cut the reactive current before phase change and is connected to 6VREG when not used. *11. <VLIM pin> This pin activates the current limiter when the SENSE pin voltage is higher than the VLIM pin voltage and is connected to 6VREG when not used. *12. <SENSE pin> This is connected to GND when not used. *13. <VOVER pin> This is a pin for constant-voltage bias and should be used for application of 24V and 48V. (Refer to the sample application circuit.) Be sure to use the current limiting resistor. This is left open when not used. No.8362-7/9 LB11967V Control Timing Chart VTH voltage f=25kHz (CP=100pF) ON-Duty-large 4.55V RMI voltage CPWM 1.65V ON-Duty-small PMW-IN disconnected 0V Rotation set to minimum speed (Stop mode) PWM control variable speed Low speed High speed Full speed 12V VCC 0V FG (1) Minimum speed setting (stop) mode PWM-IN input is filtered to generate the VTH voltage. At low speed, the fan rotates with the minimum speed set with RMI pin during low speed. If the minimum speed is not set (RMI = 6VREG), the fan stops. (2) Low⇔High speed mode PWM control is made through comparison of oscillation and VTH voltages with CPWM changing between 1.6V⇔4.6V. When the VTH voltage is lower, the IC switches to drive mode. When the VTH voltage is higher, the p-channel FET is turned off and coil current is regenerated through the low-side FET. Therefore, as the VTH voltage lowers, the output ON-DUTY increases, increasing the coil current and raising the motor speed. The rotation speed is fed back by the FG output. (3) Full speed mode The full-speed mode becomes effective with the VTH voltage of 1.65V or less. (VTH must be equal to GND when the speed control is not to be made.) (4) PWM-IN input disconnection mode When the PWM-IN input pin is disconnected, VTH becomes 1.65V or les and the output enables full drive at 100%. The fan runs at full speed. (Refer to the sample application circuit.) No.8362-8/9 LB11967V ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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