3.2 Gbps, 3.3 V, Low Noise, Transimpedance Amplifier ADN2880 FEATURES GENERAL DESCRIPTION Bandwidth: 2.5 GHz Optical sensitivity: −24.2 dBm 1 Differential transimpedance: 4400 V/A Power dissipation: 70 mW Differential output swing: 260 mV p-p Input overload current: 4.3 mA p-p On-chip RSSI function Low frequency cutoff: 20 kHz On-chip PD filter: RF = 200 Ω, CF = 20 pF Die size: 0.7 mm × 1.2 mm The ADN2880 is a 3.3 V, high gain SiGe transimpedance amplifier (TIA). The TIA converts the small signal current of a photo detector into differential voltage output. The ADN2880 features a 315 nA typical input-referred noise, enabling an optical sensitivity of −24.2 dBm (0.85 A/W PIN). With a bandwidth of 2.5 GHz, the ADN2880 allows a data rate operation up to 3.2 Gbps. Typical power dissipation is approximately 70 mW. To facilitate the assembly in small form factor packages, such as TO-46 headers, the ADN2880 provides an on-chip RC filter (200 Ω, 20 pF) and features a 20 kHz low frequency cutoff without using an external capacitor. An on-chip RSSI circuit, which generates a voltage proportional to the average photodiode current, is also available for power monitoring and assembly alignment. APPLICATIONS 3.2 Gbps or below optical receivers SONET/GbE/FC optical receivers SFF-8472-compliant receivers PIN/APD-TIA receive optical subassemblies (ROSA) The ADN2880 is available in die form. With a chip area of 1.2 mm × 0.7 mm, the TIA layout is specifically optimized for TO-Can-based packages. 1 Based on 1550 nm PIN, responsivity = 0.85 A/W, ER = 9 dB, BER < 10−10. FUNCTIONAL BLOCK DIAGRAM 3.3V VCCFILTER VCC 200Ω 50Ω 50Ω 1400Ω FILTER OUT OUTB IN 20pF 0.85V 5mA GND GND CAP 04945-001 RSSI Figure 1. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. ADN2880 TABLE OF CONTENTS Features .............................................................................................. 1 Pad Layout and Function Descriptions ..........................................5 Applications....................................................................................... 1 Typical Performance Characteristics ..............................................6 General Description ......................................................................... 1 Assembly Recommendations...........................................................9 Functional Block Diagram .............................................................. 1 Outline Dimensions ....................................................................... 12 Revision History ............................................................................... 2 Die Information.......................................................................... 12 Electrical Specifications ................................................................... 3 Ordering Guide .......................................................................... 12 Absolute Maximum Ratings............................................................ 4 ESD Caution.................................................................................. 4 REVISION HISTORY 7/05—Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADN2880 ELECTRICAL SPECIFICATIONS Minimum/maximum VCC = 3.3 V ± 0.3 V, TAMBIENT = −40°C to +95°C; typical VCC = 3.3 V, TAMBIENT = 25°C, unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE Bandwidth (BW) 1 Total Input Referred RMS Noise (IRMS) Total Input Referred RMS Noise (IRMS) Small Signal Transimpedance (ZT)1 Low Frequency Cutoff Output Return Loss Input Overload Current Maximum Differential Output Swing Output Data Transition Time PSRR Group Delay Variation Transimpedance Ripple Deterministic Jitter Linear Output Range Linear Input Current Range DC PERFORMANCE Power Dissipation Input Voltage Output Common-Mode Voltage Output Impedance PD FILTER Resistance PD FILTER Capacitance RSSI Gain RSSI Offset RSSI Accuracy 1 Conditions Min Typ −3 dB CD = 0.8 pF, dc to 2.1 GHz CD = 0.6 pF, dc to 2.1 GHz 100 MHz, differential 100 MHz, single-ended CAP = open, IIN = 20 μA CAP = 1 nF, IIN = 20 μA DC to 3.5 GHz, differential ER = 10 dB, at 95°C1 IIN, P- P = 2.0 mA IIN, P-P = 1.0 mA; 20% to 80% rise/fall time IIN = 0 mA, <10 MHz 1.0 GHz to 3.0 GHz 50 MHz to 1.0 GHz, single-ended 10 μA < IIN, P- P ≤ 100 μA, K28.5 @ 3.2 Gbps 100 μA < IIN, P- P ≤ 2.0 mA, K28.5 @ 3.2 Gbps 10 μA < IIN, P- P ≤ 2.0 mA, PRBS 231 − 1 at OC48 (FEC) Differential, <1 dB compression Single-ended, <1 dB compression 1.9 2.5 315 300 4400 2200 20 1.0 −26 4.3 260 60 39 50 0.93 16 25 38 210 53 IIN, AVE = 0 mA Compliance voltage DC (50 Ω) terminated to VCC Single-ended RF CF IIN, AVE = 5 μA to 1 mA IIN, AVE = 10 μA 5 μA < IIN, P- P ≤ 20 μA 20 μA < IIN, P- P ≤ 1 mA An equivalent IIN, P-P = 13 μA current signal is applied to the TIA input. No input capacitor is applied. Rev. 0 | Page 3 of 12 2700 1350 2.11 170 70 0.85 VCC − 0.12 50 200 20 0.85 8.0 ±7 ±3 Max 485 6200 3100 −20 375 110 Unit GHz nA nA V/A V/A kHz kHz dB mA p-p mV p-p ps dB ps dB ps p-p ps p-p ps p-p mV p-p μA p-p mW V V Ω Ω pF V/mA mV % % ADN2880 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage (VCC to GND) Maximum Voltage to All Input and Output Signal Pins Minimum Voltage to All Input and Output Signal Pins Maximum Input Current Storage Temperature Range Operating Ambient Temperature Range Maximum Junction Temperature Die Attach Temperature (<30 sec) Rating 5V VCC + 0.4 V GND – 0.4 V 10 mA −65°C to +125°C −40°C to +95°C 125°C 410°C Stresses above those listed under Absolute Maximum Rating may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 4 of 12 ADN2880 PAD LAYOUT AND FUNCTION DESCRIPTIONS GND 1 IN 2 VCC VCCFILTER GND 17 16 15 14 13 GND 12 OUT 11 OUTB 3 FILTER 4 FILTER 5 6 7 GND RSSI 8 9 CAP GND 10 GND 04945-002 TEST VCC Figure 2. Pad Layout Table 3. Pad Function Descriptions Pad No. Mnemonic Pin Type 1 Description 1 2 3 4, 5 6 7 8 GND IN TEST FILTER GND RSSI CAP P AI AI AO P AO AI 9, 10, 13, 14 11 12 15 GND OUTB OUT VCCFILTER P AO AO P 16, 17 VCC P Ground. (Input return.) Current Input. Bond directly to a photodiode (PD) anode. Test Probe Pad. Do not connect. Filter Output. Pad 4 and Pad 5 are metal connected. Optional bond to a PD cathode. Ground. Voltage Output. Provides average input current monitoring. If not used, connect to ground. Low Frequency Cutoff (LFC) Setpoint. For SONET applications, see Figure 10 and contact sales for assembly details. Ground. (Output return.) Negative Output, CML, On-Chip 50 Ω Termination (AC or DC Termination). Positive Output, CML, On-Chip 50 Ω Termination (AC or DC Termination). On-Chip Filter Supply. Connect to VCC to Enable On-Chip RC Filter (200 Ω, 20 pF). Leave unconnected if not used. 3.3 V Supply. Place a 200 pF, RF decoupling capacitor close to the power pad to reduce the power noise. 1 P = power; AI = analog input; and AO = analog output. Rev. 0 | Page 5 of 12 ADN2880 TYPICAL PERFORMANCE CHARACTERISTICS 3.2 70 65 3.0 3.6V 60 BANDWIDTH (GHz) QB OUTPUT TZ (dB-Ω) 55 50 45 40 35 Q OUTPUT 2.8 3.3V 2.6 3.0V 2.4 2.2 100M 1G FREQUENCY (Hz) 10G 100G 2.0 –40 04945-017 25 10M Figure 3. Single-Ended Transimpedance vs. Frequency 0 20 40 TEMPERATURE (°C) 60 80 100 Figure 6. Bandwidth vs. VCC and Temperature 5.0 90 85 4.8 POWER DISSIPATION (mW) 3.6V 4.6 3.6V TZ (kΩ) –20 04945-019 30 4.4 3.3V 4.2 3.0V 80 75 3.3V 70 65 3.0V 60 4.0 0 20 40 TEMPERATURE (°C) 60 80 100 50 –40 Figure 4. Differential Transimpedance vs. VCC and Temperature –20 0 20 40 TEMPERATURE (°C) 60 80 100 04945-020 –20 04945-018 3.8 –40 4G 04945-021 55 Figure 7. Power Dissipation vs. VCC and Temperature 5.5 –20 5.0 –25 4.5 –30 SDD22 3.5 –35 –40 3.0 –45 2.5 2.0 0 10 20 30 40 50 60 IINPP (μA) 70 80 90 100 04945-027 TZ (kΩ) 4.0 Figure 5. Differential Transimpedance vs. Input Current –50 10M 100M FREQUENCY (Hz) 1G Figure 8. SDD22 vs. Frequency up to 3.5 GHz, CAP = Open Rev. 0 | Page 6 of 12 ADN2880 3.0 1,000 CAP = OPEN 2.0 VRSSI (V) 100 1.5 1.0 10 CAP = 1nF 0.5 1,000 0 0 3 5 95 4 Figure 12. Full-Scale of RSSI Voltage Output vs. Input Current 18 350 16 340 330 14 320 12 IRMS NOISE (nA) 10 8 6 4 310 300 290 280 270 2 260 1 10 100 1,000 EXTERNAL CAPACITANCE AT CAP (pF) 10,000 250 –40 04945-031 0 –25 –10 5 20 35 50 TEMPERATURE (°C) 65 80 Figure 13. Input Noise vs. Temperature with 2 GHz Low-Pass Filter Figure 10. Low Frequency Cutoff vs. Capacitance at CAP 350 30 INPUT REFERRED RMS NOISE (nA) 25 20 15 10 0 0 5 10 15 20 IIN (μA) 25 30 35 04945-024 5 325 300 275 250 0 0.2 0.4 0.6 0.8 PHOTODIODE CAPACITANCE (pF) Figure 14. Input Referred Noise (DC to 2.0 GHz) vs. Photodiode Capacitance CD (pF) Figure 11. RSSI Voltage Output vs. Input Current (0 μA to 35 μA) Rev. 0 | Page 7 of 12 1.0 04945-048 LOW FREQUENCY CUTOFF (kHz) 2 IIN (mA) Figure 9. Low Frequency Cutoff vs. Input Current VRSSI (mV) 1 04945-008 100 INPUT CURRENT (μA) 04945-028 1 10 04945-007 LOW FREQUENCY CUTOFF (kHz) 2.5 ADN2880 52.9ps/DIV OPTICAL POWER –22.7dBm Figure 15. Output Eye at 3.2 Gbps with BER <10−10 (Based on a 1550 nm PIN, Responsivity = 0.91 A/W, ER = 9 dB, PRBS 231) 50 0 –25 –50 0 1 2 FREQUENCY (GHz) 3 4 04945-010 GROUP DELAY (ps) 25 Figure 16. Group Delay vs. Frequency Rev. 0 | Page 8 of 12 5.0 4.5 4.0 3.5 3.0 –40 –25 –10 5 20 35 50 TEMPERATURE (°C) 65 80 Figure 17. Input Overload Current vs. Temperature 95 04945-030 04945-011 5.0mV/DIV INPUT OVERLOAD CURRENT (mA p-p) 5.5 ADN2880 ASSEMBLY RECOMMENDATIONS Coplanar PIN Photodiode for SDH/SONET Dual Planar PIN/APD Photodiode for SDH/SONET VCC VPD VCC VPD CPD CPD CA OUTB OUT CB OUTB OUT 04945-049 CB 04945-042 CA PD Figure 18. 5-Pin TO-46 with External Photodiode Supply VPD Connected Through the FILTER Pin VCC B.W B.W. VCC VPD 200Ω 50Ω B.W. VCC CB B.W. B.W. CPD B.W VCC CB VPD Figure 20. 5-Pin TO-46 with External Photodiode Supply VPD to a Dual Planar PIN or APD B.W. 50Ω 200Ω B.W. 50Ω 50Ω CPD B.W. B.W. OUT FILTER OUT OUTB OUTB B.W. B.W. B.W. B.W. IN 20pF 0.85V IN 20pF 0.85V RSSI GND GND B.W. CAP GND B.W. B.W. GND B.W. CAP B.W. 04945-050 04945-032 B.W. RSSI Figure 19. Equivalent Circuit of the Assembly Including Bond Wires Figure 21. For Dual Planar PDs, No Connection to FILTER Pin Table 4. Bill of Materials (BOM) Notes Component PD TIA One mil thickness, gold wire, ball bond recommended. CB CPD CA Description 1× vendor specific, 2.5 Gbps, photodiode 1× ADN2880 (0.7 mm × 1.2 mm), 3.2 Gbps, transimpedance amplifier 1× 200 pF, RF single-layer capacitor 1× 560 pF, RF single-layer capacitor 1× 1000 pF, ceramic capacitor (optional for SDH) Minimize all GND bond-wire lengths. Minimize IN, FILTER, OUT, and OUTB bond-wire lengths. Maintain symmetry in length and orientation between OUT and OUTB bond wires. Maintain symmetry in length and orientation between IN and FILTER bond wires. Maintain symmetry between IN/FILTER and OUT/OUTB bond wires. Rev. 0 | Page 9 of 12 ADN2880 PIN Photodiode for a Non-SDH/SONET Application VCC RSSI VCC RSSI SC SC CB CB OUTB OUTB OUT 04945-044 04945-022 OUT Figure 22. Coplanar PIN and RSSI Layout for a 5-Pin TO-46 VCC B.W. Figure 24. Dual Planar PIN and RSSI Layout for a 5-Pin TO-46 B.W. CB ADN2880 PD B.W. VCCFILTER 200Ω 50Ω SC CB VCC 50Ω B.W. B.W. OUT FILTER B.W. B.W. OUTB IN 20pF 0.85V B.W. B.W. GND CAP 04945-046 GND 04945-040 RSSI B.W. Figure 23. Equivalent Circuit with Bond Wires, as Shown in Figure 22 Figure 25. Side View of the Assembly, as Shown in Figure 22 Table 5. Bill of Materials (BOM) Notes Component PD TIA One mil thickness, gold wire, ball bond recommended. CB Sc Description 1× vendor specific, 2.5 Gbps, photodiode 1× ADN2880 (0.7 mm × 1.2 mm), 3.2 Gbps, transimpedance amplifier 1× 200 pF, RF single-layer capacitor 1× ceramic standoff or 1× optional capacitor Minimize all GND bond-wire lengths. Minimize IN, FILTER, OUT, and OUTB bond-wire lengths. Maintain symmetry in length and orientation between OUT and OUTB bond wires. Maintain symmetry in length and orientation between IN and FILTER bond wires. Maintain symmetry between IN/FILTER and OUT/OUTB bond wires. Rev. 0 | Page 10 of 12 ADN2880 PIN Photodiode for Non-SDH/SONET Applications VCC VCC CB SC OUT OUTB SC OUT 04945-051 04945-043 OUTB CB Figure 26. Coplanar PIN for a 4-Pin TO-46 VCC B.W. Figure 28. Dual Planar PIN for a 4-Pin TO-46 B.W. CB ADN2880 PD SC B.W. VCCFILTER 200Ω VCC 50Ω CB 50Ω B.W. B.W. OUT FILTER B.W. B.W. OUTB TO CAN HEADER IN 20pF 0.85V B.W. GND CAP 04946-029 GND 04945-039 RSSI B.W. Figure 29. Side View of the Assembly, as Shown in Figure 26 Figure 27. Equivalent Circuit with Bond Wires, as Shown in Figure 26 Table 6. Bill of Materials (BOM) Notes Component PD TIA One mil thickness, gold wire, ball bond recommended. CB Sc Description 1× vendor specific, 2.5 Gbps, photodiode 1× ADN2880 (0.7 mm × 1.2 mm), 3.2 Gbps, transimpedance amplifier 1× 200 pF, RF single-layer capacitor 1× ceramic standoff or 1× optional 1000 pF capacitor Minimize all GND bond-wire lengths. Minimize IN, FILTER, OUT, and OUTB bond-wire lengths. Maintain symmetry in length and orientation between OUT and OUTB bond wires. Maintain symmetry in length and orientation between IN and FILTER bond wires. Maintain symmetry between IN/FILTER and OUT/OUTB bond wires. Rev. 0 | Page 11 of 12 ADN2880 OUTLINE DIMENSIONS 1 17 16 15 13 14 2 12 3 TOP VIEW 0.70 11 4 5 6 7 8 9 10 1.20 SIDE VIEW 0.25 Figure 30. 17-Pad Bare Die Sales [CHIP] Dimensions shown in millimeters Table 7. Pad Coordinates Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Mnemonic GND IN TEST FILTER FILTER GND RSSI CAP GND GND OUTB OUT GND GND VCCFILTER VCC VCC DIE INFORMATION X (μm) −500 −500 −500 −500 −500 −350 −200 −50 +130 +500 +350 +350 +500 +130 −50 −200 −350 Y (μm) +260 +130 +10 −120 −260 −260 −260 −260 −260 −260 −60 +60 +260 +260 +260 +260 +260 Die Size 0.7 mm × 1.2 mm (edge-to-edge, including 1 mil scribe) Die Thickness 10 mils = 0.25 mm Passivation Openings 0.075 mm × 0.075 mm (Pad 1 to Pad 8, Pad 10, Pad 13, Pad 15 to Pad 17) 0.144 mm × 0.075 mm (Pad 9, Pad 11, Pad 12, Pad 14) Passivation Composition 5000 Å Si3N4 (top) 5000 Å SiO2 (bottom) Pad Composition Al/1%Cu Substrate Contact To ground ORDERING GUIDE Model ADN2880ACHIPS Temperature −40°C to +95°C Package Description 17-Pad Die Sales © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04945–0–7/05(0) T T Rev. 0 | Page 12 of 12