ALD ALD110908SAL

e
ADVANCED
LINEAR
DEVICES, INC.
TM
EPAD
EN
®
AB
LE
D
ALD110808/ALD110808A/ALD110908/ALD110908A
QUAD/DUAL N-CHANNEL ENHANCEMENT MODE EPAD®
VGS(th)= +0.80V
PRECISION MATCHED PAIR MOSFET ARRAY
GENERAL DESCRIPTION
APPLICATIONS
ALD110808A/ALD110808/ALD110908A/ALD110908 are high precision
monolithic quad/dual enhancement mode N-Channel MOSFETs matched
at the factory using ALD’s proven EPAD® CMOS technology. These devices are intended for low voltage, small signal applications.
These MOSFET devices are built on the same monolithic chip, so they
exhibit excellent temperature tracking characteristics. They are versatile
as circuit elements and are useful design component for a broad range of
analog applications. They are basic building blocks for current sources,
differential amplifier input stages, transmission gates, and multiplexer
applications. For most applications, connect the V- and IC pins to the most
negative voltage in the system and the V+ pin to the most positive voltage.
All other pins must have voltages within these voltage limits at all times.
ALD110808/ALD110908 devices are built for minimum offset voltage and
differential thermal response, and they are suited for switching and amplifying applications in +1.0V to +10V (+/- 5 V) systems where low input bias
current, low input capacitance and fast switching speed are desired. As
these are MOSFET devices, they feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment.
These devices are suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect
Transistors result from extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is
specified at 30pA at room temperature. For example, DC beta of the
device at a drain current of 3mA and input leakage current of 30pA at
25°C is = 3mA/30pA = 100,000,000.
FEATURES
• Enhancement-mode (normally off)
• Standard Gate Threshold Voltages: +0.80V
• Matched MOSFET to MOSFET characteristics
• Tight lot to lot parametric control
• Low input capacitance
• VGS(th) match to 2mV and 10mV
• High input impedance — 1012Ω typical
• Positive, zero, and negative VGS(th) temperature coefficient
• DC current gain >108
• Low input and output leakage currents
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
Operating Temperature Range*
0°C to +70°C
0°C to +70°C
16-Pin
SOIC
Package
ALD110808ASCL
ALD110808SCL
16-Pin
Plastic Dip
Package
ALD110808APCL
ALD110808PCL
8-Pin
SOIC
Package
ALD110908ASAL
ALD110908SAL
8-Pin
Plastic Dip
Package
ALD110908APAL
ALD110908PAL
• Precision current mirrors
• Precision current sources
• Voltage choppers
• Differential amplifier input stage
• Voltage comparator
• Voltage bias circuits
• Sample and Hold
• Analog inverter
• Level shifters
• Source followers and buffers
• Current multipliers
• Analog switches / multiplexers
PIN CONFIGURATION
ALD110808
IC*
1
GN1
2
DN1
3
S12
4
V-
5
DN4
6
GN4
7
IC*
8
V-
V-
M1
M2
V+
VM4
M3
V-
V-
16
IC*
15
GN2
14
DN2
13
V+
12
S34
11
DN3
10
GN3
9
IC*
8
IC*
7
GN2
6
DN2
5
V-
SCL, PCL PACKAGES
ALD110908
IC*
1
GN1
2
DN1
3
S12
4
V-
V-
M1
M2
V-
SAL, PAL PACKAGES
*IC pins are internally connected.
Connect to V-
* Contact factory for industrial temp. range or user-specified threshold voltage values.
Rev 2.1 ©2012 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Drain-Source voltage, VDS
10.6V
Gate-Source voltage, VGS
10.6V
Power dissipation
500 mW
Operating temperature range SCL, PCL, SAL, PAL package
0°C to +70°C
Storage temperature range
-65°C to +150°C
Lead temperature, 10 seconds
+260°C
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
OPERATING ELECTRICAL CHARACTERISTICS
V+ = +5V V- = GND TA = 25°C unless otherwise specified
ALD110808A/ALD110908A
Parameter
Symbol
Gate Threshold Voltage
VGS(th)
Offset Voltage
VGS(th)1-VGS(th)2
Min
0.78
Typ
Max
ALD110808/ALD110908
Min
Max
Unit
0.80
0.82
V
3
10
Test Conditions
0.80
0.82
VOS
1
2
Offset Voltage Tempco
TCVOS
5
5
µV/°C
VDS1 = VDS2
GateThreshold Voltage Tempco
TCVGS(th)
-1.7
0.0
+1.6
-1.7
0.0
+1.6
mV/°C
ID = 1µA, VDS = 0.1V
ID = 20µA, VDS = 0.1V
ID = 40µA, VDS = 0.1V
On Drain Current
IDS (ON)
12.0
3.0
12.0
3.0
mA
VGS = +10.3V, VDS = +5V
VGS = +4.8V, VDS = +5V
Forward Transconductance
GFS
1.4
1.4
mmho
VGS = +4.8V
VDS = +9.8V
Transconductance Mismatch
∆GFS
1.8
1.8
%
Output Conductance
GOS
68
68
µmho
VGS = +4.8V
VDS = +9.8V
Drain Source On Resistance
RDS (ON)
500
500
Ω
VDS = +0.1V
VGS = +4.8V
Drain Source On Resistance
Mismatch
∆RDS (ON)
0.5
0.5
%
Drain Source Breakdown
Voltage
BVDSX
Drain Source Leakage Current1
IDS (OFF)
10
0.78
Typ
10
10
400
10
4
IDS =1µA, VDS = 0.1V
mV
V
IDS = 1.0µA
V-= VGS = -1.0V
400
pA
4
nA
VGS = -0.2V, VDS =+5V
V- = -5V
TA = 125°C
200
1
pA
nA
VDS = 0V VGS = +5V
TA =125°C
Gate Leakage Current1
IGSS
3
Input Capacitance
CISS
2.5
2.5
pF
Transfer Reverse Capacitance
CRSS
0.1
0.1
pF
Turn-on Delay Time
ton
10
10
ns
V+ = 5V RL= 5KΩ
Turn-off Delay Time
toff
10
10
ns
V+ = 5V RL= 5KΩ
60
60
dB
f = 100KHz
Crosstalk
Notes:
1
200
1
3
Consists of junction leakage currents
ALD110808/ALD110808A/ALD110908/ALD110908A
Advanced Linear Devices
2 of 11
PERFORMANCE CHARACTERISTICS OF EPAD®
PRECISION MATCHED PAIR MOSFET FAMILY
ALD1108xx/ALD1109xx/ALD1148xx/ALD1149xx are monolithic
quad/dual N-Channel MOSFETs matched at the factory using ALD’s
proven EPAD® CMOS technology. These devices are intended for
low voltage, small signal applications.
ALD’s Electrically Programmable Analog Device (EPAD) technology provides the industry’s only family of matched transistors with
a range of precision threshold values. All members of this family
are designed and actively programmed for exceptional matching of
device electrical characteristics. Threshold values range from 3.50V Depletion to +3.50V Enhancement devices, including standard products specified at -3.50V, -1.30V, -0.40V, +0.00V, +0.20V,
+0.40V, +0.80V, +1.40V, and +3.30V. ALD can also provide any
customer desired value between -3.50V and +3.50V. For all these
devices, even the depletion and zero threshold transistors, ALD
EPAD technology enables the same well controlled turn-off, subthreshold, and low leakage characteristics as standard enhancement mode MOSFETs. With the design and active programming,
even units from different batches and different date of manufacture
have well matched characteristics. As these devices are on the
same monolithic chip, they also exhibit excellent tempco tracking.
This EPAD MOSFET Array product family (EPAD MOSFET) is available in the three separate categories, each providing a distinctly
different set of electrical specifications and characteristics. The first
category is the ALD110800/ALD110900 Zero-Threshold™ mode
EPAD MOSFETs. The second category is the ALD1108xx/
ALD1109xx enhancement mode EPAD MOSFETs. The third category is the ALD1148xx/ALD1149xx depletion mode EPAD
MOSFETs. (The suffix “xx” denotes threshold voltage in 0.1 V steps,
for example, xx=08 denotes 0.80V).
The ALD110800/ALD110900 (quad/dual) are EPAD MOSFETs in
which the individual threshold voltage of each MOSFET is fixed at
zero. The threshold voltage is defined as IDS = 1uA @ VDS = 0.1V
when the gate voltage VGS = 0.00V. Zero threshold devices operate in the enhancement region when operated above threshold voltage and current level (VGS > 0.00V and IDS > 1uA) and subthreshold region when operated at or below threshold voltage and current level (VGS <= 0.00V and IDS < 1uA). This device, along with
other very low threshold voltage members of the product family,
constitute a class of EPAD MOSFETs that enable ultra low supply
voltage operation and nanopower type of circuit designs, applicable
in either analog or digital circuits.
The ALD1108xx/ALD1109xx (quad/dual) product family features
precision matched enhancement mode EPAD MOSFET devices,
which require a positive bias voltage to turn on. Precision threshold
values such as +1.40V, +0.80V, +0.20V are offered. No conductive
channel exists between the source and drain at zero applied gate
voltage for these devices, except that the +0.20V version has a
subthreshold current at about 20nA.
The ALD1148xx/ALD1149xx (quad/dual) features depletion mode
EPAD MOSFETs, which are normally-on devices when the gate
bias voltage is at zero volt. The depletion mode threshold voltage
is at a negative voltage level at which the EPAD MOSFET turns off.
Without a supply voltage and/or with VGS = 0.0V the EPAD
MOSFET device is already turned on and exhibits a defined and
controlled on-resistance between the source and drain terminals.
The ALD1148xx/ALD1149xx depletion mode EPAD MOSFETs are
different from most other types of depletion mode MOSFETs and
certain types of JFETs in that they do not exhibit high gate leakage
ALD110808/ALD110808A/ALD110908/ALD110908A
currents and channel/junction leakage currents. When negative
signal voltages are applied to the gate terminal, the designer/user
can depend on the EPAD MOSFET device to be controlled, modulated and turned off precisely. The device can be modulated and
turned-off under the control of the gate voltage in the same manner
as the enhancement mode EPAD MOSFET and the same device
equations apply.
EPAD MOSFETs are ideal for minimum offset voltage and differential thermal response, and they are used for switching and amplifying applications in low voltage (1V to 10V or +/-0.5V to +/-5V) or
ultra low voltage (less than 1V or +/- 0.5V) systems. They feature
low input bias current (less than 30pA max.), ultra low power
(microWatt) or Nanopower (power measured in nanoWatt) operation, low input capacitance and fast switching speed. These devices can be used where a combination of these characteristics
are desired.
KEY APPLICATION ENVIRONMENT
EPAD( MOSFET Array products are for circuit applications in one
or more of the following operating environments:
* Low voltage: 1V to 10V or +/- 0.5V to +/- 5V
* Ultra low voltage: less than 1V or +/- 0.5V
* Low power: voltage x current = power measured in microwatt
* Nanopower: voltage x current = power measured in nanowatt
* Precision matching and tracking of two or more MOSFETs
ELECTRICAL CHARACTERISTICS
The turn-on and turn-off electrical characteristics of the EPAD
MOSFET products are shown in the Drain-Source On Current vs
Drain-Source On Voltage and Drain-Source On Current vs GateSource Voltage graphs. Each graph show the Drain-Source On
Current versus Drain-Source On Voltage characteristics as a function of Gate-Source voltage in a different operating region under
different bias conditions. As the threshold voltage is tightly specified, the Drain-Source On Current at a given gate input voltage is
better controlled and more predictable when compared to many
other types of MOSFETs.
EPAD MOSFETs behave similarly to a standard MOSFET, therefore classic equations for a n-channel MOSFET applies to EPAD
MOSFET as well. The Drain current in the linear region (VDS <
VGS - VGS(th)) is given by:
ID = u . COX . W/L . [VGS - VGS(th) - VDS/2] . VDS
where:
u = Mobility
COX = Capacitance / unit area of Gate electrode
VGS = Gate to Source voltage
VGS(th) = Turn-on threshold voltage
VDS = Drain to Source voltage
W = Channel width
L = Channel length
In this region of operation the IDS value is proportional to VDS value
and the device can be used as gate-voltage controlled resistor.
For higher values of VDS where VDS >= VGS - VGS(th), the saturation current IDS is now given by (approx.):
IDS = u . COX . W/L . [VGS - VGS(th)]2
Advanced Linear Devices
3 of 11
PERFORMANCE CHARACTERISTICS OF EPAD®
PRECISION MATCHED PAIR MOSFET FAMILY (cont.)
SUB-THRESHOLD REGION OF OPERATION
ZERO TEMPERATURE COEFFICIENT (ZTC) OPERATION
Low voltage systems, namely those operating at 5V, 3.3V or less,
typically require MOSFETs that have threshold voltage of 1V or
less. The threshold, or turn-on, voltage of the MOSFET is a voltage
below which the MOSFET conduction channel rapidly turns off. For
analog designs, this threshold voltage directly affects the operating
signal voltage range and the operating bias current levels.
For an EPAD MOSFET in this product family, there exist operating
points where the various factors that cause the current to increase
as a function of temperature balance out those that cause the current to decrease, thereby canceling each other, and resulting in net
temperature coefficient of near zero. One of this temperature stable
operating point is obtained by a ZTC voltage bias condition, which
is 0.55V above a threshold voltage when VGS = VDS, resulting in a
temperature stable current level of about 68uA. For other ZTC operating points, see ZTC characteristics.
At or below threshold voltage, an EPAD MOSFET exhibits a turnoff characteristic in an operating region called the subthreshold region. This is when the EPAD MOSFET conduction channel rapidly
turns off as a function of decreasing applied gate voltage. The conduction channel induced by the gate voltage on the gate electrode
decreases exponentially and causes the drain current to decrease
exponentially. However, the conduction channel does not shut off
abruptly with decreasing gate voltage, but decreases at a fixed rate
of approximately 116mV per decade of drain current decrease. Thus
if the threshold voltage is +0.20V, for example, the drain current is
1uA at VGS = +0.20V. At VGS = +0.09V, the drain current would
decrease to 0.1uA. Extrapolating from this, the drain current is
0.01uA (10nA) at VGS = -0.03V, 1nA at VGS = -0.14V, and so forth.
This subthreshold characteristic extends all the way down to current levels below 1nA and is limited by other currents such as junction leakage currents.
PERFORMANCE CHARACTERISTICS
Performance characteristics of the EPAD MOSFET product family
are shown in the following graphs. In general, the threshold voltage
shift for each member of the product family causes other affected
electrical characteristics to shift with an equivalent linear shift in
VGS(th) bias voltage. This linear shift in VGS causes the subthreshold I-V curves to shift linearly as well. Accordingly, the subthreshold
operating current can be determined by calculating the gate voltage drop relative from its threshold voltage, VGS(th).
RDS(ON) AT VGS=GROUND
At a drain current to be declared “zero current” by the user, the Vgs
voltage at that zero current can now be estimated. Note that using
the above example, with VGS(th) = +0.20V, the drain current still
hovers around 20nA when the gate is at zero volt, or ground.
LOW POWER AND NANOPOWER
When supply voltages decrease, the power consumption of a given
load resistor decreases as the square of the supply voltage. So
one of the benefits in reducing supply voltage is to reduce power
consumption. While decreasing power supply voltages and power
consumption go hand-in-hand with decreasing useful AC bandwidth
and at the same time increases noise effects in the circuit, a circuit
designer can make the necessary tradeoffs and adjustments in any
given circuit design and bias the circuit accordingly.
With EPAD MOSFETs, a circuit that performs a specific function
can be designed so that power consumption can be minimized. In
some cases, these circuits operate in low power mode where the
power consumed is measure in micro-watts. In other cases, power
dissipation can be reduced to nano-watt region and still provide a
useful and controlled circuit function operation.
ALD110808/ALD110808A/ALD110908/ALD110908A
Several of the EPAD MOSFETs produce a fixed resistance when
their gate is grounded. For ALD110800, the drain current at VDS =
0.1V is at 1uA at VGS = 0.0V. Thus just by grounding the gate of the
ALD110800, a resistor with RDS(ON) = ~100KOhm is produced.
When an ALD114804 gate is grounded, the drain current IDS = 18.5
[email protected] VDS = 0.1V, producing RDS(ON) = 5.4KOhm. Similarly,
ALD114813 and ALD114835 produces 77uA and 185uA, respectively, at VGS = 0.0V, producing RDS(ON) values of 1.3KOhm and
540Ohm, respectively.
MATCHING CHARACTERISTICS
A key benefit of using matched-pair EPAD MOSFET is to maintain
temperature tracking. In general, for EPAD MOSFET matched pair
devices, one device of the matched pair has gate leakage currents,
junction temperature effects, and drain current temperature coefficient as a function of bias voltage that cancel out similar effects of
the other device, resulting in a temperature stable circuit. As mentioned earlier, this temperature stability can be further enhanced by
biasing the matched-pairs at Zero Tempco (ZTC) point, even though
that could require special circuit configuration and power consumption design consideration.
Advanced Linear Devices
4 of 11
TYPICAL PERFORMANCE CHARACTERISTICS
DRAIN-SOURCE ON RESISTANCE
vs. DRAIN-SOURCE ON CURRENT
OUTPUT CHARACTERISTICS
DRAIN SOURCE ON CURRENT
(mA)
TA = +25°C
VGS-VGS(TH)=+5V
4
VGS-VGS(TH)=+4V
3
VGS-VGS(TH)=+3V
2
VGS-VGS(TH)=+2V
1
VGS-VGS(TH)=+1V
0
0
2
4
6
8
DRAIN-SOURCE ON RESISTANCE
(Ω)
2500
5
TA = 25°C
2000
1500
VGS = VGS(TH) +4V
1000
500
VGS = VGS(TH) +6V
0
100
10
10
DRAIN-SOURCE ON VOLTAGE (V)
TRANSCONDUCTANCE vs.
AMBIENT TEMPERATURE
2.5
20
VGS(TH) = -3.5V
TA = 25°C
VDS = +10V
15
TRANSCONDUCTANCE
(mA/V)
DRAIN- SOURCE ON CURRENT
(mA )
FORWARD TRANSFER CHARACTERISTICS
VGS(TH) = -1.3V
VGS(TH) = -0.4V
10
VGS(TH) = 0.0V
VGS(TH) = +0.2V
5
2.0
1.5
1.0
0.5
VGS(TH) = +1.4V
VGS(TH) = +0.8V
0
-4
0
-2
2
4
6
0
-50
10
8
-25
VGS(TH)=-1.3V
100
10
VGS(TH)=+1.4V
1000
1
0.1
DRAIN-SOURCE ON CURRENT
(nA)
VGS(TH)=0.0V
TA = +25°C
VDS=+0.1V
VGS(TH)=-0.4V
10000
VGS(TH)=-3.5V
VGS(TH)=+0.8V
VGS(TH)=+0.2V
0.01
-4
-3
-2
-1
0
25
50
75
100
125
SUBTHRESHOLD FORWARD TRANSFER
CHARACTERISTICS
SUBTHRESHOLD FORWARD TRANSFER
CHARACTERISTICS
100000
0
AMBIENT TEMPERATURE (°C)
GATE-SOURCE VOLTAGE (V)
DRAIN-SOURCE ON CURRENT
(nA)
10000
1000
DRAIN-SOURCE ON CURRENT (µA)
1
2
VDS=0.1V
Slope ~= 110mV/decade
1000
100
10
1
0.1
0.01
VGS(th)
-0.5
GATE-SOURCE VOLTAGE (V)
ALD110808/ALD110808A/ALD110908/ALD110908A
VGS(th)
-0.4
VGS(th)
-0.3
VGS(th)
-0.2
VGS(th)
-0.1
VGS(th)
GATE-SOURCE VOLTAGE (V)
Advanced Linear Devices
5 of 11
TYPICAL PERFORMANCE CHARACTERISTICS (cont.)
DRAIN SOURCE ON CURRENT, BIAS
CURRENT vs. AMBIENT TEMPERATURE
100
5
DRAIN SOURCE ON CURRENT
( µA)
DRAIN SOURCE ON CURRENT
(mA)
DRAIN SOURCE ON CURRENT, BIAS
CURRENT vs. AMBIENT TEMPERATURE
-55°C
4
-25°C
3
0°C
2
1
70°C
0
VGS(TH)-1
125°C
Zero Temperature
Coefficient (ZTC)
125°C
50
- 25°C
0
VGS(TH)+1 VGS(TH)+2 VGS(TH)+3 VGS(TH)+4
VGS(TH)
GATE AND DRAIN SOURCE VOLTAGE
(VGS = VDS) (V)
VGS(TH) VGS(TH) VGS(TH) VGS(TH) VGS(TH)
+0.0
+0.4
+0.2
+0.6
+0.8
GATE AND DRAIN SOURCE VOLTAGE
(VGS = VDS) (V)
VGS(TH)+4
VDS=+10V
GATE SOURCE VOLTAGE (V)
DRAIN-SOURCE ON CURRENT
(µA)
10000
TA = 25°C
VGS=-4.0V to +5.4V
1000
100
10
1
VDS=+5V
VDS=+0.1V
VDS=+1V
0.1
IDS(ON)
VGS
1
10
100
1000
S
VDS = 0.5V
TA = +25°C
VGS(TH)+1
VDS = 5V
TA = +25°C
VGS(TH)
VDS = 5V
VDS = RON • IDS(ON)
TA = +125°C
1
0.1
10000
10
100
1000
10000
DRAIN SOURCE ON CURRENT (µA)
OFFSET VOLTAGE vs.
AMBIENT TEMPERATURE
DRAIN SOURCE ON CURRENT vs.
OUTPUT VOLTAGE
4
5
TA = 25°C
3
4
OFFSET VOLTAGE (mV)
DRAIN SOURCE ON CURRENT
(mA)
VDS = 0.5V
TA = +125°C
VGS(TH)+2
ON RESISTANCE (KΩ)
VDS = +10V
3
VDS = +5V
2
1
VDS = +1V
0
REPRESENTATIVE UNITS
2
1
0
-1
-2
-3
-4
VGS(TH)
-50
VGS(TH)+1 VGS(TH)+2 VGS(TH)+3 VGS(TH)+4 VGS(TH)+5
-25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
GATE SOURCE VOLTAGE
vs. ON - RESISTANCE
GATE LEAKAGE CURRENT
vs. AMBIENT TEMPERATURE
VGS(TH)+4
600
GATE SOURCE VOLTAGE (V)
GATE LEAKAGE CURRENT (pA)
VDS
D
VGS(TH)+3
VGS(TH)-1
0.01
0.1
+1.0
GATE SOURCE VOLTAGE vs. DRAIN
SOURCE ON CURRENT
DRAIN-SOURCE ON CURRENT vs. ON RESISTANCE
100000
VGS(TH)
500
400
300
200
IGSS
100
0
-50
-25
0
25
50
75
100
125
D
VGS(TH)+3
+125°C
VGS
IDS(ON)
S
0.0V ≤ VDS ≤ 5.0V
VGS(TH)+2
+25°C
VGS(TH)+1
VGS(TH)
0.1
1
10
100
1000
10000
ON - RESISTANCE (KΩ)
AMBIENT TEMPERATURE (°C)
ALD110808/ALD110808A/ALD110908/ALD110908A
VDS
Advanced Linear Devices
6 of 11
TYPICAL PERFORMANCE CHARACTERISTICS (cont.)
TRANSFER CHARACTERISTICS
DRAIN - GATE DIODE CONNECTED VOLTAGE
TEMPCO vs. DRAIN SOURCE ON CURRENT
1.6
DRAIN- GATE DIODE CONNECTED
VOLTAGE TEMPCO (mV/ °C )
5
TRANSCONDUCTANCE
( mΩ-1)
-55°C ≤ TA ≤ +125°C
2.5
0
-2.5
TA = 25°C
VDS = +10V
VGS(TH) = -3.5V
1.2
VGS(TH) = -1.3V
VGS(TH) = -0.4V
VGS(TH) = 0.0V
0.8
VGS(TH) = +0.2V
0.4
VGS(TH) = +1.4V
VGS(TH) = +0.8V
0.0
-5
1
10
100
1000
-4
-2
0
6
8
10
2.5
0.6
VGS(TH)=-3.5V
0.5
VGS(TH)=-1.3V, -0.4V, 0.0V, +0.2V, +0.8V, +1.4V
0.3
0.2
0.0
0.1
0.2
2.0
0.5
1.0
DRAIN-SOURCE ON VOLTAGE (V)
2.0
1.5
1.0
25°C
0.5
VGS(th) = 0.4V
0.0
55°C
-0.5
100000 10000
5.0
VGS(th) = 0.2V
1000
100
1
10
0.1
DRAIN -SOURCE CURRENT (nA)
THRESHOLD VOLTAGE vs.
AMBIENT TEMPERATURE
TRANCONDUCTANCE vs. DRAIN-SOURCE
ON CURRENT
1.2
4.0
TA = 25°C
VDS = +10V
VDS = +0.1V ID = 1.0µA
THRESHOLD VOTAGE
(V)
TARNCONDUCTANCE
( mΩ-1)
4
SUBTHRESHOLD CHARACTERISTICS
GATE-SOURCE VOLTAGE (V)
GATE-SOURCE VOLTAGE - THRESHOLD
VOLTAGE (V)
ZERO TEMPERETURE COEFFICIENT CHARACTERISTIC
0.9
0.6
0.3
0.0
3.0
2.0
Vt = 1.4V
1.0
Vt = 0.0V
Vt = 0.8V
Vt = 0.2V
Vt = 0.4V
0
0
2
4
8
6
10
-50
-25
0
25
50
75
NORMALIZED SUBTHRESHOLD
CHARACTERISTICS RELATIVE
GATE THRESHOLD VOLTAGE
2.0
IDS = +1µA
VDS = +0.1V
VD = 0.1V
THRESHOLD VOLTAGE
(V)
0.2
0.1
0
25°C
-0.2
-0.3
-0.4
10000
55°C
1.0
VGS(th) = 0.0V
0.0
VGS(th) = -0.4V
-1.0
VGS(th) = -1.3V
-2.0
-3.0
VGS(th) = -3.5V
-4.0
1000
100
10
1
125
THRESHOLD VOLTAGES
vs. AMBIENT TEMPERATURES
0.3
-0.1
100
AMBIENT TEMPERATURE (°C)
DRAIN -SOURCE ON CURRENT(mA)
GATE-SOURCE VOLTAGE - THRESHOLD
VOLTAGE (V)
VGS - VGS(th)
2
GATE-SOURCE VOLTAGE (V)
DRAIN SOURCE ON CURRENT (µA)
0.1
-25
DRAIN-SOURCE CURRENT (nA)
ALD110808/ALD110808A/ALD110908/ALD110908A
25
75
125
AMBIENT TEMPERATURE (OC)
Advanced Linear Devices
7 of 11
SOIC-16 PACKAGE DRAWING
16 Pin Plastic SOIC Package
E
Millimeters
S (45°)
D
Dim
Min
A
1.35
Max
1.75
Min
0.053
Max
0.069
A1
0.10
0.25
0.004
0.010
b
0.35
0.45
0.014
0.018
C
0.18
0.25
0.007
0.010
D-16
9.80
10.00
0.385
0.394
E
3.50
4.05
0.140
0.160
1.27 BSC
e
e
Inches
0.050 BSC
H
5.70
6.30
0.224
0.248
L
0.60
0.937
0.024
0.037
A
ø
0°
8°
0°
8°
A1
S
0.25
0.50
0.010
0.020
b
S (45°)
H
L
ALD110808/ALD110808A/ALD110908/ALD110908A
C
ø
Advanced Linear Devices
8 of 11
PDIP-16 PACKAGE DRAWING
16 Pin Plastic DIP Package
E
E1
Millimeters
Dim
D
S
A2
A1
A
L
e
b
Inches
A
Min
3.81
Max
5.08
Min
0.105
Max
0.200
A1
0.38
1.27
0.015
0.050
A2
1.27
2.03
0.050
0.080
b
0.89
1.65
0.035
0.065
b1
0.38
0.51
0.015
0.020
c
0.20
0.30
0.008
0.012
D-16
18.93
21.33
0.745
0.840
E
5.59
7.11
0.220
0.280
E1
7.62
8.26
0.300
0.325
e
2.29
2.79
0.090
0.110
e1
L
7.37
7.87
0.290
0.310
2.79
3.81
0.110
0.150
S-16
0.38
1.52
0.015
0.060
ø
0°
15°
0°
15°
b1
c
e1
ø
ALD110808/ALD110808A/ALD110908/ALD110908A
Advanced Linear Devices
9 of 11
SOIC-8 PACKAGE DRAWING
8 Pin Plastic SOIC Package
E
Millimeters
Dim
S (45°)
D
A
Min
1.35
Max
1.75
Min
0.053
Max
0.069
A1
0.10
0.25
0.004
0.010
b
0.35
0.45
0.014
0.018
C
0.18
0.25
0.007
0.010
D-8
4.69
5.00
0.185
0.196
E
3.50
4.05
0.140
0.160
1.27 BSC
e
A
A1
e
b
Inches
0.050 BSC
H
5.70
6.30
0.224
0.248
L
0.60
0.937
0.024
0.037
ø
0°
8°
0°
8°
S
0.25
0.50
0.010
0.020
S (45°)
H
C
L
ø
ALD110808/ALD110808A/ALD110908/ALD110908A
Advanced Linear Devices
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PDIP-8 PACKAGE DRAWING
8 Pin Plastic DIP Package
E
E1
Millimeters
D
S
A2
A1
A
L
e
b
b1
Inches
Dim
Min
Max
Min
Max
A
3.81
5.08
0.105
0.200
A1
0.38
1.27
0.015
0.050
A2
1.27
2.03
0.050
0.080
b
0.89
1.65
0.035
0.065
b1
0.38
0.51
0.015
0.020
c
0.20
0.30
0.008
0.012
D-8
9.40
11.68
0.370
0.460
E
5.59
7.11
0.220
0.280
E1
7.62
8.26
0.300
0.325
e
2.29
2.79
0.090
0.110
e1
L
7.37
7.87
0.290
0.310
2.79
3.81
0.110
0.150
S-8
1.02
2.03
0.040
0.080
0°
15°
0°
15°
ø
c
e1
ø
ALD110808/ALD110808A/ALD110908/ALD110908A
Advanced Linear Devices
11 of 11