Si8466EDB Vishay Siliconix N-Channel 8 V (D-S) MOSFET FEATURES PRODUCT SUMMARY VDS (V) 8 RDS(on) () Max. ID (A)a, e 0.043 at VGS = 4.5 V 5.4 0.046 at VGS = 2.5 V 5.2 0.060 at VGS = 1.5 V 4.6 0.090 at VGS = 1.2 V 3.0 Qg (Typ.) 6.8 nC TrenchFET® Power MOSFET Typical ESD protection 3000 V HBM Ultra-Small 1 mm x 1 mm maximum Outline Ultra-Thin 0.548 mm maximum height • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 • • • • MICRO FOOT Bump Side View APPLICATIONS Backside View • Low On-Resistance Load Switch G 1 D S 3 4 XXX 2 8 466 S for Portable Devices - Low Power Consumption, Low Voltage Drop - Increased Battery Life - Space Savings on PCB D G Device Marking: 8466 xxx = Date/Lot Traceability Code Ordering Information: Si8466EDB-T2-E1 (Lead (Pb)-free and Halogen-free) S N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) Parameter Symbol Limit Drain-Source Voltage VDS 8 Gate-Source Voltage VGS ±5 TA = 70 °C TA = 25 °C 4.4a ID 3.6b 2.9b TA = 70 °C Pulsed Drain Current (t = 300 µs) IDM Continuous Source-Drain Diode Current TC = 25 °C TA = 25 °C TA = 70 °C TA = 25 °C 1.5a IS 0.65b 1.8a 1.1a PD 0.78b Package Reflow Conditionsc W 0.5b TA = 70 °C TJ, Tstg Operating Junction and Storage Temperature Range A 20 TA = 25 °C Maximum Power Dissipation V 5.4a TA = 25 °C Continuous Drain Current (TJ = 150 °C) Unit - 55 to 150 VPR 260 IR/Convection 260 °C Notes: a. Surface mounted on 1" x 1" FR4 board with full copper, t = 10 s. b. Surface mounted on 1" x 1" FR4 board with minimum copper, t = 10 s. c. Refer to IPC/JEDEC (J-STD-020), no manual or hand soldering. d. In this document, any reference to case represents the body of the MICRO FOOT device and foot is the bump. e. Based on TA = 25 °C. Document Number: 63683 S12-2183-Rev. A, 10-Sep-12 For technical questions, contact: [email protected] www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8466EDB Vishay Siliconix THERMAL RESISTANCE RATINGS Parameter Symbol a, b Maximum Junction-to-Ambient t = 10 s Maximum Junction-to-Ambientc, d t = 10 s RthJA Typical Maximum 55 70 125 160 Unit °C/W Notes: a. Surface mounted on 1" x 1" FR4 board with full copper. b. Maximum under steady state conditions is 100 °C/W. c. Surface mounted on 1" x 1" FR4 board with minimum copper. d. Maximum under steady state conditions is 190 °C/W. SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) Parameter Symbol Test Conditions Min. VDS VGS = 0 V, ID = 250 µA 8 Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS Temperature Coefficient VDS/TJ VGS(th) Temperature Coefficient VGS(th)/TJ Gate-Source Threshold Voltage V 3.5 ID = 250 µA mV/°C -3 VGS(th) VDS = VGS, ID = 250 µA 0.7 V Gate-Source Leakage IGSS VDS = 0 V, VGS = ± 5 V ±3 µA Zero Gate Voltage Drain Current IDSS VDS = 8 V, VGS = 0 V 1 VDS = 8 V, VGS = 0 V, TJ = 70 °C 10 On-State Drain Currenta ID(on) Drain-Source On-State Resistancea RDS(on) Transconductancea gfs Forward VDS 5 V, VGS = 4.5 V 0.35 10 µA A VGS = 4.5 V, ID = 2 A 0.035 0.043 VGS = 2.5 V, ID = 1 A 0.037 0.046 VGS = 1.5 V, ID = 1 A 0.045 0.060 VGS = 1.2 V, ID = 0.5 A 0.055 0.090 VDS = 4 V, ID = 2 A 30 S Dynamicb Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss 192 Total Gate Charge Qg 8.5 Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time www.vishay.com 2 710 VDS = 4 V, VGS = 0 V, f = 1 MHz VDS = 4 V, VGS = 4.5 V, ID = 2 A td(off) 13 nC 0.9 1.6 VGS = 0.1 V, f = 1 MHz td(on) tr pF 270 VDD = 4 V, RL = 2 ID 2 A, VGEN = 4.5 V, Rg = 1 tf For technical questions, contact: [email protected] 6 10 20 15 30 40 80 10 20 ns Document Number: 63683 S12-2183-Rev. A, 10-Sep-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8466EDB Vishay Siliconix SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) Parameter Symbol Test Conditions IS TA = 25 °C Min. Typ. Max. Unit Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulse Diode Forward Current ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Reverse Recovery Fall Time ta Reverse Recovery Rise Time tb 1.5 A 20 IS = 1.5 A, VGS = 0 IF = 2 A, dI/dt = 100 A/µs, TJ = 25 °C 0.7 1.2 V 30 60 ns 7 15 nC 15 ns 15 Notes: a. Pulse test; pulse width 300 µs, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 10-1 20 10-2 16 12 IGSS - Gate Current (A) IGSS - Gate Current (mA) 10-3 TJ = 25 °C 8 4 TJ = 150 °C 10-4 10-5 TJ = 25 °C 10-6 10-7 10-8 0 0 3 6 9 12 VGS - Gate-Source Voltage (V) Output Characteristics Document Number: 63683 S12-2183-Rev. A, 10-Sep-12 15 10-9 0 3 6 9 12 15 VGS - Gate-to-Source Voltage (V) On-Resistance vs. Drain Current and Gate Voltage For technical questions, contact: [email protected] www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8466EDB Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 20 20 VGS = 5 V thru 1.5 V 16 ID - Drain Current (A) ID - Drain Current (A) 16 12 8 12 TC = 25 °C 8 TC = 125 °C 4 4 VGS = 1 V TC = - 55 °C 0 0 0.0 0.5 1.0 1.5 2.0 0.0 0.4 0.8 1.2 1.6 2.0 VGS - Gate-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V) Output Characteristics Transfer Characteristics 0.120 1200 VGS = 1.2 V 1000 C - Capacitance (pF) RDS(on) - On-Resistance (Ω) 0.100 0.080 0.060 VGS = 1.5 V VGS = 2.5 V 0.040 VGS = 4.5 V 0.020 Ciss 600 400 Coss 200 0.000 Crss 0 0 4 8 12 16 20 0 2 4 6 ID - Drain Current (A) VDS - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current and Gate Voltage Capacitance 5 8 1.4 VGS = 4.5 V, 2.5 V, 1.5 V, I D = 2 A 1.3 ID = 2 A 4 VDS = 4 V RDS(on) - On-Resistance (Normalized) VGS - Gate-to-Source Voltage (V) 800 3 VDS = 2 V 2 VDS = 6.4 V 1 1.2 1.1 VGS = 1.2 V, ID = 0.5 A 1.0 0.9 0 0.8 0 2 4 6 8 Qg - Total Gate Charge (nC) Gate Charge www.vishay.com 4 10 - 50 - 25 0 25 50 75 100 125 150 TJ - Junction Temperature (°C) On-Resistance vs. Junction Temperature For technical questions, contact: [email protected] Document Number: 63683 S12-2183-Rev. A, 10-Sep-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8466EDB Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 0.120 100 RDS(on) - On-Resistance (Ω) IS - Source Current (A) 0.100 TJ = 150 °C 10 TJ = 25 °C 1 ID = 2 A 0.080 0.060 TJ = 125 °C 0.040 TJ = 25 °C 0.020 0.000 0.1 0.0 0.2 0.4 0.6 0.8 1.0 0 1.2 1 VSD - Source-to-Drain Voltage (V) 2 3 4 5 VGS - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 0.8 25 0.7 20 Power (W) VGS(th) (V) 0.6 0.5 ID = 250 μA 15 10 0.4 0.3 5 0.2 - 50 - 25 0 25 50 75 100 125 0 0.001 150 0.01 0.1 TJ - Temperature (°C) 1 10 100 1000 Time (s) Threshold Voltage Single Pulse Power, Junction-to-Ambient 100 Limited by RDS(on)* 100 µs ID - Drain Current (A) 10 1 ms 1 10 ms 100 ms 10 s, 1s DC 0.1 TA = 25 °C BVDSS Limited 0.01 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Safe Operating Area, Junction-to-Ambient Document Number: 63683 S12-2183-Rev. A, 10-Sep-12 For technical questions, contact: [email protected] www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8466EDB Vishay Siliconix 5 1.5 4 1.2 Power Dissipation (W) ID - Drain Current (A) TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 3 2 1 0.9 0.6 0.3 0 0.0 0 25 50 75 100 125 TA - Ambient Temperature (°C) Current Derating* 150 25 50 75 100 125 150 TA - Ambient Temperature (°C) Power Derating Note: When Mounted on 1" x 1" FR4 with Full Copper. * The power dissipation PD is based on TJ(max.) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. www.vishay.com 6 For technical questions, contact: [email protected] Document Number: 63683 S12-2183-Rev. A, 10-Sep-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8466EDB Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 Notes: 0.1 0.05 PDM 0.02 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 100 °C/W 3. TJM - TA = PDMZthJA(t) 4. Surface Mounted Single Pulse 0.01 10 -4 10 -3 10 -2 10 -1 1 100 10 1000 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient (1" x 1" FR4 Board with Full Copper) 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 Notes: 0.1 0.1 PDM 0.05 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 190 °C/W 0.02 3. TJM - TA = PDMZthJA(t) Single Pulse 4. Surface Mounted 0.01 10 -4 10 -3 10 -2 10 -1 1 Square Wave Pulse Duration (s) 10 100 1000 Normalized Thermal Transient Impedance, Junction-to-Ambient (1" x 1" FR4 Board with Minimum Copper) Document Number: 63683 S12-2183-Rev. A, 10-Sep-12 For technical questions, contact: [email protected] www.vishay.com 7 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8466EDB Vishay Siliconix PACKAGE OUTLINE MICRO FOOT 1 mm x 1 mm: 4-BUMP (2 x 2, 0.5 mm PITCH) 3 1 4 A1 A2 e 2 A 4 x Ø 0.24 to 0.26 Note 4 Solder Mask ~ Ø 0.25 Bump Note 2 Recommended Land S S D G e 8466 s XXX D 4xØb s Mark on Backside of Die e D Notes (Unless otherwise specified): 1. All dimensions are in millimeters. 2. Four (4) solder bumps are lead (Pb)-free 95.5Sn/3.8Ag/0.7Cu with diameter Ø 0.30 mm to 0.32 mm. 3. Backside surface is coated with a Ti/Ni/Ag layer. 4. Non-solder mask defined copper landing pad. 5. •is location of pin 1. Dim. Millimetersa Inches Min. Nom. Max. Min. Nom. Max. A 0.462 0.505 0.548 0.0181 0.0198 0.0215 A1 0.220 0.250 0.280 0.0086 0.0098 0.0110 A2 0.242 0.255 0.268 0.0095 0.0100 0.0105 b 0.300 0.310 0.320 0.0118 0.0122 0.0126 e 0.500 0.0197 s 0.230 0.250 0.270 0.0090 0.0098 0.0106 D 0.920 0.960 1.000 0.0362 0.0378 0.0394 Notes: a. Use millimeters as the primary measurement. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?63683. Document Number: 63683 S12-2183-Rev. A, 10-Sep-12 For technical questions, contact: [email protected] www.vishay.com 8 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000