Integrated P-Channel PowerTrench® MOSFET and BJT -30 V, -2.9 A, 90 mΩ Features General Description Max rDS(on) = 90 mΩ at VGS = -4.5 V, ID = -2.9 A This device is designed specifically as a single package solution for loadswitching in cellular handset and other ultra-portable applications. It features a 50 V NPN BJT and a 30 V P-ch Trench MOSFET in the space saving MicroFET 2x2 package that offers exceptional thermal performance for it's physical size and is well suited to linear mode applications. Max rDS(on) = 130 mΩ at VGS = -2.5 V, ID = -2.6 A Max rDS(on) = 170 mΩ at VGS = -1.8 V, ID = -1.7 A Max rDS(on) = 240 mΩ at VGS = -1.5 V, ID = -1 A Low profile - 0.8 mm maximum - in the new package MicroFET 2x2 HBM ESD protection level > 2 kV typical (Note 3) Application RoHS Compliant Loadswitching E PIN 1 B C C Top D E C B G D S D G S Bottom MicroFET 2x2 Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID -Continuous TA = 25°C (Note 1a) -Pulsed Ratings -30 Units V ±8 V -2.9 -12 A VCBO Collector-Base Voltage (Note 4) 50 V VCEO Collector-Emitter Voltage (Note 5) 50 V VEBO Emitter-Base Voltage 10 V IC Collector Current 100 mA PC Collector Power Dissipation 200 mW TJ Junction Temperature 150 °C Power Dissipation PD TJ, TSTG TA = 25°C (Note 1a) 1.5 TA = 25°C (Note 1b) 0.7 Operating and Storage Junction Temperature Range -55 to +150 W °C Thermal Characteristics RθJA Thermal Resistance, Junction to Ambient(MOSFET) (Note 1a) 86 RθJA Thermal Resistance, Junction to Ambient(MOSFET) (Note 1b) 173 °C/W Package Marking and Ordering Information Device Marking 143 Device FDMA1430JP ©2013 Fairchild Semiconductor Corporation FDMA1430JP Rev.C1 Package MicroFET 2x2 1 Reel Size 7’’ Tape Width 8 mm Quantity 5000 units www.fairchildsemi.com FDMA1430JP Integrated P-Channel PowerTrench® MOSFET and BJT March 2013 FDMA1430JP Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V -1 μA IGSS Gate to Source Leakage Current VGS = ±8 V, VDS = 0 V ±1 μA -1 V -30 V -23 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C rDS(on) gFS Static Drain to Source On Resistance Forward Transconductance -0.4 -0.6 2.4 mV/°C VGS = -4.5 V, ID = -2.9 A 67 90 VGS = -2.5 V, ID = -2.6 A 81 130 VGS = -1.8 V, ID = -1.7 A 98 170 VGS = -1.5 V, ID = -1 A 114 240 VGS = -4.5 V, ID = -2.9 A, TJ = 125 °C 102 133 VDS = -5 V, ID = -2.9 A 11 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = -15 V, VGS = 0 V, f = 1 MHz 438 580 pF 47 70 pF 41 60 pF Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge VDD = -15 V, ID = -1 A, VGS = -4.5 V, RGEN = 6 Ω VDD = -15 V, ID = -2.9 A, VGS = -4.5 V 4.8 10 ns 4.4 10 ns 67 107 ns 21 33 ns 7.2 10 nC 0.7 nC 1.6 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = -1.1 A (Note 2) IF = -2.9 A, di/dt = 100 A/μs -0.7 -1.2 V 16 29 ns 5 10 nC 0.1 μA BJT Characteristics ICBO Collector Cut-off Current VCB = 40 V, IE = 0 A hFE DC Current Gain VCE = 5 V, IC = 5 mA 68 VCE(sat) Collector-Emitter Saturation Voltage IC = 10 mA, IB = 0.5 mA fT Current Gain Bandwidth Product VCE = 10 V, IC = 5 mA Cob Output Capacitance VCB = 10 V, IE = 0 A, f = 1 MHz VI(off) Input Off Voltage VCE = 5 V, IC = 100 μA VI(on) Input On Voltage VCE = 0.2 V, IC = 5 mA R1 Input Resistor 4.7 R1/R2 Resistor Ratio 0.1 ©2013 Fairchild Semiconductor Corporation FDMA1430JP Rev.C1 2 0.3 V 250 MHz 3.7 pF 0.5 V 1.3 V kΩ www.fairchildsemi.com FDMA1430JP Integrated P-Channel PowerTrench® MOSFET and BJT Electrical Characteristics TJ = 25 °C unless otherwise noted Notes: 1. RθJA is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. a. 86 °C/W when mounted on a 1 in2 pad of 2 oz copper b. 173 °C/W when mounted on a minimum pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 4. Guaranteed by Icbo 5. Guaranteed by Iceo . ©2013 Fairchild Semiconductor Corporation FDMA1430JP Rev.C1 3 www.fairchildsemi.com FDMA1430JP Integrated P-Channel PowerTrench® MOSFET and BJT Electrical Characteristics 12 -ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 3 VGS = -4.5 V VGS = -2.5 V VGS = -3.5 V 8 VGS = -1.8 V VGS = -1.5 V 4 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.0 0.5 1.0 1.5 2.0 2.5 VGS = -1.5 V 2 VGS = -1.8 V VGS = -2.5 V 1 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0 4 -VDS, DRAIN TO SOURCE VOLTAGE (V) rDS(on), DRAIN TO ID = -2.9 A VGS = -4.5 V 1.2 1.0 0.8 -50 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 400 1.4 ID = -2.9 A 200 TJ = 125 oC 100 TJ = 25 oC 1.5 2.0 8 TJ = 150 oC 4 TJ = 25 oC 3.5 4.0 TJ = -55 oC 1 TJ = 150 oC 0.1 TJ = 25 oC 0.01 2.0 TJ = -55 oC 0.0001 0.0 2.5 0.4 0.8 1.2 -VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2013 Fairchild Semiconductor Corporation FDMA1430JP Rev.C1 4.5 VGS = 0 V 0.001 1.5 3.0 10 VDS = -5 V 1.0 2.5 Figure 4. On-Resistance vs Gate to Source Voltage -IS, REVERSE DRAIN CURRENT (A) -ID, DRAIN CURRENT (A) 300 -VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.5 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 1.0 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) Figure 3. Normalized On- Resistance vs Junction Temperature 12 12 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.8 0.6 -75 8 -ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics 1.6 VGS = -4.5 V VGS = -3.5 V 4 www.fairchildsemi.com FDMA1430JP Integrated P-Channel PowerTrench® MOSFET and BJT Typical Characteristics TJ = 25 °C unless otherwise noted ID = -2.9 A Ciss VDD = -10 V 3.0 CAPACITANCE (pF) -VGS, GATE TO SOURCE VOLTAGE (V) 1000 4.5 VDD = -15 V VDD = -20 V 1.5 Coss 100 Crss f = 1 MHz VGS = 0 V 0.0 0 2 4 6 10 0.1 8 Figure 7. Gate Charge Characteristics -1 30 50 -2 VDS = 0 V 10 10 -ID, DRAIN CURRENT (A) -Ig, GATE LEAKAGE CURRENT (A) 10 Figure 8. Capacitance vs Drain to Source Voltage 10 -3 10 -4 10 TJ = 125 oC -5 10 -6 10 -7 10 -8 10 100 μs 1 0.1 0.01 TJ = 25 oC -9 10 0 3 6 1 ms THIS AREA IS LIMITED BY rDS(on) 9 12 0.001 0.1 15 10 ms 100 ms 1s 10 s DC SINGLE PULSE TJ = MAX RATED RθJA = 173 oC/W CURVE BENT TO MEASURED DATA TA = 25 oC -10 10 1 -VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 1 10 100 -VDS, DRAIN to SOURCE VOLTAGE (V) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 9. Gate Leakage vs Gate to Source Voltage Figure 10. Forward Bias Safe Operating Area P(PK), PEAK TRANSIENT POWER (W) 1000 SINGLE PULSE o RθJA = 173 C/W 100 o TA = 25 C 10 1 0.1 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 11. Single Pulse Maximum Power Dissipation ©2013 Fairchild Semiconductor Corporation FDMA1430JP Rev.C1 5 www.fairchildsemi.com FDMA1430JP Integrated P-Channel PowerTrench® MOSFET and BJT Typical Characteristics TJ = 25 °C unless otherwise noted 2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 173 C/W 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Junction-to-Ambient Transient Thermal Response Curve ©2013 Fairchild Semiconductor Corporation FDMA1430JP Rev.C1 6 www.fairchildsemi.com FDMA1430JP Integrated P-Channel PowerTrench® MOSFET and BJT Typical Characteristics TJ = 25 °C unless otherwise noted FDMA1430JP Integrated P-Channel PowerTrench® MOSFET and BJT Dimensional Outline and Pad Layout ©2013 Fairchild Semiconductor Corporation FDMA1430JP Rev.C1 7 www.fairchildsemi.com tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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