ICMIC ICM7102B

ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
FEATURES
OVERVIEW
Includes dialer, speech, and ringer
circuit replacing two or more ICs.
Single board design meets multiple
PTT requirements.
Pause and mute functions.
Adjustable flash duration.
32-digit last number redial.
Selectable tone/pulse dialing.
13 to 70Hz ring frequency detection.
Operating range from 15 to 100mA.
Compatible with ICM7101D/ICM7102.
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ICM7102B is a single chip telephone CMOS
integrated circuits that meets multiple PTT
requirements, allowing phone manufacturers
to have single board design for various
countries. This reduces inventory and simplify
manufacturing processes.
ICM7102B integrates dialer, speech, and
ringer circuits. The integration reduces
component counts, hence increases product
reliability.
TYPICAL APPLICATION CIRCUIT
Typical application circuit is as specified in Appendix A.
PACKAGE
28-Lead SOIC
AGND 1
28 STB
VDD 2
27 RXI
VDDI 3
26 RXO
GND 4
25 CI
TXO 5
24 M1
VL 6
23 M2
LLC 7
FOPT0 8
ICM7102B
7102
SOIC
SOIC
22 R1
21 R2
MFL0 9
20 R3
HS_DPB 10
19 R4
OSC1 11
18 C1B
OSC2 12
17 C2B
RGD 13
16 C3B
MO 14
15 C4B
Figure 1: 28-lead SOIC Package
Rev. 2.7
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1
ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
PIN DESCRIPTION
Pin No
Symbol
Description
Analog Ground
1
AGND
1.4V regulated voltage output. Used by internal amplifiers. External capacitor
about 100uF should be connected to this pin.
Regulated Supply Voltage
2
VDD
3
VDDI
4
GND
5
TXO
6
VL
7
LLC
8
FOPT0
9
MFL0
10
HS_DPB
Rev. 2.7
When HS_DPB pin is HIGH, the VDD pin is regulated to 3.1V, and the input
power is extracted from VDDI pin. When HS_DPB is LOW, VDD should be
externally powered and it must not fall below 1.0V to retain the redial
memory. Most internal circuits are powered by VDD pin.
Supply Input Voltage
Power for the chip is extracted from this VDDI pin. See also VDD pin
description. At steady state, VDDI is regulated to 3.5V by use of external PNP
transistor whose base terminal is connected to the TXO pin. See typical
application circuit. The external PNP transistor also functions to drain the
excess line current.
Ground
Transmit Output
Transmit output is to be connected to external PNP transistor (typically
medium power PNP) for the modulation of line voltage and for shorting the
line during make period of pulse dialing. See the typical application circuit. The
external PNP transistor also functions to drain the excess line current.
Line Voltage
If line-loss compensation (LLC) scheme is not used, then this pin can be
shorted to GND. If LLC scheme is used, then this pin is used to sense the line
current. The sense resistor (R11 in typical application circuit) must be 30 ohm
for the LLC scheme to work properly. The receive and transmit gains are
adjusted according to the sensed current and the chosen LLC scheme. See
also description on “Line Loss Compensation” section. Since VL pin will
typically experience high transient voltage, it is advisable to properly add
external protection circuit to suppress the high transient voltage which can
damage the pin.
Line Loss Compensation
Line loss compensation scheme options:
LLC=GND
- No LLC scheme.
LLC=AGND
- “Low” LLC scheme.
LLC=VDD
- “High” LLC scheme.
The receive and transmit gains are adjusted according to the sensed current
and the chosen LLC scheme. See description on “Line Loss Compensation”
section.
Flash Option
Flash duration options:
GND (logic 0) – 300ms flash duration.
VDD (logic 1) – 600ms flash duration.
DTMF Option
Transmitted DTMF level options:
GND (logic 0): typical -8/-10dB.
VDD (logic 1): typical -6/-8dB.
Hook Switch Input and Dial Pulse Output
When off-hook, this pin needs to be pulled HIGH (by the hook switch) to
activate the speech and dialer circuits. When on-hook this pin needs to be
pulled LOW to activate ringer circuit and deactivate speech and dialer circuits.
During pulse dialing (while off-hook, and pulse dialing mode is chosen), this
pin is pulled LOW during line-break periods.
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ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
11
OSC1
12
OSC2
13
RGD
14
MO
15
16
17
18
C4B
C3B
C2B
C1B
19
20
21
22
R4
R3
R2
R1
23
24
M1
M2
25
CI
26
RXO
27
RXI
28
STB
Rev. 2.7
Oscillator Input
3.58MHz ceramic resonator input.
Oscillator Output
3.58MHz clock output. Can be used to drive other few high impedance inputs.
Ring Detection Input
Input for ring frequency detection. Active when HS_DPB=LOW. When pulses
with frequency between 13Hz and 70Hz are detected on this pin, ring melody
is generated on the MO pin.
Melody Output
Open drain output. When ring signal is detected on the RGD pin, ring melody
pulses are generated on this pin.
Keypad Columns
Keypad column inputs. When a column input pin is shorted to a row output
pin, appropriate DTMF signal is generated. This DTMF signal complies with
CCITT recommendation. For example, when R1 and C1B are shorted (when
button #1 is pressed), DTMF signal of frequency 697Hz + 1209Hz is
generated and transmitted thru TXO pin.
Keypad Rows
Keypad rows. Logic pulses are generated on these pins to scan user input. See
also Keypad Column pins. During power-on-reset, these pins are also used to
determine various dialing modes. See description on Dialing Function section.
Microphone Inputs
Input for electret microphone. M1 connects to inverting input of internal
differential amplifier via a resistor. M2 connects to the non-inverting input via
a resistor.
Complex Impedance and AC Impedance Input
Placing resistor between CI and AGND pins adjusts the AC impedance. If CI
pin is left floating the typical AC impedance is 1000 ohm (when current sense
resistor (R11) is 30 ohm).
Received Audio Amplifier Output
Received audio amplifier output. RXO can drive a typical 120-ohm dynamic
earpiece speaker.
Received Audio Amplifier Input
Non-inverting input for internal received audio differential amplifier. RXI
connects to the amplifier via an internal resistor. RXI also internally connects
to the feedback path of the circuitry that determines the AC impedance.
Side Tone Balance Input
Inverting input for internal received audio differential amplifier. STB connects
to the amplifier via an internal resistor.
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ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
FUNCTIONAL DESCRIPTION
1600Hz on the MO pin. Note that MO is an
open-drain pin.
SYSTEM STARTUP
ICM7102B generates internal power-on-reset
when VDD reaches around 1.5V. Power-onreset appropriately initiates the system to a
known initial state. Note that the initial ramp
up of VDD could come from external ringer
interface circuit, or it could come from internal
regulator when the system goes off-hook.
SPEECH NETWORK
The speech network of ICM7102B consists of a
transmitter and a receiver path, side tone
cancellation and line loss compensation.
As long as HS_DPB pin stays LOW, ICM7102B
operates in shutdown mode with only the
ringer circuitry being activated to monitor the
incoming ringing signal.
The speech network is activated as soon as
the phone goes off-hook (i.e. when HS_DPB
pin goes HIGH). At the same time the ringer
circuitry is deactivated.
OSCILLATOR
All the timing of ICM7102B is based on a clock
frequency of 3.58 MHz. A Crystal or ceramic
resonator of this frequency should be
connected to OSC1 and OSC2 pins. Care has
to be taken in selecting this components since
in practise minor deviations from the nominal
frequency may occur due to the characteristics
of the oscillator.
It is recommended to connect a small value
capacitors (≤ 47pF) in
parallel with the
oscillator to ensure proper start-up and
operation at the nominal frequency.
TONE RINGER
The tone ringer of ICM7102B consists of ring
detection circuit and melody generator circuit.
These circuits are active when the system is in
on-hook state (HS_DPB pin is LOW).
Ring Detection Circuit
Ring detection circuit will assures the signal
present on RGD pin input is valid. The signal is
considered valid if it has frequencies between
13Hz and 70Hz. This signal is monitored
continuously and the ring melody is turned
on/off accordingly.
Melody Generator
Once the valid ring signal is detected on the
schmitt-triggered ring detection pin (RGD) and
the signal is present for about 75 ms
continously, the melody generator will be
enabled, generating ring tones of 1250Hz and
Rev. 2.7
Transmit
The typical total transmit gain from
microphone input (M1/M2 pins) to the VDDI
pin is 35dB when the AC impedance is 600Ω.
Receive
The typical total receive gain from the line
voltage to RXO pin is 5dB when the AC
impedance is 600Ω.
Side Tone Cancellation
As shown in the typical application circuit in
Appendix A, side tone cancellation can be
achieved best by balancing the Whitestone
bridge comprised of R11, R12, R13+R14//C6,
and the line impedance.
Line Loss Compensation
LLC pin input level is scanned as the phone
goes off-hook (i.e. as HS_DPB pin goes HIGH).
At the same time, the loop current level is
sensed and determined. If LLC=0, no
compensation scheme is in effect.
If LLC=AGND, “low” compensation scheme is
in effect. Transmit and receive gains are
reduced by as much as 6dB when the loop
current exceeds 50mA.
If LLC=VDD, “high” compensation scheme is in
effect. Transmit and receive gains are reduced
by as much as 6dB when the loop current
exceeds 75mA.
AC Impedance (ZAC)
Placing a resistor, RZAC between CI and AGND
pins adjusts the AC impedance. If RZAC is not
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ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
present, the typical AC impedance is 1000Ω.
Refer to Figure 2 for the equivalent test circuit.
RZAC=82KΩ typically sets the AC impedance to
600Ω, while RZAC=47KΩ typically sets the AC
impedance to 470Ω. Please note that the
overall system AC impedance also depends on
the whole system circuit.
DTMF Tones
The DTMF tone generator creates 12 tones in
compliance with CCITT Recommendation.
There are two group of frequencies of DTMF
tones. The low group depends on the key’s
row, while the high group depends on the
key’s column as illustrated in the following
table:
DTMF Signal Level
DTMF signal level can be selected by setting
MFL0 pin as follow:
MFL0
Typical DTMF level
(RZAC=47KΩ; ZAC = 470Ω)
Low, typical -8/-10dB
High, typical -6/-8dB
0
1
DIALING FUNCTIONS
Keypad arrangement is as shown in the typical
application circuit in Appendix A. Dialing
modes are selectable using the pull-up/pulldown resistors connected to the row inputs.
As soon as the phone goes off-hook (i.e when
HS_DPB pin goes HIGH), voltage levels on
keypad row inputs (R1 thru R4) are first
scanned to determine the operating mode as
follow:
Pin
R1
Function
Dialing Mode
R2
Pulse Period
R3
Make/Break
Ratio
DTMF option
R4
Level – Mode
0 – MF mode
1 – Pulse mode
0 – 10 PPS
1 – 20 PPS
0 – 40/60
1 – 33/67
0 – 82ms/82ms
1 – 82ms/160ms
Valid Keys
ICM7102B has a total of 16 valid keys. It scans
the keys by asserting known state on pins R1,
R2, R3, and R4 in sequence, and check which
column (pins C1B, C2B, C3B, C4B) is shorted
to which row. The following specify the
combinations:
R1
R2
R3
R4
Rev. 2.7
C1B
C2B
C3B
C4B
1
4
7
*
2
5
8
0
3
6
9
#
Pause
Mute
Flash
LNR
C1B
C2B
C3B
R1
1
2
3
R2
4
5
6
R3
7
8
9
R4
*
0
#
High Freq 1209 Hz 1336 Hz 1477 Hz
Low
Freq
697 Hz
770 Hz
852 Hz
941 Hz
Last Number Redial (LNR)
The last Number Redial (LNR) is a facility of
ICM7102B to allow resignalling of the last
manually dialled number without keying in all
digits again. The LNR is repeatable after each
off-hook.
A manually entered number is stored in
internal 32-digit RAM. VDD shall not fall below
1.0V during on-hook state to properly retain
the data in the memory.
Flash
ICM7102B asserts line break (pulls down
HS_DPB pin) when Flash key is depressed. The
flash duration depends on the input levels of
FOPT0 pin as follow:
FOPT0
0
1
Flash Duration
300 ms
600 ms
Mute
ICM7102B inhibits mic (M1/M2) input when
Mute key is depressed. Depressing the key
again toggles the mute function.
Pause
ICM7102B pauses (no dialing and microphone
is muted) for 2.2 seconds when Pause key is
depressed.
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ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
ABSOLUTE MAXIMUM RATING
Symbol
VDDI
VIN_
TSTG
TSOL
Parameter
Value
Supply Line Voltage
Digital Input Voltage
Storage Temperature
Soldering Temperature
Unit
-0.3 to 7.0
-0.3 to 7.0
-55 to +150
300
V
V
o
C
o
C
Note 1: Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect reliability.
OPERATING RANGE
Range
Commercial
Ambient Temperature
o
-25 C to 70 oC
DC CHARACTERISTICS
(ILINE = 15mA unless otherwise specified)
Symbol
VDDI
VDD
AGND
Parameter
Regulated Line Voltage
Regulated Supply
Regulated Reference
IDD
Operating Current
IOL
VIL
VIH
Output Current Sink
Input Voltage Low
Input Voltage High
Test Conditions
Min
Typ
Max
Unit
3.2
3.5
3.1
1.4
2.5
4.0
0.3
1.5
3.8
1.5
6.0
V
V
V
mA
mA
mA
mA
V
V
ILINE: 13mA to 100mA
1.3
Speech mode
Dialing mode
Ring mode
HS_DPB, MO; VOL = 0.4V
HS_DPB, RGD; TA=25oC
HS_DPB, RGD; TA=25oC
0.0
2.2
1.5
5.5
5.5
AC CHARACTERISTICS
(ILINE = 15mA, Frequency = 800Hz, unless otherwise specified)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
31.5
33
32.5
2
dB
%
KΩ
dB
VPEAK
6.0
dB
2
%
KΩ
VPEAK
Transmit (TX)
GTX
THD
ZIN M1,M2
GMUTE
VIN M1,M2
Transmit Gain
Distortion
Input Impedance
Mute Attenuation
Input Voltage Range
LLC=GND, ZAC=600Ω
VL < 0.5 VRMS
20
Mute activated
80
± 2.8
Receive (RX)
GRX
Receive Gain
THD
ZIN RXI
VIN RXI
Distortion
Input Impedance
Input Voltage Range
Rev. 2.7
LLC=GND, ZAC=600Ω,
Volume=Reset
VRXI < 0.5 VRMS
4.0
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5.0
8
± 2.8
6
ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
Side Tone (ST)
GST
ZIN STB
VIN STB
Side Tone Cancellation
Input Impedance
Input Voltage Range
LLC=GND, ZAC=600Ω
23
± 2.8
dB
KΩ
VPEAK
± 2.8
± 2.8
VPEAK
VPEAK
80
Output Driver (BJT)
VIN PNP
VTXPNP
Input Voltage Range
Dynamic Range
Return Loss
RL
Return Loss
ZLINE=600Ω, ZAC=600Ω
18
dB
Keyboard
tD
Key debounce time
64
ms
15
240
ms
ms
HS/DPB INPUT
tHS-L
tHS-H
Low to High Debounce
High to Low Debounce
Going off-hook
Going on-hook
Tone Ringer
VMO
tMD
F1
F2
tDT
fMIN
fMAX
Melody Output
Melody Delay
Frequency 1
Frequency 2
Detection Time
Min. Detection Freq.
Max. Detection Freq.
PDM
10
70
ms
Hz
Hz
ms
Hz
Hz
+0.75
84
84
ms
ms
1250
1600
Ring Freq = 20Hz
50
13
80
DTMF
F
tTD
tITP
Frequency Deviation
Tone Duration
Inter Tone Pause
note 2
note 1
note 1
-0.31
80
80
82
82
%
Note 1: The values are valid during automatic dialing and are minimum values during manual dialing, i.e. the tones will
continue as long as the key is depressed.
Note 2: This does not include the frequency deviation of the ceramic resonator.
Rev. 2.7
ICmic reserves the right to change the specifications without prior notice
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ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
Figure 2: Equivalent Test Circuit
Rev. 2.7
ICmic reserves the right to change the specifications without prior notice
8
ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
APPENDIX B: PACKAGE INFORMATION
28-Lead SOP (Unit: Inches)
Rev. 2.7
ICmic reserves the right to change the specifications without prior notice
10
ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
Rev. 2.7
ICmic reserves the right to change the specifications without prior notice
11
ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
DISCLAIMER
The information contained herein is current as of the date of publication; however, delivery of this
document shall not under any circumstances create any implication that the information contained
herein is correct as of any time subsequent to such date. ICmic reserves the right to make changes
without notification, even if such changes would render information contained herein inaccurate or
incomplete. ICmic makes no representation or warranty that any circuit designed by reference to the
information contained herein, will function without errors and as intended by the designer.
Rev. 2.7
ICmic reserves the right to change the specifications without prior notice
12