ONSEMI NVF6P02T3G

NTF6P02, NVF6P02
Power MOSFET
-10 Amps, -20 Volts
P−Channel SOT−223
http://onsemi.com
Features
•
•
•
•
•
•
Low RDS(on)
Logic Level Gate Drive
Diode Exhibits High Speed, Soft Recovery
Avalanche Energy Specified
NVF Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable*
These Devices are Pb−Free and are RoHS Compliant
−10 AMPERES
−20 VOLTS
RDS(on) = 44 mW (Typ.)
S
G
Typical Applications
• Power Management in Portables and Battery−Powered Products,
D
i.e.: Cellular and Cordless Telephones and PCMCIA Cards
P−Channel MOSFET
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
−20
Vdc
Gate−to−Source Voltage
VGS
±8.0
Vdc
ID
ID
−10
−8.4
−35
Adc
Drain Current (Note 1)
− Continuous @ TA = 25°C
− Continuous @ TA = 70°C
− Single Pulse (tp = 10 ms)
Total Power Dissipation @ TA = 25°C
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = −20 Vdc, VGS = −5.0 Vdc,
IL(pk) = −10 A, L = 3.0 mH, RG = 25W)
Thermal Resistance
− Junction to Lead (Note 1)
− Junction to Ambient (Note 2)
− Junction to Ambient (Note 3)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
IDM
Apk
PD
8.3
W
TJ, Tstg
−55 to
+150
°C
EAS
150
mJ
RqJL
RqJA
RqJA
15
71.4
160
TL
260
August, 2013 − Rev. 6
1
Drain
4
4
1
2
3
AYW
6P02G
G
SOT−223
CASE 318E
STYLE 3
1
Gate
2
3
Drain Source
°C/W
A
= Assembly Location
Y
= Year
W
= Work Week
6P02
= Specific Device Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
°C
ORDERING INFORMATION
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Steady State.
2. When surface mounted to an FR4 board using 1” pad size,
(Cu. Area 1.127 sq in), Steady State.
3. When surface mounted to an FR4 board using minimum recommended pad
size, (Cu. Area 0.412 sq in), Steady State.
© Semiconductor Components Industries, LLC, 2013
MARKING DIAGRAM
& PIN ASSIGNMENT
Package
Shipping†
NTF6P02T3G
SOT−223
(Pb−Free)
4000 / Tape &
Reel
NVF6P02T3G*
SOT−223
(Pb−Free)
4000 / Tape &
Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NTF6P02T3/D
NTF6P02, NVF6P02
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
−20
−
−25
−11
−
−
−
−
−
−
−1.0
−10
−
−
± 100
−0.4
−
−0.7
2.6
−1.0
−
−
−
−
44
57
57
50
70
−
gfs
−
12
−
Mhos
pF
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 4)
(VGS = 0 Vdc, ID = −250 mAdc)
Temperature Coefficient (Positive)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = −20 Vdc, VGS = 0 Vdc)
(VDS = −20 Vdc, VGS = 0 Vdc, TJ = 125°C)
IDSS
Gate−Body Leakage Current
(VGS = ± 8.0 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
mAdc
nAdc
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage (Note 4)
(VDS = VGS, ID = −250 mAdc)
Threshold Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−Resistance (Note 4)
(VGS = −4.5 Vdc, ID = −6.0 Adc)
(VGS = −2.5 Vdc, ID = −4.0 Adc)
(VGS = −2.5 Vdc, ID = −3.0 Adc)
RDS(on)
Forward Transconductance (Note 4)
(VDS = −10 Vdc, ID = −6.0 Adc)
Vdc
mV/°C
mW
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = −16 Vdc, VGS = 0 V,
f = 1.0 MHz)
Transfer Capacitance
Input Capacitance
Output Capacitance
Ciss
−
900
1200
Coss
−
350
500
Crss
−
90
150
Ciss
−
940
−
Coss
−
410
−
Crss
−
110
−
(VDD = −5.0 Vdc, ID = −1.0 Adc,
VGS = −4.5 Vdc,
RG = 6.0 W)
td(on)
−
7.0
12
tr
−
25
45
td(off)
−
75
125
tf
−
50
85
(VDD = −16 Vdc, ID = −6.0 Adc,
VGS = −4.5 Vdc,
RG = 2.5 W)
td(on)
−
8.0
−
(VDS = −10 Vdc, VGS = 0 V,
f = 1.0 MHz)
Transfer Capacitance
pF
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Gate Charge
tr
−
30
−
td(off)
−
60
−
tf
−
60
−
ns
ns
QT
−
15
20
Qgs
−
1.7
−
Qgd
−
6.0
−
(IS = −3.0 Adc, VGS = 0 Vdc) (Note 4)
(IS = −2.1 Adc, VGS = 0 Vdc)
(IS = −3.0 Adc, VGS = 0 Vdc, TJ = 125°C)
VSD
−
−
−
−0.82
−0.74
−0.68
−1.2
−
−
Vdc
(IS = −3.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/ms) (Note 4)
trr
−
42
−
ns
ta
−
17
−
tb
−
25
−
QRR
−
0.036
−
(VDS = −16 Vdc, ID = −6.0 Adc,
VGS = −4.5 Vdc) (Note 4)
nC
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
Reverse Recovery Time
Reverse Recovery Stored Charge
4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%.
5. Switching characteristics are independent of operating junction temperatures.
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2
mC
NTF6P02, NVF6P02
−2.0 V
−2.4 V
−3.2 V
−4.4 V
12
TJ = 25°C
−1.8 V
6
−1.6 V
3
−1.4 V
VGS = −1.2 V
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−2.2 V
−ID, DRAIN CURRENT (AMPS)
12
−10 V
−7.0 V
−5.0 V
9
0
1
2
3
4
5
6
7
8
9
10
8
6
4
TJ = −55°C
2
0.5
1
1.5
2
2.5
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
ID = −6.0 A
TJ = 25°C
0.1
0.05
0
1
2
3
4
6
5
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
3
0.08
TJ = 25°C
0.07
VGS = −2.5 V
0.06
0.05
VGS = −4.5 V
0.04
0.03
0.02
2
4
6
8
10
12
14
−ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1.6
10,000
ID = −6.0 A
VGS = −4.5 V
VGS = 0 V
TJ = 150°C
−IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
0
TJ = 100°C
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.15
1.4
TJ = 25°C
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.2
0
VDS ≥ −10 V
10
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (AMPS)
TYPICAL ELECTRICAL CHARACTERISTICS
1.2
1000
1.0
0.8
0.6
−50
−25
0
25
50
75
100
125
150
TJ = 100°C
100
2
4
6
8
10
12
14
16
18
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Drain−to−Source Leakage Current
versus Voltage
Figure 5. On−Resistance Variation with
Temperature
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3
20
NTF6P02, NVF6P02
VDS = 0 V VGS = 0 V
TJ = 25°C
C, CAPACITANCE (pF)
Ciss
2400
1800
Crss
1200
Ciss
600
Coss
Crss
0
10
10
15
20
−VDS
16
−VGS
3
12
Qgs
Qgd
2
8
ID = −6.0 A
TJ = 25°C
1
4
0
0
0
4
8
12
16
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
7
−IS, SOURCE CURRENT (AMPS)
VDD = −16 V
ID = −3.0 A
VGS = −4.5 V
td(off)
100
tf
tr
10
1
4
20
QT
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE
(VOLTS)
1000
t, TIME (ns)
5 −VGS 0 −VDS 5
5
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
3000
−VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL ELECTRICAL CHARACTERISTICS
td(on)
VGS = 0 V
TJ = 25°C
6
5
4
3
2
1
0
1
10
RG, GATE RESISTANCE (W)
100
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
0.3
0.6
0.9
1.2
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
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4
NTF6P02, NVF6P02
TYPICAL ELECTRICAL CHARACTERISTICS
RTHJA(t), EFFECTIVE TRANSIENT
THERMAL RESPONSE
1
D = 0.5
0.2
NORMALIZED TO RqJA AT STEADY STATE (1″ PAD)
0.1
0.1
0.05
0.0175 W
CHIP
JUNCTION 0.0154 F
0.02
0.0710 W
0.2706 W
0.5779 W 0.7086 W
0.0854 F
0.3074 F
1.7891 F
107.55 F
0.01
AMBIENT
SINGLE PULSE
0.01
1.0E-03
1.0E-02
1.0E-01
1.0E+00
t, TIME (s)
1.0E+01
Figure 11. FET Thermal Response
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5
1.0E+02
1.0E+03
NTF6P02, NVF6P02
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCH.
D
b1
DIM
A
A1
b
b1
c
D
E
e
e1
L
L1
HE
4
HE
E
1
2
3
b
e1
e
0.08 (0003)
A1
q
C
q
A
L
STYLE 3:
PIN 1.
2.
3.
4.
L1
MIN
1.50
0.02
0.60
2.90
0.24
6.30
3.30
2.20
0.85
0.20
1.50
6.70
0°
MILLIMETERS
NOM
MAX
1.63
1.75
0.06
0.10
0.75
0.89
3.06
3.20
0.29
0.35
6.50
6.70
3.50
3.70
2.30
2.40
0.94
1.05
−−−
−−−
1.75
2.00
7.00
7.30
10°
−
MIN
0.060
0.001
0.024
0.115
0.009
0.249
0.130
0.087
0.033
0.008
0.060
0.264
0°
INCHES
NOM
0.064
0.002
0.030
0.121
0.012
0.256
0.138
0.091
0.037
−−−
0.069
0.276
−
MAX
0.068
0.004
0.035
0.126
0.014
0.263
0.145
0.094
0.041
−−−
0.078
0.287
10°
GATE
DRAIN
SOURCE
DRAIN
SOLDERING FOOTPRINT*
3.8
0.15
2.0
0.079
2.3
0.091
2.3
0.091
6.3
0.248
2.0
0.079
1.5
0.059
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NTF6P02T3/D