TI SN74AC11004

74AC11004
HEX INVERTER
SCAS033B − JANUARY 1988 − REVISED APRIL 1996
D Flow-Through Architecture Optimizes
D
D
D
D
DB, DW, OR N PACKAGE
(TOP VIEW)
PCB Layout
Center-Pin VCC and GND Configuration
Minimizes High-Speed Switching Noise
EPIC ™ (Enhanced-Performance Implanted
CMOS) 1-μm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, and Standard
Plastic 300-mil DIPs (N)
1Y
2Y
3Y
GND
GND
GND
GND
4Y
5Y
6Y
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
1A
2A
3A
NC
VCC
VCC
NC
4A
5A
6A
NC − No internal connection
description
This device contains six independent inverters. It performs the Boolean function Y = A.
The 74AC11004 is characterized for operation from −40°C to 85°C.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
logic symbol†
1A
2A
3A
4A
5A
6A
†
20
1
1
19
2
18
3
13
8
12
9
11
10
1Y
2Y
3Y
4Y
5Y
6Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright © 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
74AC11004
HEX INVERTER
SCAS033B − JANUARY 1988 − REVISED APRIL 1996
logic diagram (positive logic)
1A
2A
3A
4A
5A
6A
20
1
19
2
18
3
13
8
12
9
11
10
1Y
2Y
3Y
4Y
5Y
6Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DW package . . . . . . . . . . . . . . . . . . 1.6 W
DB package . . . . . . . . . . . . . . . . . . . 0.6 W
N package . . . . . . . . . . . . . . . . . . . . 1.3 W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
74AC11004
HEX INVERTER
SCAS033B − JANUARY 1988 − REVISED APRIL 1996
recommended operating conditions
VCC
Supply voltage
VCC = 3 V
VIH
High-level
High
level input voltage
MIN
NOM
MAX
3
5
5.5
Low-level
Low
level input voltage
VI
Input voltage
VO
Output voltage
VCC = 4.5 V
3.15
VCC = 5.5 V
3.85
V
0.9
VCC = 4.5 V
1.35
VCC = 5.5 V
1.65
High-level
High
level output current
IOL
Low-level
Low
level output current
Δt/Δv
Input transition rise or fall rate
TA
Operating free-air temperature
V
0
VCC
V
0
VCC
V
VCC = 3 V
IOH
V
2.1
VCC = 3 V
VIL
UNIT
−4
VCC = 4.5 V
−24
VCC = 5.5 V
−24
VCC = 3 V
12
VCC = 4.5 V
24
VCC = 5.5 V
24
mA
mA
0
10
ns/V
−40
85
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = −50
50 μA
VOH
VOL
IOH = −4 mA
TA = 25°C
MIN
TYP
MAX
MIN
3V
2.9
2.9
4.5 V
4.4
4.4
5.5 V
5.4
5.4
3V
2.58
2.48
3.8
MAX
4.5 V
3.94
5.5 V
4.94
IOH = −75 mA†
5.5 V
3V
0.1
0.1
IOL = 50 μA
4.5 V
0.1
0.1
5.5 V
0.1
0.1
IOL = 12 mA
IOL = 75
mA†
II
VI = VCC or GND
ICC
VI = VCC or GND,
Ci
VI = VCC or GND
4.8
3.85
3V
0.36
0.44
4.5 V
0.36
0.44
5.5 V
0.36
0.44
5.5 V
5.5 V
5V
V
1.65
5.5 V
IO = 0
UNIT
V
IOH = −24
24 mA
A
IOL = 24 mA
†
VCC
3.5
±0.1
±1
μA
4
40
μA
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
74AC11004
HEX INVERTER
SCAS033B − JANUARY 1988 − REVISED APRIL 1996
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
A
Y
TA = 25°C
MAX
MIN
MAX
MIN
TYP
1.5
6.1
9
1.5
10
1.5
5.2
7.4
1.5
8.2
UNIT
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
A
Y
TA = 25°C
MIN
MAX
6.3
1.5
7.1
5.5
1.5
6
MIN
TYP
MAX
1.5
4.2
1.5
3.8
UNIT
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance per inverter
CL = 50 pF,
TYP
UNIT
29
pF
f = 1 MHz
PARAMETER MEASUREMENT INFORMATION
VCC
Input
(see Note B)
From Output
Under Test
CL = 50 pF
(see Note A)
50%
50%
0V
tPHL
tPLH
500 Ω
50% VCC
Output
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
LOAD CIRCUIT
NOTES: A. CL includes probe and jig capacitance.
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
74AC11004DBLE
OBSOLETE
SSOP
DB
20
TBD
Call TI
Call TI
-40 to 85
74AC11004DW
ACTIVE
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AC11004
74AC11004DWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AC11004
74AC11004DWG4
ACTIVE
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AC11004
74AC11004DWR
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AC11004
74AC11004DWRE4
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AC11004
74AC11004DWRG4
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AC11004
74AC11004N
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
-40 to 85
74AC11004N
74AC11004NE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
-40 to 85
74AC11004N
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
74AC11004DWR
Package Package Pins
Type Drawing
SOIC
DW
20
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
24.4
Pack Materials-Page 1
10.8
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
13.3
2.7
12.0
24.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
74AC11004DWR
SOIC
DW
20
2000
367.0
367.0
45.0
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
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