LM1044 Analog Video Switch General Description Features Primarily intended for, but not restricted to, the switching of video signals, the LM1044 is a monolithic DC controlled analog switch with buffered outputs, allowing the selection of three 5 MHz bandwidth, 6 dB gain channels, or two RGB a Sync, 30 MHz bandwidth, 0 dB gain channels. Channel selection is achieved via latched, TTL compatible, logic inputs which may be controlled by microprocessor derived signals. The device is supplied in a 24 pin dual in line plastic package. Y Y Y Y Y Y Wide RGB bandwidth, typically 30 MHz High signal to noise ratio, typically 60 dB Excellent channel isolation typically b60 dB @ 5 MHz High RGB output currents; typically 4 mA peak RGB channels may be DC restored or clamped Logically compatible with the LM1038 stereo audio switch IC Block Diagram TL/H/9252 – 1 Order Number LM1044N See NS Package Number N24A C1995 National Semiconductor Corporation TL/H/9252 RRD-B30M115/Printed in U. S. A. LM1044 Analog Video Switch June 1992 Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Output Current, I23, I17, I16, I15 10 mA ESD Susceptibility (Note 5) 2000V Operating Temperature Supply Voltage (VS) 17V Package Dissipation at TA e 25§ C (Note 8) 2.0W b 0.2V to Vs a 0.2V Voltage at Control and Signal Inputs 0§ C to a 70§ C Storage Temperature Lead Temperature (Soldering, 10 sec.) Junction Temperature b 65§ C to a 150§ C 265§ C 150§ C Electrical Characteristics VS e 12V, RL e 600X, CL e 20 pF, TA e 25§ C unless otherwise stated Parameter Test Limit (Note 6) Conditions Supply Voltage, Vs Supply Current RGB1 Channel Selected with No Input Signals Applied Control Inputs Logic High Level Control Inputs Logic Low Level ( Enable Input Control Inputs A, B, C and Enable Input Current, Pin 22 0V to Vs Control Input Current 0V Logic Level 5V Logic Level Design Limit (Note 7) Units Min Max Min Typ Max 8 16 8 12 16 V 42 60 mA 0.8 V V 60 2.0 2.0 0.8 2 10 mA 20 250 50 500 mA mA 5 7 1.2 1.5 1.7 kX 5.3 5.3 5.8 6.3 dB 4.0 4.0 5.0 MHz 60 dB Enable Pulse Width 5 Channel Select Time COMPOSITE VIDEO CHANNELS InputsÐPins 1, 2, 3 OutputÐPin 23 Maximum Input Voltage Swing For Output THD e 1% @ 1 kHz ms 1.2 Input Impedance Dynamic Output Impedance Vp-p 10 X Voltage Gain Input Signal e 0.5 Vp-p Bandwidth Input Signal e 0.5 Vp-p, b3 dB, Signal to Noise Ratio Bandwidth e 5 MHz Channel Isolation (Note 1) Input Signal e 0.5 Vp-p @ 3 MHz 60 dB Crosstalk (Note 2) Input Signal e 0.5 Vp-p @ 3 MHz b 60 dB Load Resistance (Note 3) AC Coupled DC Coupled to GND Power Supply Rejection Ratio VS Modulated 1 Vp-p @ 100 kHz ms 600 2 @ 1 kHz CV Bias (Pin 14) Input Impedance 2 40 X kX 50 dB 1.0 kX Electrical Characteristics VS e 12V, RL e 600X, CL e 20 pF, TA e 25§ C unless otherwise stated (Continued) Parameter Test Limit (Note 6) Conditions Min RGB CHANNELS Max Design Limit (Note 7) Min Typ Units Max InputsÐPins 4, 5, 6, 8, 9, 10 OutputsÐPins 15, 16, 17 CLAMP INPUT-Pin 18 Minimum Input Voltage Maximum Input Voltage For Clamp on For Clamp off Input Current Pin 18 e 0V 9 Clamp Pulse Delay (Note 4) 5 V V 10 mA 0.2 Maximum Input Voltage Swing for Output THD e 1% Input Bias Current Clamp off, Channel Selected @ 1 kHz 3.0 20 Dynamic Output Impedance mA 20 b 0.5 b 0.5 6.0 24 0 X Voltage Gain Input Signal e 1 Vp-p Bandwidth Input Signal e 1 Vp-p, b3 dB Signal to Noise Ratio RIN e 50X, Bandwidth e 10 MHz Load Resistance (Note 3) AC Coupled 3 Vp-p DC Coupled to GND Channel Isolation (Note 1) Input Signal e 1 Vp-p @ 5 MHz 60 dB Crosstalk (Note 2) Input Signal e 1 Vp-p @ 5 MHz b 50 dB Power Supply Rejection Ratio VS Modulated 1 Vp-p 50 dB 60 X @ 100 kHz ms Vp-p a 0.5 30 MHz 60 dB 600 2 @ 1 kHz Pin 13 Output Impedance SYNC CHANNELS InputsÐPins 7, 11 OutputsÐPin 23 Maximum Input Voltage Swing for Output THD e 1% @ 1 kHz X kX 3.0 Input Impedance Vp-p 1.8 2.3 b 1.0 b 1.0 b 0.4 6.0 18 Dynamic Output Impedance 2.8 kX a 0.2 dB 40 Voltage Gain Input Signal e 1 Vp-p Bandwidth Input Signal e 1 Vp-p, b3 dB, Signal to Noise Ratio RIN e 50X, Bandwidth e 10 MHz @ 100 kHz dB X 24 MHz 60 dB Note 1: CV channels defined with a CV mute condition set up (ABC e 001) and all CV inputs driven. Isolation is the output measured with respect to the input level for RL of 600X. Channel isolation for RGB channels is measured in the same way with signals applied to the R, G or B inputs while a RGB mute condition is selected. Note 2: CV crosstalk measured with selected channel input AC grounded and with signal applied to the other CV inputs. Resulting output voltage is measured with RL of 600X. RGB crosstalk is measured similarly with signals applied to unselected channel inputs and measuring the selected channel output. Note that high frequency crosstalk measurements are very dependent on board layout. An effective ground plane and input to input shielding are required. Note 3: DC output current sourced from device to load should not exceed 10 mA, care should be taken to avoid shorting outputs to GND. Note 4: Delay between clamp pulse input at Pin 18 and resulting clamping action as seen at RGB inputs. Note 5: Human body model, 100 pF discharged through a 1.5 kX resistor. Note 6: Guaranteed and 100% production tested. Note 7: Design limits are guaranteed to National’s AOQL, but are not 100% production tested. Note 8: When operating at elevated temperatures, the maximum power dissipation must be derated based on a maximum junction temperature of 150§ C and iJA e 60§ C/W. 3 Typical Performance Characteristics Supply Current vs Supply Voltage CV Output Signal Range vs Supply Voltage RGB Output Signal Range vs Supply Voltage CV Frequency Response RGB Frequency Response Sync Frequency Response CV and RGB Bias vs Temperature CV and RGB Bias vs Supply Voltage TL/H/9252 – 2 4 Pin Description Application Notes Note: The pin designations CV, R, G, B, and Sync are assigned for the convenience of description and are not intended to be a limitation. For example RGB could be YUV, or they could all be independent signal sources. DEVICE DESCRIPTION Pin 1 Composite video input 1 (CV1), biased internally VS a 1V. via 1.8 kX to 2 Pin 2 Composite video input 2 (CV2), biased as for pin 1 (CV1) above. Pin 3 Composite video input 3 (CV3), biased as for pin 1 (CV1) above. Pin 4 RGB input R1. This pin is internally biased via VS a 1V and should be AC a clamp circuit to 2 coupled to a low impedance source. The input coupling capacitor also acts as a clamp capacitor, see application notes. Pin 5 RGB input G1, biased as for pin 4 (R1) above. Pin 6 RGB input B1, biased as for pin 4 (R1) above. Pin 7 Sync input S1, biased internally via 2.5k to VS a 1V. 2 Pin 8 RGB input R2, biased as for pin 4 (R1) above. Pin 9 RGB input G2, biased as for pin 4 (R1) above. Pin 10 RGB input B2, biased as for pin 4 (R1) above. Pin 11 Sync input S2, biased as for pin 7 (S1) above. Pin 12 Negative supply (GND) Pin 13 Connect a capacitor to GND to decouple the internal bias of the RGB amplifiers. Pin 14 Internal bias for the CV and Sync Amplifiers, decouple with a capacitor to GND. Pin 15 B Output. Pin 16 G Output. Pin 17 R Output. Pin 18 This is the clamp pulse input pin. A positive going pulse activates the RGB input bias clamps. See application notes. Pin 19 Channel select input, control C. Pin 20 Channel select input, control B. Pin 21 Channel select input, control A. Pin 22 Enable input for control latches. Channel selection is locked while this input is low and is updated when high. The minimum enable pulse width is 5 ms. Pin 23 CV output or Sync output when an RGB channel is selected. Pin 24 Supply pin (VS). This pin should be well decoupled at high frequencies, a 100 nF capacitor connected close to the supply pins is normally adequate. The LM1044 video switch circuit has a configuration as illustrated in Figure 1 and consists of a 3 input to 1 output, 5 MHz switch with 6 dB gain, three 2 input to 1 output, 30 MHz, 0 dB gain switches, coupled together with a 2 input to 1 output switch sharing the 3 way switch output. All switch stages are current switched differential amplifers with feedback, providing low impedance buffered outputs. Latched logic inputs with control decoding are provided for switch control and a DC clamp facility is available on the 30 MHz channels. The principle application of this device is the selection between various composite video (CV) or Red, Green, and Blue (RGB) sources now found in video systems using various signal sources, e.g., VCR’s, satellite receivers, home computers and video games. Other possible application examples, for example security camera switching, are shown towards the end of these notes. The 5 MHz channels are ideally suited for the switching of composite video sources and have a gain of 6 dB to allow amplification from terminated inputs back up to internal signal levels. The 30 MHz channels are suitable for direct RGB inputs to display high quality graphics and will also handle high quality linear signals. The fourth switch channel shares the CV output pin and is ideal for routing synchronization signals from the RGB/YUV sources into the path to the sync separator and timebase circuits. CHANNEL SELECTION The switch selections are made via the enable and 3 logic control inputs, according to the truth table shown on the following page. This gives a choice of 3 CV video signal sources or 2 RGB plus Sync signals on the video display. TL/H/9252 – 3 FIGURE 1 5 Application Notes (Continued) Truth Table provided the output remains within the output window. Note this bias will also affect the voltage at pin 13. Control Logic EN 22 C 19 B 20 A 21 Channel Selected 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 X 0 0 1 1 1 1 0 0 X 0 1 0 1 1 0 1 0 X CV1, RGB Outputs Muted CV2, RGB Outputs Muted CV3, RGB Outputs Muted RGB1 with Sync1 RGB2 with Sync2 Mute Mute Mute Previous selection retained INPUT BIAS FOR RGB CHANNELS The 6 RGB inputs may be biased in one of three ways; 1) DC restored above an internal 4.5V level 2) Clamped to an internal 7V bias level 3) Driven directly with DC coupled signals With an AC coupled input signal and the clamp pulse held low the negative going peaks will DC restore to a level greater than 3 diode drops below the reference bias level at pin 13, typically 4.5V for VS e 12V. The source resistance of the diode restoring path is 1 kX for currents below 200 mA. Simplified Schematic of RGB Stage The shaded section of the truth table indicates selection compatible with the LM1038 four channel stereo audio switch logic to give a possible selection of CV1 a Audio1, CV2 a Audio2, CV3 a Audio3, RGB1 a Audio4 and RGB2 a Mute or Audio4; see Figure 3. The mute conditions in the table correspond to disabled CV/Sync (output pulled low) and high impedance RGB outputs which may be connected in parallel with other device outputs for further expansion of the switch system. If all the RGB inputs are being used to switch composite video signals then the RGB outputs can be connected into the CV inputs to allow multiplexing down to 1 output from a large number of input signals. LOGIC AND ENABLE INPUTS If undriven the enable input will assume a high impedance logic 1 condition and should be defined externally. The Logic selection inputs have internal pulldowns, typically 20 kX, which will define logic low levels if unconnected, giving CV1 in default of any other control input. TL/H/9252 – 6 The simplified schematic of the CV stage is virtually identical to the RGB stage except that the CV stage does not incorporate the clamp circuitry. Clamping to the internal 7V bias is arranged by applying a positive going clamp pulse to pin 18 during a time when the input signals are at a black reference level. This is usually during the back porch or during the blanking period of signals without syncs. The clamp pulse width should not be less than 3 ms. During the time pin 18 is high all six inputs R1, R2, G1, G2, B1 and B2 are connected to the RGB bias voltage developed at pin 13, charging the input coupling capacitors to this level. These coupling capacitors are chosen to optimize value versus tilt introduced during the active line period. A value of 330 mF gives less than 1% tilt for input currents less than 20 mA. The effective impedance of the clamp path when conducting is 300X. The voltage at pin 13 is a low impedance, 60X, buffered version of the CV bias voltage at pin 14 and decoupling is required to remove high frequencies and maintain channel separation. The voltage at pin 13 may be changed by driving pin 14 as described for CV bias. INPUT BIAS FOR CV CHANNELS The CV and Sync inputs are biased via internal 1.5 kX and 2.3 kX resistors, respectively, to the internally generated 7V bias (VS e 12V) level at pin 14. Input coupling capacitors need to be chosen to give an adequate low frequency response when driving the 1.5 kX input impedance, for example, for less than 2% tilt on a frame rate waveform 330 mF will be required. Depending on the effectiveness of any following clamp circuitry the input coupling capacitors may be reduced in value. These inputs may also be driven with DC coupled signals, provided the standing DC level is sufficiently near to 7V to maintain the output within the output signal range (4.5 to 8.5V for VS e 12V). The bias at pin 14 has a DC output resistance typically of 1 kX and requires a decoupling capacitor to properly define the gain and crosstalk. To ensure an adequate low frequency response this capacitor should be 100 mF or more. This pin may also be biased from an external voltage source 6 Application Notes (Continued) TL/H/9252 – 7 FIGURE 2. LM1044 Basic Application Circuit Relation of Clamp Pulse to Video are such as to remain within the output window. Such signals could be directly coupled from the RGB outputs of a preceeding LM1044, avoiding the need for coupling capacitors when expanding the switching capability. External resistive biasing to the bias voltage available at pin 13 may also be used for a mean level bias with AC coupled signals not having reference levels. OPERATION AT SUPPLIES OTHER THAN 12V The LM1044 may be operated at supply voltages between 8V and 16V. Note that the CV and RGB bias voltages, together with the clamp pulse threshold, will track with supply variations whilst the logic input thresholds will remain essentially constant. At lower supply voltages the signal handling may be optimized with an external bias voltage to pin 14. TL/H/9252 – 4 If the clamp pulse input is held low the RGB inputs may be driven directly with DC coupled signals provided the levels 7 Application Notes (Continued) TL/H/9252 – 5 FIGURE 3. LM1044 Application Circuit Showing System Interfacing and LM1038 ly b30 mV for CV and RGB channels, and b140 mV for Sync channels. OPERATION WITH SPLIT SUPPLIES The LM1044 may be operated with split supplies with due regard to the maximum supply voltage (16V) and output signal range. An example of operation in this way is illustrated below. With g 5V and pin 14 held at 0V the RGB outputs can swing a 2V, b1.5V and the CV and Sync output can swing a 1.3V, b1.3V. Similarly with a 10V, b5V supplies, pin 14 to 0V, RGB output swings of a 5.5V, b1.5V and CV/ Sync swings of a 4.5V and b1.5V can be obtained. This supply configuration has the advantage that pin 14 can be grounded and all signals may be DC coupled avoiding the need for coupling capacitors. Offsets introduced are typical- OTHER APPLICATIONS The LM1044 can be used in other than the standard CV with RGB circuit and an example is given below of a dual 6 input to 1 output multiplexer for video or indeed any kind of signals up to 2 Vp-p. In this particular example the RGB outputs are cross-coupled into the CV inputs of the other channel to complete the multiplexing down to 2 outputs. The clamp circuits are disabled to allow direct drive on the inputs. Such circuits are ideal for security cameras and other multiple video source monitoring systems. 8 Application Notes (Continued) TL/H/9252 – 8 FIGURE 4. Application Circuit Example Using Two LM1044 Devices as a Dual 6 Channel Multiplexer and Illustrating Use of Split Supplies 9 Physical Dimensions inches (millimeters) Molded Dual-In-Line Package (N) Order Number LM1044N NS Package Number N24A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Europe Fax: (a49) 0-180-530 85 86 Email: cnjwge @ tevm2.nsc.com Deutsch Tel: (a49) 0-180-530 85 85 English Tel: (a49) 0-180-532 78 32 Fran3ais Tel: (a49) 0-180-532 93 58 Italiano Tel: (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductor Japan Ltd. Tel: 81-043-299-2309 Fax: 81-043-299-2408 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.