TI DS26LS32MQML

DS26LS32MQML
DS26LS32MQML Quad Differential Line Receivers
Literature Number: SNOSAM6A
DS26LS32MQML
Quad Differential Line Receivers
General Description
The DS26LS32 and DS26LS32A are quad differential line
receivers designed to meet the RS-422, RS-423 and Federal
Standards 1020 and 1030 for balanced and unbalanced
digital data transmission.
The DS26LS32 and DS26LS32A have an input sensitivity of
200 mV over the input voltage range of ± 7V and the
DS26LS33 have an input sensitivity of 500 mV over the input
voltage range of ± 15V.
The DS26LS32A differ in function from the popular
DS26LS32 and DS26LS33 in that input pull-up and pulldown resistors are included which prevent output oscillation
on unused channels.
Each version provides an enable and disable function common to all four receivers and features TRI-STATE ® outputs
with 8 mA sink capability. Constructed using low power
Schottky processing, these devices are available over the
full military and commerical operating temperature ranges.
Features
n High differential or common-mode input voltage ranges
of ± 7V on the DS26LS32.
n ± 0.2V sensitivity over the input voltage range on the
DS26LS32.
n DS26LS32 meet all requirements of RS-422 and
RS-423
n 6k minimum input impedance
n 100 mV input hysteresis on the DS26LS32
n Operation from a single 5V supply
n TRI-STATE outputs, with choice of complementary
output enables for receiving directly onto a data bus
Ordering Information
NS Part Number
SMD Part Number
NS Package Number
DS26LS32ME/883
5962-7802006Q2A
E20A
Package Description
DS26LS32MJ/883
5962-7802006QEA
J16A
16LD CERDIP
DS26LS32MW/883
5962-7802006QFA
W16A
16LD CERPACK
20LD LEADLESS CHIP CARRIER
Logic Diagram
20141301
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 2006 National Semiconductor Corporation
DS201413
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DS26LS32MQML Quad Differential Line Receivers
October 2006
DS26LS32MQML
Connection Diagrams
Dual-In-Line Package
20-Lead Ceramic Leadless Chip Carrier
20141302
Top View
See NS Package Number J16A or W16A
20141312
Top View
See NS Package Number E20A,
Truth Table
ENABLE
ENABLE
Input
Output
0
1
X
Hi-Z
See
VID ≥ VTH (Max)
1
Note Below
VID ≤ VTH (Min)
0
Hi-Z = TRI-STATE ®
Note: Input conditions may be any combination not defined for ENABLE and ENABLE .
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2
DS26LS32MQML
Absolute Maximum Ratings (Note 1)
Supply Voltage
7V
± 25V
± 25V
Common-Mode Range
Differential Input Voltage
Enable Voltage
7V
Output Sink Current
50 mA
Maximum Power Dissipation at 25˚C (Note 2)
J Package
1666.5 mW
E Package
1875 mW
W Package
967.74 mW
Junction Temperature (TJ)
+150˚C
Thermal Resistance, Junction-to-Ambient
θJA
J Package
100˚C/W
E Package
130˚C/W
W Package
140˚C/W
Thermal Resistance, Junction-to-Ambient
θJC
See MIL-STD-1835
Storage Temperature Range
−65˚C to +165˚C
Lead Temperature (Soldering, 4 seconds)
260˚C
ESD Tolerance (Note 3)
500V
Recommended Operating
Conditions
Supply Voltage, VCC
4.5 V to 5.5 V
Temperature, TA
−55˚C to +125˚C
Quality Conformance Inspection
MIL-STD-883, Method 5005 - Group A
Subgroup
Description
1
Static tests at
Temp ( ˚C)
+25
2
Static tests at
+125
3
Static tests at
-55
4
Dynamic tests at
+25
5
Dynamic tests at
+125
6
Dynamic tests at
-55
7
Functional tests at
+25
8A
Functional tests at
+125
8B
Functional tests at
-55
9
Switching tests at
+25
10
Switching tests at
+125
11
Switching tests at
-55
3
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DS26LS32MQML
DS26LS32M 883 Electrical Characteristics
DC Parameters
The following conditions apply, unless otherwise specified. VCC = 5V
Symbol
IIN
Parameter
Input Current
Conditions
Notes
Min
Max
Unit
Subgroups
VCC = 5.5V, VIN = 15V (Pin
under test), other inputs -15V,
≤ VIN ≤ +15V
(Note 5)
2.3
mA
1, 2, 3
VCC = 5.5V, VIN = -15V (Pin
under test), other inputs -15V,
≤ VIN ≤ +15V
(Note 5)
-2.8
mA
1, 2, 3
IIL
Logical "0" ENABLE Current
VCC = 5.5V, VIN = 0.4V
(Note 5)
-360
uA
1, 2, 3
IIH
Logical "1" ENABLE Current
VCC = 5.5V, VIN = 2.7V
(Note 5)
20
uA
1, 2, 3
II
Logical "1" ENABLE Current
VCC =5.5V, VIN = 5.5V
(Note 5)
100
uA
1, 2, 3
VIC
Input Clamp Voltage (ENABLE) VCC = 4.5V, IIN = -18mA
(Note 5)
-1.5
V
1, 2, 3
VOH
Logical "1" Output Voltage
V
1, 2, 3
VOL
Logical "0" Output Voltage
VCC = 4.5V, IOH = -440uA,
∆VIN = 1V, V ENABLE = 0.8V
(Note 5)
VCC = 4.5V, IOL = 4mA,
∆VIN = -1V, V ENABLE = 0.8V
(Note 5)
.4
V
1, 2, 3
VCC = 4.5V, IOL = 8mA,
∆VIN = -1V, V ENABLE = 0.8V
(Note 5)
.45
V
1, 2, 3
mA
1, 2, 3
2.5
IOS (MIN)
Output Short Circuit Current
VCC = 5.5V, VO = 0V,
∆VIN = 1V
(Note 5)
IOS (MAX)
Output Short Circuit Current
VCC = 5.5V, VO = 0V,
∆VIN = 1V
(Note 5)
-85
mA
1, 2, 3
ICC
Supply Current
VCC = 5.5V, All VIN = GND,
Outputs Disabled
(Note 5)
70
mA
1, 2, 3
IO
Off-State Output Current
VCC = 5.5V, VO = 0.4V
(Note 5)
-20
uA
1, 2, 3
VCC = 5.5V, VO = 2.4V
(Note 5)
20
uA
1, 2, 3
-0.2
0.2
V
1, 2, 3
6
kohm
1, 2, 3
V
1, 2, 3
V
1, 2, 3
VTH
Differential Input Voltage
-7V ≤ VCM ≤ 7V
(Notes 4,
5)
RIN
Input Resistance
-15V ≤ VCM ≤ 15V
(Note 5)
VIL
Logical "0" Input Voltage
(ENABLE)
VCC = 4.5V
(Notes 4,
5)
VIH
Logical "1" Input Voltage
(ENABLE)
VCC = 4.5V
(Notes 4,
5)
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4
-15
0.8
2
(Continued)
AC Parameters - Propagation Delay Time
The following conditions apply, unless otherwise specified. VCC = 5V
Max
Unit
Subgroups
(Note 6)
30
nS
9,11,
CL = 15PF
(Note 6)
120
nS
10
CL = 15PF
(Note 6)
30
nS
9,11,
Symbol
Parameters
Conditions
Notes
tPLH
Propagation Delay Time
CL = 15PF
tPLH
Propagation Delay Time
tPHL
Propagation Delay Time
tPHL
Propagation Delay Time
tPLZ
tPHZ
tPZL
tPZH
Enable to Output
Enable to Output
Enable to Output
Enable to Output
Min
CL = 15PF
(Note 6)
120
nS
10
ENABLE CL = 5PF
(Note 6)
34
nS
9
ENABLE CL = 5PF
(Note 6)
64
nS
10
ENABLE CL = 5PF
(Note 6)
27
nS
11
ENABLE CL = 5PF
(Note 6)
32
nS
9,11,
10
ENABLE CL = 5PF
(Note 6)
35
nS
ENABLE CL = 15PF
(Note 6)
34
nS
9
ENABLE CL = 15PF
(Note 6)
65
nS
10
ENABLE CL = 15PF
(Note 6)
27
nS
11
ENABLE CL = 15PF
(Note 6)
35
nS
9, 11
ENABLE CL = 15PF
(Note 6)
65
nS
10
Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.
Note 2: Derate J package 11.11 mW/˚C above 25˚C; derate E package 12.5 mW/˚C above 25˚C; derate W Package 6.4516 mW/˚C for above 25˚C.
Note 3: Human body model, 1.5kΩ in series with 100pF.
Note 4: Parameter tested go-no-go only.
Note 5: For Subgroups 1 and 2, power dissipation must be externally controlled at elevated temperatures.
Note 6: Tested at 25˚C, guaranteed but not tested at +125˚C & −55˚C
5
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DS26LS32MQML
DS26LS32M 883 Electrical Characteristics
DS26LS32MQML
AC Test Circuit and Switching Time Waveforms
Load Test Circuit for TRI-STATE ® Outputs
20141303
Propagation Delay (Notes 7, 9)
20141304
Enable and Disable Times (Notes 8, 9)
20141305
Note 7: Diagram shown for ENABLE low.
Note 8: S1 and S2 of load circuit are closed except where shown.
Note 9: Pulse generator for all pulses: Rate = 1.0 MHz; ZO = 50Ω; tr ≤ 6 ns; tf ≤ 6.0 ns.
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6
DS26LS32MQML
Typical Applications
Two-Wire Balanced Interface — RS-422
20141306
Single Wire with Driver Ground Reference — RS-423
20141307
7
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DS26LS32MQML
Revision History
Date
Released
Revision
10/20/05
A
10/05/06
B
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Section
Originator
Changes
New Release, Corporate format.
Changes made in conversion:
Ordering Info. Table, Absolute
Ratings, Maximum Operating
Conditions, Typo’s in QMLV & RH,
883 AC Electrical Characteristics
Parameters Column.
R. Malone
1 MDS data sheet converted into
Corporate data sheet format. Added:
SMD reference for 883 NSID’s, Juction
temp., Thermal Resistance θJA and θJC.
Changed: Maximum Operating Conditions
to Recommended Operating Conditions,
Enable and Disable Time to Enable to
Output. Deleted max limit: 27nS for tPZH
and added subgroup 11 to max limit 35nS.
MDS data sheet MNDS26LS32–X, Rev.
2B0 will be Archived.
Ordering Information
R. Malone
Corrected suffix’s in the SMD number.
Revision A will be Archived.
8
DS26LS32MQML
Physical Dimensions
inches (millimeters) unless otherwise noted
20 Lead Ceramic Leadless Chip Carrier (E)
NS Package Number E20A
Ceramic Dual-In-Line Package (J)
NS Package Number J16A
9
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DS26LS32MQML Quad Differential Line Receivers
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16 Lead Ceramic Flatpak (W)
NS Package Number W16A
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