IRF IRF9204PBF

PD - 96277B
IRF9204PbF
Features
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l P-Channel
l Fully Avalanche Rated
l Lead-Free
HEXFET® Power MOSFET
D
VDSS = -40V
RDS(on) = 16mΩ
G
ID = -74A
Description
S
This HEXFET® Power MOSFET utilizes advanced processing
techniques to achieve extremely low on-resistance per silicon
area. This benefit, combined with the fast switching speed
and ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
D
G
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation levels
to approximately 50 watts. The low thermal resistance and low
package cost of the TO-220 contribute to its wide acceptance
throughout the industry.
D
S
TO-220AB
IRF9204PbF
G
D
S
G a te
D r a in
S o u rce
Absolute Maximum Ratings
Parameter
Max.
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
-74
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
-53
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
-56
c
Units
A
-300
IDM
Pulsed Drain Current
PD @TC = 25°C
Power Dissipation
143
W
Linear Derating Factor
0.95
W/°C
± 20
V
270
mJ
VGS
Gate-to-Source Voltage
EAS (Thermally limited)
Single Pulse Avalanche Energy
EAS (Tested )
Single Pulse Avalanche Energy Tested Value
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
TJ
Operating Junction and
TSTG
Storage Temperature Range
c
d
g
502
See Fig.17a, 17b, 14, 15
A
mJ
-55 to + 175
°C
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
h
i
300 (1.6mm from case )
y
y
10 lbf in (1.1N m)
Thermal Resistance
Parameter
j
RθJC
Junction-to-Case
RθCS
Case-to-Sink, Flat, Greased Surface
RθJA
Junction-to-Ambient
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i
i
Typ.
Max.
–––
1.05
0.50
–––
–––
62
Units
°C/W
1
05/23/11
IRF9204PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
IDSS
IGSS
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min. Typ. Max. Units
-40
–––
–––
–––
-1.0
29
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
0.03
–––
–––
-2.0
–––
–––
–––
–––
–––
149
27
31
27
383
139
153
–––
–––
16
23
-3.0
–––
-25
-250
-100
100
224
–––
–––
–––
–––
–––
–––
–––
4.5
–––
–––
7.5
–––
–––
–––
–––
–––
–––
–––
7676
654
539
1747
598
797
–––
–––
–––
–––
–––
–––
Conditions
V VGS = 0V, ID = -250μA
V/°C Reference to 25°C, ID = -1mA
VGS = -10V, ID = -37A
mΩ
VGS = -4.5V, ID = -30A
V VDS = VGS, ID = -100μA
S VDS = -10V, ID = -37A
VDS = -40V, VGS = 0V
μA
VDS = -40V, VGS = 0V, TJ = 125°C
VGS = -20V
nA
VGS = 20V
ID = -37A
nC VDS = -32V
VGS = -10V
VDD = -20V
ID = -37A
ns
RG = 7.5 Ω
VGS = -10V
e
e
e
e
nH
pF
Between lead,
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
VDS = -25V
D
G
S
ƒ = 1.0KHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0KHz
VGS = 0V, VDS = -32V, ƒ = 1.0KHz
VGS = 0V, VDS = 0V to -32V
f
Source-Drain Ratings and Characteristics
Parameter
IS
ISM
VSD
trr
Qrr
ton
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
c
Notes:
Min. Typ. Max. Units
–––
–––
-74
–––
–––
-300
A
Conditions
MOSFET symbol
D
showing the
G
integral reverse
S
p-n junction diode.
TJ = 25°C, IS = -37A, VGS = 0V
TJ = 25°C, IF = -37A, VDD = -20V
e
–––
–––
-1.3
V
–––
51
77
ns
–––
377
566
nC di/dt = 100A/μs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
e
 Repetitive rating; pulse width limited by
… Limited by TJmax , see Fig.17a, 17b, 14, 15 for typical repetitive
‚ Limited by TJmax, starting TJ = 25°C, L = 0.399mH
† This value determined from sample failure population. 100%
max. junction temperature. (See fig. 11).
RG = 25Ω, IAS = -37A, VGS =-10V. Part not recommended for
use above this value.
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
„ Coss eff. is a fixed capacitance that gives the same charging
time as Coss while VDS is rising from 0 to 80% VDSS .
2
avalanche performance.
tested to this value in production.
‡ This is only applied to TO-220AB pakcage.
ˆ Rθ is measured at TJ approximately 90°C
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IRF9204PbF
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1000
≤60μs PULSE WIDTH
Tj = 25°C
VGS
-15V
-10V
-4.5V
-4.0V
-3.5V
-3.0V
-2.8V
-2.5V
100
10
1
BOTTOM
10
-2.5V
-2.5V
≤60μs PULSE WIDTH Tj = 175°C
0.1
1
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
100
60
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (A)
10
Fig 2. Typical Output Characteristics
1000
100
T J = 175°C
1
T J = 25°C
VDS = -25V
≤60μs PULSE WIDTH
50
TJ = 25°C
40
T J = 175°C
30
20
V DS = -5V
10
380μs PULSE WIDTH
0
0.1
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
0
20
40
60
80
100
ID,Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance Vs. Drain Current
1.6
RDS(on) , Drain-to-Source On Resistance
(Normalized)
1000
ISD, Reverse Drain Current (A)
1
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
10
VGS
-15V
-10V
-4.5V
-4.0V
-3.5V
-3.0V
-2.8V
-2.5V
T J = 175°C
100
10
T J = 25°C
1
VGS = 0V
1.4
ID = -37A
VGS = -10V
1.2
1.0
0.8
0.6
0.1
0.0
0.5
1.0
1.5
2.0
2.5
3.0
VSD, Source-to-Drain Voltage (V)
Fig 5. Typical Source-Drain Diode Forward Voltage
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-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
Fig 6. Normalized On-Resistance Vs. Temperature
3
IRF9204PbF
100000
14.0
VGS = 0V,
f = 1 KHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
ID= -37A
10000
Ciss
Coss
1000
12.0
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
C oss = C ds + C gd
Crss
VDS= -32V
VDS= -20V
10.0
8.0
6.0
4.0
2.0
0.0
100
1
10
0
100
20
40
60
80 100 120 140 160 180
QG, Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance Vs. Drain-to-Source Voltage Fig 8. Typical Gate Charge Vs. Gate-to-Source Voltage
80
1000
100μsec
100
1msec
10msec
10
LIMITED BY PACKAGE
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
Limited By Package
70
ID, Drain Current (A)
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
60
50
40
30
20
10
0
0.1
0
1
10
25
100
50
75
100
125
150
175
T C , Case Temperature (°C)
VDS, Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
Fig 10. Maximum Drain Current Vs. Case Temperature
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
0.0001
1E-006
1E-005
0.0001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
4
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IRF9204PbF
3.0
ID
-9.66A
-16.7A
BOTTOM -37A
VGS(th) , Gate threshold Voltage (V)
EAS , Single Pulse Avalanche Energy (mJ)
1200
TOP
1000
800
600
400
200
2.5
2.0
ID = 1.0A
ID = 1.0mA
ID = 250uA
ID = 150uA
1.5
ID = 100uA
1.0
0
25
50
75
100
125
150
-75 -50 -25
175
0
25 50 75 100 125 150 175
T J , Temperature ( °C )
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy Vs. Drain Current
Fig 13. Threshold Voltage Vs. Temperature
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
100
0.01
0.05
10
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
300
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = -37A
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 17a, 17b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
5
IRF9204PbF
Driver Gate Drive
D.U.T
ƒ
-
‚
-
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
VDD
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
VGS
20V
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 17a. Unclamped Inductive Test Circuit
Current Regulator
Same Type as D.U.T.
Fig 17b. Unclamped Inductive Waveforms
Id
Vds
Vgs
50KΩ
.2μF
12V
.3μF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
Qgs1 Qgs2
Fig 18a. Gate Charge Test Circuit
VDS
V GS
RG
Qgodr
Fig 18b. Gate Charge Waveform
RD
VDS
90%
D.U.T.
+
- VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 19a. Switching Time Test Circuit
6
Qgd
10%
VGS
td(on)
tr
t d(off)
tf
Fig 19b. Switching Time Waveforms
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IRF9204PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 2000
IN T HE AS SEMBLY LINE "C"
Note: "P" in as s embly line position
indicates "Lead - Free"
INT ERNAT IONAL
RECT IFIER
LOGO
AS SEMBLY
LOT CODE
PART NUMBER
DAT E CODE
YEAR 0 = 2000
WEEK 19
LINE C
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 101N. Sepulveda Blvd, El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.05/2011
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7